119 static int  ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len);
137 static void SIR2FIR(int iobase);
138 static void FIR2SIR(int iobase);
415 	int iobase;  in ali_ircc_close()  local
419         iobase = self->io.fir_base;  in ali_ircc_close()
548 	int iobase = info->fir_base;  in ali_ircc_setup()  local
557 	SIR2FIR(iobase);  in ali_ircc_setup()
560 	outb(0x40, iobase+FIR_MCR); // benjamin 2000/11/30 11:45AM  in ali_ircc_setup()
563 	switch_bank(iobase, BANK3);  in ali_ircc_setup()
564 	version = inb(iobase+FIR_ID_VR);  in ali_ircc_setup()
575 	switch_bank(iobase, BANK1);  in ali_ircc_setup()
576 	outb(RX_FIFO_Threshold, iobase+FIR_FIFO_TR);  in ali_ircc_setup()
579 	outb(RX_DMA_Threshold, iobase+FIR_DMA_TR);  in ali_ircc_setup()
582 	switch_bank(iobase, BANK2);  in ali_ircc_setup()
583 	outb(inb(iobase+FIR_IRDA_CR) | IRDA_CR_CRC, iobase+FIR_IRDA_CR);  in ali_ircc_setup()
588 	switch_bank(iobase, BANK0);  in ali_ircc_setup()
590 	tmp = inb(iobase+FIR_LCR_B);  in ali_ircc_setup()
594 	outb(tmp, iobase+FIR_LCR_B);  in ali_ircc_setup()
597 	outb(0x00, iobase+FIR_IER);  in ali_ircc_setup()
601 	FIR2SIR(iobase);  in ali_ircc_setup()
685 	int iobase, tmp;  in ali_ircc_fir_interrupt()  local
688 	iobase = self->io.fir_base;  in ali_ircc_fir_interrupt()
690 	switch_bank(iobase, BANK0);	  in ali_ircc_fir_interrupt()
691 	self->InterruptID = inb(iobase+FIR_IIR);		  in ali_ircc_fir_interrupt()
692 	self->BusStatus = inb(iobase+FIR_BSR);	  in ali_ircc_fir_interrupt()
695 	self->LineStatus = inb(iobase+FIR_LSR);	  in ali_ircc_fir_interrupt()
770 		switch_bank(iobase, BANK1);  in ali_ircc_fir_interrupt()
771 		tmp = inb(iobase+FIR_CR);  in ali_ircc_fir_interrupt()
772 		outb( tmp& ~CR_TIMER_EN, iobase+FIR_CR);  in ali_ircc_fir_interrupt()
810 	int iobase;  in ali_ircc_sir_interrupt()  local
814 	iobase = self->io.sir_base;  in ali_ircc_sir_interrupt()
816 	iir = inb(iobase+UART_IIR) & UART_IIR_ID;  in ali_ircc_sir_interrupt()
819 		lsr = inb(iobase+UART_LSR);  in ali_ircc_sir_interrupt()
822 			 __func__, iir, lsr, iobase);  in ali_ircc_sir_interrupt()
862 	int iobase;  in ali_ircc_sir_receive()  local
866 	iobase = self->io.sir_base;  in ali_ircc_sir_receive()
874 				  inb(iobase+UART_RX));  in ali_ircc_sir_receive()
881 	} while (inb(iobase+UART_LSR) & UART_LSR_DR);	  in ali_ircc_sir_receive()
895 	int iobase;	  in ali_ircc_sir_write_wakeup()  local
900 	iobase = self->io.sir_base;  in ali_ircc_sir_write_wakeup()
906 		actual = ali_ircc_sir_write(iobase, self->io.fifo_size,   in ali_ircc_sir_write_wakeup()
916 			while(!(inb(iobase+UART_LSR) & UART_LSR_TEMT))  in ali_ircc_sir_write_wakeup()
943 		outb(UART_IER_RDI, iobase+UART_IER);  in ali_ircc_sir_write_wakeup()
951 	int iobase;  in ali_ircc_change_speed()  local
959 	iobase = self->io.fir_base;  in ali_ircc_change_speed()
998 	int iobase;   in ali_ircc_fir_change_speed()  local
1006 	iobase = self->io.fir_base;  in ali_ircc_fir_change_speed()
1014 		SIR2FIR(iobase);  in ali_ircc_fir_change_speed()
1035 	int iobase;   in ali_ircc_sir_change_speed()  local
1045 	iobase = self->io.sir_base;  in ali_ircc_sir_change_speed()
1053 		FIR2SIR(iobase);  in ali_ircc_sir_change_speed()
1058 	inb(iobase+UART_LSR);  in ali_ircc_sir_change_speed()
1059 	inb(iobase+UART_SCR);  in ali_ircc_sir_change_speed()
1083 	outb(UART_LCR_DLAB | lcr, iobase+UART_LCR); /* Set DLAB */  in ali_ircc_sir_change_speed()
1084 	outb(divisor & 0xff,      iobase+UART_DLL); /* Set speed */  in ali_ircc_sir_change_speed()
1085 	outb(divisor >> 8,	  iobase+UART_DLM);  in ali_ircc_sir_change_speed()
1086 	outb(lcr,		  iobase+UART_LCR); /* Set 8N1	*/  in ali_ircc_sir_change_speed()
1087 	outb(fcr,		  iobase+UART_FCR); /* Enable FIFO's */  in ali_ircc_sir_change_speed()
1091 	outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), iobase+UART_MCR);  in ali_ircc_sir_change_speed()
1101 	int iobase,dongle_id;  in ali_ircc_change_dongle_speed()  local
1105 	iobase = self->io.fir_base; 	/* or iobase = self->io.sir_base; */  in ali_ircc_change_dongle_speed()
1113 	switch_bank(iobase, BANK2);  in ali_ircc_change_dongle_speed()
1114 	tmp = inb(iobase+FIR_IRDA_CR);  in ali_ircc_change_dongle_speed()
1130 			switch_bank(iobase, BANK2);  in ali_ircc_change_dongle_speed()
1131 			outb(tmp, iobase+FIR_IRDA_CR);  in ali_ircc_change_dongle_speed()
1136       			outb(tmp, iobase+FIR_IRDA_CR);  in ali_ircc_change_dongle_speed()
1142       			outb(tmp, iobase+FIR_IRDA_CR);  in ali_ircc_change_dongle_speed()
1147       			outb(tmp, iobase+FIR_IRDA_CR);  in ali_ircc_change_dongle_speed()
1153       			outb(tmp, iobase+FIR_IRDA_CR);  in ali_ircc_change_dongle_speed()
1159       			outb(tmp, iobase+FIR_IRDA_CR);  in ali_ircc_change_dongle_speed()
1163       			outb(tmp & ~0x02, iobase+FIR_IRDA_CR);      			  in ali_ircc_change_dongle_speed()
1186       			switch_bank(iobase, BANK2);  in ali_ircc_change_dongle_speed()
1187       			outb(tmp, iobase+FIR_IRDA_CR);  in ali_ircc_change_dongle_speed()
1195       			outb(tmp, iobase+FIR_IRDA_CR);  in ali_ircc_change_dongle_speed()
1201       			outb(tmp, iobase+FIR_IRDA_CR);  in ali_ircc_change_dongle_speed()
1206       			outb(tmp, iobase+FIR_IRDA_CR);  in ali_ircc_change_dongle_speed()
1210       			outb(tmp & ~0x02, iobase+FIR_IRDA_CR);      						  in ali_ircc_change_dongle_speed()
1233 		switch_bank(iobase, BANK2);  in ali_ircc_change_dongle_speed()
1234       		outb(tmp, iobase+FIR_IRDA_CR);		  in ali_ircc_change_dongle_speed()
1243 			switch_bank(iobase, BANK2);  in ali_ircc_change_dongle_speed()
1244       			outb(tmp, iobase+FIR_IRDA_CR);			  in ali_ircc_change_dongle_speed()
1268 			switch_bank(iobase, BANK2);  in ali_ircc_change_dongle_speed()
1269       			outb(tmp, iobase+FIR_IRDA_CR);			  in ali_ircc_change_dongle_speed()
1273 	switch_bank(iobase, BANK0);  in ali_ircc_change_dongle_speed()
1283 static int ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len)  in ali_ircc_sir_write()  argument
1289 	if (!(inb(iobase+UART_LSR) & UART_LSR_THRE)) {  in ali_ircc_sir_write()
1297 		outb(buf[actual], iobase+UART_TX);  in ali_ircc_sir_write()
1314 	int iobase;  in ali_ircc_net_open()  local
1324 	iobase = self->io.fir_base;  in ali_ircc_net_open()
1346 	outb(UART_IER_RDI , iobase+UART_IER);  in ali_ircc_net_open()
1413 	int iobase;  in ali_ircc_fir_hard_xmit()  local
1419 	iobase = self->io.fir_base;  in ali_ircc_fir_hard_xmit()
1494 						switch_bank(iobase, BANK1);  in ali_ircc_fir_hard_xmit()
1495 						outb(TIMER_IIR_500, iobase+FIR_TIMER_IIR);  in ali_ircc_fir_hard_xmit()
1499 						switch_bank(iobase, BANK1);  in ali_ircc_fir_hard_xmit()
1500 						outb(TIMER_IIR_1ms, iobase+FIR_TIMER_IIR);  in ali_ircc_fir_hard_xmit()
1504 						switch_bank(iobase, BANK1);  in ali_ircc_fir_hard_xmit()
1505 						outb(TIMER_IIR_2ms, iobase+FIR_TIMER_IIR);  in ali_ircc_fir_hard_xmit()
1510 					outb(inb(iobase+FIR_CR) | CR_TIMER_EN, iobase+FIR_CR);  in ali_ircc_fir_hard_xmit()
1540 	switch_bank(iobase, BANK0);  in ali_ircc_fir_hard_xmit()
1552 	int iobase, tmp;  in ali_ircc_dma_xmit()  local
1557 	iobase = self->io.fir_base;  in ali_ircc_dma_xmit()
1567 	switch_bank(iobase, BANK1);  in ali_ircc_dma_xmit()
1568 	outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR);  in ali_ircc_dma_xmit()
1579 	switch_bank(iobase, BANK0);  in ali_ircc_dma_xmit()
1580 	outb(LCR_A_FIFO_RESET, iobase+FIR_LCR_A);  in ali_ircc_dma_xmit()
1585 		switch_bank(iobase, BANK1);  in ali_ircc_dma_xmit()
1586 	    	outb(FIFO_OPTI, iobase+FIR_FIFO_TR) ;  in ali_ircc_dma_xmit()
1591 	switch_bank(iobase, BANK1);  in ali_ircc_dma_xmit()
1592 	outb(TX_DMA_Threshold, iobase+FIR_DMA_TR);  in ali_ircc_dma_xmit()
1597 	switch_bank(iobase, BANK2);  in ali_ircc_dma_xmit()
1598 	outb(Hi, iobase+FIR_TX_DSR_HI);  in ali_ircc_dma_xmit()
1599 	outb(Lo, iobase+FIR_TX_DSR_LO);  in ali_ircc_dma_xmit()
1602 	switch_bank(iobase, BANK0);	  in ali_ircc_dma_xmit()
1603 	tmp = inb(iobase+FIR_LCR_B);  in ali_ircc_dma_xmit()
1605 	outb(((unsigned char)(tmp & 0x3f) | LCR_B_TX_MODE) & ~LCR_B_BW, iobase+FIR_LCR_B);  in ali_ircc_dma_xmit()
1607 		 __func__, inb(iobase + FIR_LCR_B));  in ali_ircc_dma_xmit()
1609 	outb(0, iobase+FIR_LSR);  in ali_ircc_dma_xmit()
1612 	switch_bank(iobase, BANK1);  in ali_ircc_dma_xmit()
1613 	outb(inb(iobase+FIR_CR) | CR_DMA_EN | CR_DMA_BURST, iobase+FIR_CR);  in ali_ircc_dma_xmit()
1615 	switch_bank(iobase, BANK0);   in ali_ircc_dma_xmit()
1621 	int iobase;  in ali_ircc_dma_xmit_complete()  local
1625 	iobase = self->io.fir_base;  in ali_ircc_dma_xmit_complete()
1628 	switch_bank(iobase, BANK1);  in ali_ircc_dma_xmit_complete()
1629 	outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR);  in ali_ircc_dma_xmit_complete()
1632 	switch_bank(iobase, BANK0);  in ali_ircc_dma_xmit_complete()
1633 	if((inb(iobase+FIR_LSR) & LSR_FRAME_ABORT) == LSR_FRAME_ABORT)  in ali_ircc_dma_xmit_complete()
1678 	switch_bank(iobase, BANK0);   in ali_ircc_dma_xmit_complete()
1692 	int iobase, tmp;  in ali_ircc_dma_receive()  local
1695 	iobase = self->io.fir_base;  in ali_ircc_dma_receive()
1702 	switch_bank(iobase, BANK1);  in ali_ircc_dma_receive()
1703 	outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR);  in ali_ircc_dma_receive()
1706 	switch_bank(iobase, BANK0);  in ali_ircc_dma_receive()
1707 	outb(0x07, iobase+FIR_LSR);  in ali_ircc_dma_receive()
1711 	self->LineStatus = inb(iobase+FIR_LSR) ;  in ali_ircc_dma_receive()
1719 	outb(LCR_A_FIFO_RESET, iobase+FIR_LCR_A);   in ali_ircc_dma_receive()
1729 	tmp = inb(iobase+FIR_LCR_B);  in ali_ircc_dma_receive()
1730 …outb((unsigned char)(tmp &0x3f) | LCR_B_RX_MODE | LCR_B_BW , iobase + FIR_LCR_B); // 2000/12/1 05:…  in ali_ircc_dma_receive()
1732 		 __func__, inb(iobase + FIR_LCR_B));  in ali_ircc_dma_receive()
1735 	switch_bank(iobase, BANK1);  in ali_ircc_dma_receive()
1736 	outb(RX_FIFO_Threshold, iobase+FIR_FIFO_TR);  in ali_ircc_dma_receive()
1737 	outb(RX_DMA_Threshold, iobase+FIR_DMA_TR);  in ali_ircc_dma_receive()
1741 	outb(CR_DMA_EN | CR_DMA_BURST, iobase+FIR_CR);  in ali_ircc_dma_receive()
1743 	switch_bank(iobase, BANK0);   in ali_ircc_dma_receive()
1752 	int len, i, iobase, val;	  in ali_ircc_dma_receive_complete()  local
1755 	iobase = self->io.fir_base;	  in ali_ircc_dma_receive_complete()
1757 	switch_bank(iobase, BANK0);  in ali_ircc_dma_receive_complete()
1758 	MessageCount = inb(iobase+ FIR_LSR)&0x07;  in ali_ircc_dma_receive_complete()
1766 		switch_bank(iobase, BANK0);  in ali_ircc_dma_receive_complete()
1767 		status = inb(iobase+FIR_LSR);  in ali_ircc_dma_receive_complete()
1769 		switch_bank(iobase, BANK2);  in ali_ircc_dma_receive_complete()
1770 		len = inb(iobase+FIR_RX_DSR_HI) & 0x0f;  in ali_ircc_dma_receive_complete()
1772 		len |= inb(iobase+FIR_RX_DSR_LO);  in ali_ircc_dma_receive_complete()
1847 				switch_bank(iobase, BANK0);  in ali_ircc_dma_receive_complete()
1848 				val = inb(iobase+FIR_BSR);	  in ali_ircc_dma_receive_complete()
1867 					switch_bank(iobase, BANK1);  in ali_ircc_dma_receive_complete()
1868 					outb(TIMER_IIR_500, iobase+FIR_TIMER_IIR); // 2001/1/2 05:07PM  in ali_ircc_dma_receive_complete()
1871 					outb(inb(iobase+FIR_CR) | CR_TIMER_EN, iobase+FIR_CR);  in ali_ircc_dma_receive_complete()
1911 	switch_bank(iobase, BANK0);	  in ali_ircc_dma_receive_complete()
1929 	int iobase;  in ali_ircc_sir_hard_xmit()  local
1938 	iobase = self->io.sir_base;  in ali_ircc_sir_hard_xmit()
1973 	outb(UART_IER_THRI, iobase+UART_IER);   in ali_ircc_sir_hard_xmit()
2051 	int iobase;		  in ali_ircc_is_receiving()  local
2060 		iobase = self->io.fir_base;  in ali_ircc_is_receiving()
2062 		switch_bank(iobase, BANK1);  in ali_ircc_is_receiving()
2063 		if((inb(iobase+FIR_FIFO_FR) & 0x3f) != 0) 		  in ali_ircc_is_receiving()
2070 		switch_bank(iobase, BANK0);		  in ali_ircc_is_receiving()
2122 	int iobase = self->io.fir_base; /* or sir_base */  in SetCOMInterrupts()  local
2160 		switch_bank(iobase, BANK0);  in SetCOMInterrupts()
2161 		outb(newMask, iobase+FIR_IER);  in SetCOMInterrupts()
2164 		outb(newMask, iobase+UART_IER);  in SetCOMInterrupts()
2168 static void SIR2FIR(int iobase)  in SIR2FIR()  argument
2176 	outb(0x28, iobase+UART_MCR);  in SIR2FIR()
2177 	outb(0x68, iobase+UART_MCR);  in SIR2FIR()
2178 	outb(0x88, iobase+UART_MCR);		  in SIR2FIR()
2180 	outb(0x60, iobase+FIR_MCR); 	/*  Master Reset */  in SIR2FIR()
2181 	outb(0x20, iobase+FIR_MCR); 	/*  Master Interrupt Enable */  in SIR2FIR()
2189 static void FIR2SIR(int iobase)  in FIR2SIR()  argument
2197 	outb(0x20, iobase+FIR_MCR); 	/* IRQ to low */  in FIR2SIR()
2198 	outb(0x00, iobase+UART_IER); 	  in FIR2SIR()
2200 	outb(0xA0, iobase+FIR_MCR); 	/* Don't set master reset */  in FIR2SIR()
2201 	outb(0x00, iobase+UART_FCR);  in FIR2SIR()
2202 	outb(0x07, iobase+UART_FCR);		  in FIR2SIR()
2204 	val = inb(iobase+UART_RX);  in FIR2SIR()
2205 	val = inb(iobase+UART_LSR);  in FIR2SIR()
2206 	val = inb(iobase+UART_MSR);  in FIR2SIR()