104 #define NUM_IR_DESC	64  macro
152 	struct db_dest db[2 * NUM_IR_DESC];
153 	volatile struct ring_dest *rx_ring[NUM_IR_DESC];
154 	volatile struct ring_dest *tx_ring[NUM_IR_DESC];
155 	struct db_dest *rx_db_inuse[NUM_IR_DESC];
156 	struct db_dest *tx_db_inuse[NUM_IR_DESC];
252 	for (i = 0; i < NUM_IR_DESC; i++) {  in setup_hw_rings()
256 	for (i = 0; i < NUM_IR_DESC; i++) {  in setup_hw_rings()
311 	for (i = 0; i < NUM_IR_DESC; i++) {  in au1k_irda_set_speed()
318 	for (i = 0; i < NUM_IR_DESC; i++) {  in au1k_irda_set_speed()
429 		aup->tx_tail = (aup->tx_tail + 1) & (NUM_IR_DESC - 1);  in au1k_tx_ack()
489 		aup->rx_head = (aup->rx_head + 1) & (NUM_IR_DESC - 1);  in au1k_irda_rx()
557 	for (i = 0; i < NUM_IR_DESC; i++)  in au1k_init()
688 	} else if (((aup->tx_head + 1) & (NUM_IR_DESC - 1)) == aup->tx_tail) {  in au1k_irda_hard_xmit()
724 	aup->tx_head = (aup->tx_head + 1) & (NUM_IR_DESC - 1);  in au1k_irda_hard_xmit()
828 		dma_alloc(MAX_BUF_SIZE * 2 * NUM_IR_DESC, &temp);  in au1k_irda_net_init()
836 	for (i = 0; i < (2 * NUM_IR_DESC); i++) {  in au1k_irda_net_init()
847 	for (i = 0; i < NUM_IR_DESC; i++) {  in au1k_irda_net_init()
857 	for (i = 0; i < NUM_IR_DESC; i++) {  in au1k_irda_net_init()
950 		MAX_BUF_SIZE * 2 * NUM_IR_DESC);  in au1k_irda_probe()
972 		MAX_BUF_SIZE * 2 * NUM_IR_DESC);  in au1k_irda_remove()