766 	outb(((inb(iobase + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),  in smsc_ircc_init_chip()
767 	     iobase + IRCC_SCE_CFGB);  in smsc_ircc_init_chip()
769 	outb(((inb(iobase + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),  in smsc_ircc_init_chip()
770 	     iobase + IRCC_SCE_CFGB);  in smsc_ircc_init_chip()
1022 	outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),  in smsc_ircc_fir_start()
1023 	     fir_base + IRCC_SCE_CFGB);  in smsc_ircc_fir_start()
1025 	outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),  in smsc_ircc_fir_start()
1026 	     fir_base + IRCC_SCE_CFGB);  in smsc_ircc_fir_start()
1265 	outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,  in smsc_ircc_dma_xmit()
1266 	     iobase + IRCC_SCE_CFGB);  in smsc_ircc_dma_xmit()
1284 	outb(inb(iobase + IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |  in smsc_ircc_dma_xmit()
1285 	     IRCC_CFGB_DMA_BURST, iobase + IRCC_SCE_CFGB);  in smsc_ircc_dma_xmit()
1319 	outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,  in smsc_ircc_dma_xmit_complete()
1320 	     iobase + IRCC_SCE_CFGB);  in smsc_ircc_dma_xmit_complete()
1359 	outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,  in smsc_ircc_dma_receive()
1360 	     iobase + IRCC_SCE_CFGB);  in smsc_ircc_dma_receive()
1369 	outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,  in smsc_ircc_dma_receive()
1370 	     iobase + IRCC_SCE_CFGB);  in smsc_ircc_dma_receive()
1386 	outb(inb(iobase + IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |  in smsc_ircc_dma_receive()
1387 	     IRCC_CFGB_DMA_BURST, iobase + IRCC_SCE_CFGB);  in smsc_ircc_dma_receive()