Lines Matching refs:iobase
83 int iobase);
92 static int via_ircc_read_dongle_id(int iobase);
98 static void via_ircc_change_dongle_speed(int iobase, int speed,
100 static int RxTimerHandler(struct via_ircc_cb *self, int iobase);
102 static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase);
103 static int upload_rxdata(struct via_ircc_cb *self, int iobase);
418 int iobase; in via_remove_one() local
420 iobase = self->io.fir_base; in via_remove_one()
422 ResetChip(iobase, 5); //hardware reset. in via_remove_one()
451 int iobase = self->io.fir_base; in via_hw_init() local
453 SetMaxRxPacketSize(iobase, 0x0fff); //set to max:4095 in via_hw_init()
455 EnRXFIFOReadyInt(iobase, OFF); in via_hw_init()
456 EnRXFIFOHalfLevelInt(iobase, OFF); in via_hw_init()
457 EnTXFIFOHalfLevelInt(iobase, OFF); in via_hw_init()
458 EnTXFIFOUnderrunEOMInt(iobase, ON); in via_hw_init()
459 EnTXFIFOReadyInt(iobase, OFF); in via_hw_init()
460 InvertTX(iobase, OFF); in via_hw_init()
461 InvertRX(iobase, OFF); in via_hw_init()
466 EnRXSpecInt(iobase, ON); in via_hw_init()
470 ResetChip(iobase, 5); in via_hw_init()
471 EnableDMA(iobase, OFF); in via_hw_init()
472 EnableTX(iobase, OFF); in via_hw_init()
473 EnableRX(iobase, OFF); in via_hw_init()
474 EnRXDMA(iobase, OFF); in via_hw_init()
475 EnTXDMA(iobase, OFF); in via_hw_init()
476 RXStart(iobase, OFF); in via_hw_init()
477 TXStart(iobase, OFF); in via_hw_init()
478 InitCard(iobase); in via_hw_init()
479 CommonInit(iobase); in via_hw_init()
480 SIRFilter(iobase, ON); in via_hw_init()
481 SetSIR(iobase, ON); in via_hw_init()
482 CRC16(iobase, ON); in via_hw_init()
483 EnTXCRC(iobase, 0); in via_hw_init()
484 WriteReg(iobase, I_ST_CT_0, 0x00); in via_hw_init()
485 SetBaudRate(iobase, 9600); in via_hw_init()
486 SetPulseWidth(iobase, 12); in via_hw_init()
487 SetSendPreambleCount(iobase, 0); in via_hw_init()
492 via_ircc_change_dongle_speed(iobase, self->io.speed, in via_hw_init()
495 WriteReg(iobase, I_ST_CT_0, 0x80); in via_hw_init()
502 static int via_ircc_read_dongle_id(int iobase) in via_ircc_read_dongle_id() argument
513 static void via_ircc_change_dongle_speed(int iobase, int speed, in via_ircc_change_dongle_speed() argument
522 __func__, speed, iobase, dongle_id); in via_ircc_change_dongle_speed()
530 UseOneRX(iobase, ON); // use one RX pin RX1,RX2 in via_ircc_change_dongle_speed()
531 InvertTX(iobase, OFF); in via_ircc_change_dongle_speed()
532 InvertRX(iobase, OFF); in via_ircc_change_dongle_speed()
534 EnRX2(iobase, ON); //sir to rx2 in via_ircc_change_dongle_speed()
535 EnGPIOtoRX2(iobase, OFF); in via_ircc_change_dongle_speed()
537 if (IsSIROn(iobase)) { //sir in via_ircc_change_dongle_speed()
539 SlowIRRXLowActive(iobase, ON); in via_ircc_change_dongle_speed()
541 SlowIRRXLowActive(iobase, OFF); in via_ircc_change_dongle_speed()
543 if (IsMIROn(iobase)) { //mir in via_ircc_change_dongle_speed()
545 SlowIRRXLowActive(iobase, OFF); in via_ircc_change_dongle_speed()
548 if (IsFIROn(iobase)) { //fir in via_ircc_change_dongle_speed()
550 SlowIRRXLowActive(iobase, OFF); in via_ircc_change_dongle_speed()
558 UseOneRX(iobase, ON); //use ONE RX....RX1 in via_ircc_change_dongle_speed()
559 InvertTX(iobase, OFF); in via_ircc_change_dongle_speed()
560 InvertRX(iobase, OFF); // invert RX pin in via_ircc_change_dongle_speed()
562 EnRX2(iobase, ON); in via_ircc_change_dongle_speed()
563 EnGPIOtoRX2(iobase, OFF); in via_ircc_change_dongle_speed()
564 if (IsSIROn(iobase)) { //sir in via_ircc_change_dongle_speed()
566 SlowIRRXLowActive(iobase, ON); in via_ircc_change_dongle_speed()
569 SlowIRRXLowActive(iobase, OFF); in via_ircc_change_dongle_speed()
571 if (IsMIROn(iobase)) { //mir in via_ircc_change_dongle_speed()
573 SlowIRRXLowActive(iobase, OFF); in via_ircc_change_dongle_speed()
576 SlowIRRXLowActive(iobase, ON); in via_ircc_change_dongle_speed()
578 if (IsFIROn(iobase)) { //fir in via_ircc_change_dongle_speed()
580 SlowIRRXLowActive(iobase, OFF); in via_ircc_change_dongle_speed()
582 WriteTX(iobase, ON); in via_ircc_change_dongle_speed()
585 SlowIRRXLowActive(iobase, ON); in via_ircc_change_dongle_speed()
588 WriteTX(iobase, OFF); in via_ircc_change_dongle_speed()
594 UseOneRX(iobase, OFF); // use two RX pin RX1,RX2 in via_ircc_change_dongle_speed()
595 InvertTX(iobase, OFF); in via_ircc_change_dongle_speed()
596 InvertRX(iobase, OFF); in via_ircc_change_dongle_speed()
597 SlowIRRXLowActive(iobase, OFF); in via_ircc_change_dongle_speed()
598 if (IsSIROn(iobase)) { //sir in via_ircc_change_dongle_speed()
599 EnGPIOtoRX2(iobase, OFF); in via_ircc_change_dongle_speed()
600 WriteGIO(iobase, OFF); in via_ircc_change_dongle_speed()
601 EnRX2(iobase, OFF); //sir to rx2 in via_ircc_change_dongle_speed()
603 EnGPIOtoRX2(iobase, OFF); in via_ircc_change_dongle_speed()
604 WriteGIO(iobase, OFF); in via_ircc_change_dongle_speed()
605 EnRX2(iobase, OFF); //fir to rx in via_ircc_change_dongle_speed()
614 UseOneRX(iobase, ON); //use ONE RX....RX1 in via_ircc_change_dongle_speed()
615 InvertTX(iobase, OFF); in via_ircc_change_dongle_speed()
616 InvertRX(iobase, ON); // invert RX pin in via_ircc_change_dongle_speed()
618 EnRX2(iobase, ON); //sir to rx2 in via_ircc_change_dongle_speed()
619 EnGPIOtoRX2(iobase, OFF); in via_ircc_change_dongle_speed()
621 if( IsSIROn(iobase) ){ //sir in via_ircc_change_dongle_speed()
624 SlowIRRXLowActive(iobase, ON); in via_ircc_change_dongle_speed()
627 SlowIRRXLowActive(iobase, OFF); in via_ircc_change_dongle_speed()
636 if (IsSIROn(iobase)) in via_ircc_change_dongle_speed()
638 else if (IsMIROn(iobase)) in via_ircc_change_dongle_speed()
640 else if (IsFIROn(iobase)) in via_ircc_change_dongle_speed()
642 else if (IsVFIROn(iobase)) in via_ircc_change_dongle_speed()
644 SI_SetMode(iobase, mode); in via_ircc_change_dongle_speed()
662 u16 iobase; in via_ircc_change_speed() local
665 iobase = self->io.fir_base; in via_ircc_change_speed()
670 WriteReg(iobase, I_ST_CT_0, 0x0); in via_ircc_change_speed()
681 SetSIR(iobase, ON); in via_ircc_change_speed()
682 CRC16(iobase, ON); in via_ircc_change_speed()
688 SetSIR(iobase, ON); in via_ircc_change_speed()
689 CRC16(iobase, ON); in via_ircc_change_speed()
693 SetMIR(iobase, ON); in via_ircc_change_speed()
698 SetFIR(iobase, ON); in via_ircc_change_speed()
699 SetPulseWidth(iobase, 0); in via_ircc_change_speed()
700 SetSendPreambleCount(iobase, 14); in via_ircc_change_speed()
701 CRC16(iobase, OFF); in via_ircc_change_speed()
702 EnTXCRC(iobase, ON); in via_ircc_change_speed()
706 SetVFIR(iobase, ON); in via_ircc_change_speed()
715 bTmp = (ReadReg(iobase, I_CF_H_1) & 0x03); in via_ircc_change_speed()
717 WriteReg(iobase, I_CF_H_1, bTmp); in via_ircc_change_speed()
720 via_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id); in via_ircc_change_speed()
723 SetFIFO(iobase, 64); in via_ircc_change_speed()
726 WriteReg(iobase, I_ST_CT_0, 0x80); in via_ircc_change_speed()
733 if (IsSIROn(iobase)) { in via_ircc_change_speed()
734 SIRFilter(iobase, ON); in via_ircc_change_speed()
735 SIRRecvAny(iobase, ON); in via_ircc_change_speed()
737 SIRFilter(iobase, OFF); in via_ircc_change_speed()
738 SIRRecvAny(iobase, OFF); in via_ircc_change_speed()
763 u16 iobase; in via_ircc_hard_xmit_sir() local
768 iobase = self->io.fir_base; in via_ircc_hard_xmit_sir()
783 InitCard(iobase); in via_ircc_hard_xmit_sir()
784 CommonInit(iobase); in via_ircc_hard_xmit_sir()
785 SIRFilter(iobase, ON); in via_ircc_hard_xmit_sir()
786 SetSIR(iobase, ON); in via_ircc_hard_xmit_sir()
787 CRC16(iobase, ON); in via_ircc_hard_xmit_sir()
788 EnTXCRC(iobase, 0); in via_ircc_hard_xmit_sir()
789 WriteReg(iobase, I_ST_CT_0, 0x00); in via_ircc_hard_xmit_sir()
799 SetBaudRate(iobase, self->io.speed); in via_ircc_hard_xmit_sir()
800 SetPulseWidth(iobase, 12); in via_ircc_hard_xmit_sir()
801 SetSendPreambleCount(iobase, 0); in via_ircc_hard_xmit_sir()
802 WriteReg(iobase, I_ST_CT_0, 0x80); in via_ircc_hard_xmit_sir()
804 EnableTX(iobase, ON); in via_ircc_hard_xmit_sir()
805 EnableRX(iobase, OFF); in via_ircc_hard_xmit_sir()
807 ResetChip(iobase, 0); in via_ircc_hard_xmit_sir()
808 ResetChip(iobase, 1); in via_ircc_hard_xmit_sir()
809 ResetChip(iobase, 2); in via_ircc_hard_xmit_sir()
810 ResetChip(iobase, 3); in via_ircc_hard_xmit_sir()
811 ResetChip(iobase, 4); in via_ircc_hard_xmit_sir()
813 EnAllInt(iobase, ON); in via_ircc_hard_xmit_sir()
814 EnTXDMA(iobase, ON); in via_ircc_hard_xmit_sir()
815 EnRXDMA(iobase, OFF); in via_ircc_hard_xmit_sir()
820 SetSendByte(iobase, self->tx_buff.len); in via_ircc_hard_xmit_sir()
821 RXStart(iobase, OFF); in via_ircc_hard_xmit_sir()
822 TXStart(iobase, ON); in via_ircc_hard_xmit_sir()
834 u16 iobase; in via_ircc_hard_xmit_fir() local
839 iobase = self->io.fir_base; in via_ircc_hard_xmit_fir()
869 via_ircc_dma_xmit(self, iobase); in via_ircc_hard_xmit_fir()
879 static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase) in via_ircc_dma_xmit() argument
881 EnTXDMA(iobase, OFF); in via_ircc_dma_xmit()
883 EnPhys(iobase, ON); in via_ircc_dma_xmit()
884 EnableTX(iobase, ON); in via_ircc_dma_xmit()
885 EnableRX(iobase, OFF); in via_ircc_dma_xmit()
886 ResetChip(iobase, 0); in via_ircc_dma_xmit()
887 ResetChip(iobase, 1); in via_ircc_dma_xmit()
888 ResetChip(iobase, 2); in via_ircc_dma_xmit()
889 ResetChip(iobase, 3); in via_ircc_dma_xmit()
890 ResetChip(iobase, 4); in via_ircc_dma_xmit()
891 EnAllInt(iobase, ON); in via_ircc_dma_xmit()
892 EnTXDMA(iobase, ON); in via_ircc_dma_xmit()
893 EnRXDMA(iobase, OFF); in via_ircc_dma_xmit()
903 SetSendByte(iobase, self->tx_fifo.queue[self->tx_fifo.ptr].len); in via_ircc_dma_xmit()
904 RXStart(iobase, OFF); in via_ircc_dma_xmit()
905 TXStart(iobase, ON); in via_ircc_dma_xmit()
919 int iobase; in via_ircc_dma_xmit_complete() local
922 iobase = self->io.fir_base; in via_ircc_dma_xmit_complete()
927 Tx_status = GetTXStatus(iobase); in via_ircc_dma_xmit_complete()
935 ResetChip(iobase, 3); in via_ircc_dma_xmit_complete()
936 ResetChip(iobase, 4); in via_ircc_dma_xmit_complete()
945 if (IsFIROn(iobase)) { in via_ircc_dma_xmit_complete()
984 int iobase; in via_ircc_dma_receive() local
986 iobase = self->io.fir_base; in via_ircc_dma_receive()
996 EnPhys(iobase, ON); in via_ircc_dma_receive()
997 EnableTX(iobase, OFF); in via_ircc_dma_receive()
998 EnableRX(iobase, ON); in via_ircc_dma_receive()
1000 ResetChip(iobase, 0); in via_ircc_dma_receive()
1001 ResetChip(iobase, 1); in via_ircc_dma_receive()
1002 ResetChip(iobase, 2); in via_ircc_dma_receive()
1003 ResetChip(iobase, 3); in via_ircc_dma_receive()
1004 ResetChip(iobase, 4); in via_ircc_dma_receive()
1006 EnAllInt(iobase, ON); in via_ircc_dma_receive()
1007 EnTXDMA(iobase, OFF); in via_ircc_dma_receive()
1008 EnRXDMA(iobase, ON); in via_ircc_dma_receive()
1011 TXStart(iobase, OFF); in via_ircc_dma_receive()
1012 RXStart(iobase, ON); in via_ircc_dma_receive()
1025 int iobase) in via_ircc_dma_receive_complete() argument
1032 iobase = self->io.fir_base; in via_ircc_dma_receive_complete()
1036 len = GetRecvByte(iobase, self); in via_ircc_dma_receive_complete()
1065 len = GetRecvByte(iobase, self); in via_ircc_dma_receive_complete()
1070 __func__, len, RxCurCount(iobase, self), in via_ircc_dma_receive_complete()
1077 st_fifo->len, len - 4, RxCurCount(iobase, self)); in via_ircc_dma_receive_complete()
1097 EnableRX(iobase, OFF); in via_ircc_dma_receive_complete()
1098 EnRXDMA(iobase, OFF); in via_ircc_dma_receive_complete()
1099 RXStart(iobase, OFF); in via_ircc_dma_receive_complete()
1145 static int upload_rxdata(struct via_ircc_cb *self, int iobase) in upload_rxdata() argument
1152 len = GetRecvByte(iobase, self); in upload_rxdata()
1182 RXStart(iobase, ON); in upload_rxdata()
1184 EnableRX(iobase, OFF); in upload_rxdata()
1185 EnRXDMA(iobase, OFF); in upload_rxdata()
1186 RXStart(iobase, OFF); in upload_rxdata()
1195 static int RxTimerHandler(struct via_ircc_cb *self, int iobase) in RxTimerHandler() argument
1204 if (CkRxRecv(iobase, self)) { in RxTimerHandler()
1207 SetTimer(iobase, 20); in RxTimerHandler()
1254 __func__, GetHostStatus(iobase), GetRXStatus(iobase)); in RxTimerHandler()
1260 if ((GetRXStatus(iobase) & 0x10) && in RxTimerHandler()
1261 (RxCurCount(iobase, self) != self->RxLastCount)) { in RxTimerHandler()
1262 upload_rxdata(self, iobase); in RxTimerHandler()
1268 SetTimer(iobase, 4); in RxTimerHandler()
1285 int iobase; in via_ircc_interrupt() local
1288 iobase = self->io.fir_base; in via_ircc_interrupt()
1290 iHostIntType = GetHostStatus(iobase); in via_ircc_interrupt()
1301 ClearTimerInt(iobase, 1); in via_ircc_interrupt()
1303 via_ircc_dma_xmit(self, iobase); in via_ircc_interrupt()
1315 RxTimerHandler(self, iobase); in via_ircc_interrupt()
1320 iTxIntType = GetTXStatus(iobase); in via_ircc_interrupt()
1344 iRxIntType = GetRXStatus(iobase); in via_ircc_interrupt()
1359 if (via_ircc_dma_receive_complete(self, iobase)) { in via_ircc_interrupt()
1367 RxCurCount(iobase, self), self->RxLastCount); in via_ircc_interrupt()
1370 ResetChip(iobase, 0); in via_ircc_interrupt()
1371 ResetChip(iobase, 1); in via_ircc_interrupt()
1387 int iobase; in hwreset() local
1388 iobase = self->io.fir_base; in hwreset()
1390 ResetChip(iobase, 5); in hwreset()
1391 EnableDMA(iobase, OFF); in hwreset()
1392 EnableTX(iobase, OFF); in hwreset()
1393 EnableRX(iobase, OFF); in hwreset()
1394 EnRXDMA(iobase, OFF); in hwreset()
1395 EnTXDMA(iobase, OFF); in hwreset()
1396 RXStart(iobase, OFF); in hwreset()
1397 TXStart(iobase, OFF); in hwreset()
1398 InitCard(iobase); in hwreset()
1399 CommonInit(iobase); in hwreset()
1400 SIRFilter(iobase, ON); in hwreset()
1401 SetSIR(iobase, ON); in hwreset()
1402 CRC16(iobase, ON); in hwreset()
1403 EnTXCRC(iobase, 0); in hwreset()
1404 WriteReg(iobase, I_ST_CT_0, 0x00); in hwreset()
1405 SetBaudRate(iobase, 9600); in hwreset()
1406 SetPulseWidth(iobase, 12); in hwreset()
1407 SetSendPreambleCount(iobase, 0); in hwreset()
1408 WriteReg(iobase, I_ST_CT_0, 0x80); in hwreset()
1425 int iobase; in via_ircc_is_receiving() local
1429 iobase = self->io.fir_base; in via_ircc_is_receiving()
1430 if (CkRxRecv(iobase, self)) in via_ircc_is_receiving()
1448 int iobase; in via_ircc_net_open() local
1455 iobase = self->io.fir_base; in via_ircc_net_open()
1483 EnAllInt(iobase, ON); in via_ircc_net_open()
1484 EnInternalLoop(iobase, OFF); in via_ircc_net_open()
1485 EnExternalLoop(iobase, OFF); in via_ircc_net_open()
1497 sprintf(hwname, "VIA @ 0x%x", iobase); in via_ircc_net_open()
1514 int iobase; in via_ircc_net_close() local
1526 iobase = self->io.fir_base; in via_ircc_net_close()
1527 EnTXDMA(iobase, OFF); in via_ircc_net_close()
1528 EnRXDMA(iobase, OFF); in via_ircc_net_close()
1532 EnAllInt(iobase, OFF); in via_ircc_net_close()