Lines Matching refs:phydev
22 #define BRCM_PHY_MODEL(phydev) \ argument
23 ((phydev)->drv->phy_id & (phydev)->drv->phy_id_mask)
25 #define BRCM_PHY_REV(phydev) \ argument
26 ((phydev)->drv->phy_id & ~((phydev)->drv->phy_id_mask))
33 static int bcm54xx_exp_read(struct phy_device *phydev, u16 regnum) in bcm54xx_exp_read() argument
37 val = phy_write(phydev, MII_BCM54XX_EXP_SEL, regnum); in bcm54xx_exp_read()
41 val = phy_read(phydev, MII_BCM54XX_EXP_DATA); in bcm54xx_exp_read()
44 phy_write(phydev, MII_BCM54XX_EXP_SEL, 0); in bcm54xx_exp_read()
49 static int bcm54xx_exp_write(struct phy_device *phydev, u16 regnum, u16 val) in bcm54xx_exp_write() argument
53 ret = phy_write(phydev, MII_BCM54XX_EXP_SEL, regnum); in bcm54xx_exp_write()
57 ret = phy_write(phydev, MII_BCM54XX_EXP_DATA, val); in bcm54xx_exp_write()
60 phy_write(phydev, MII_BCM54XX_EXP_SEL, 0); in bcm54xx_exp_write()
65 static int bcm54xx_auxctl_write(struct phy_device *phydev, u16 regnum, u16 val) in bcm54xx_auxctl_write() argument
67 return phy_write(phydev, MII_BCM54XX_AUX_CTL, regnum | val); in bcm54xx_auxctl_write()
71 static int bcm50610_a0_workaround(struct phy_device *phydev) in bcm50610_a0_workaround() argument
75 err = bcm54xx_exp_write(phydev, MII_BCM54XX_EXP_AADJ1CH0, in bcm50610_a0_workaround()
81 err = bcm54xx_exp_write(phydev, MII_BCM54XX_EXP_AADJ1CH3, in bcm50610_a0_workaround()
86 err = bcm54xx_exp_write(phydev, MII_BCM54XX_EXP_EXP75, in bcm50610_a0_workaround()
91 err = bcm54xx_exp_write(phydev, MII_BCM54XX_EXP_EXP96, in bcm50610_a0_workaround()
96 err = bcm54xx_exp_write(phydev, MII_BCM54XX_EXP_EXP97, in bcm50610_a0_workaround()
102 static int bcm54xx_phydsp_config(struct phy_device *phydev) in bcm54xx_phydsp_config() argument
107 err = bcm54xx_auxctl_write(phydev, in bcm54xx_phydsp_config()
114 if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 || in bcm54xx_phydsp_config()
115 BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) { in bcm54xx_phydsp_config()
117 err = bcm54xx_exp_write(phydev, MII_BCM54XX_EXP_EXP08, in bcm54xx_phydsp_config()
122 if (phydev->drv->phy_id == PHY_ID_BCM50610) { in bcm54xx_phydsp_config()
123 err = bcm50610_a0_workaround(phydev); in bcm54xx_phydsp_config()
129 if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM57780) { in bcm54xx_phydsp_config()
132 val = bcm54xx_exp_read(phydev, MII_BCM54XX_EXP_EXP75); in bcm54xx_phydsp_config()
137 err = bcm54xx_exp_write(phydev, MII_BCM54XX_EXP_EXP75, val); in bcm54xx_phydsp_config()
142 err2 = bcm54xx_auxctl_write(phydev, in bcm54xx_phydsp_config()
150 static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev) in bcm54xx_adjust_rxrefclk() argument
157 if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM57780 && in bcm54xx_adjust_rxrefclk()
158 BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610 && in bcm54xx_adjust_rxrefclk()
159 BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610M) in bcm54xx_adjust_rxrefclk()
162 val = bcm54xx_shadow_read(phydev, BCM54XX_SHD_SCR3); in bcm54xx_adjust_rxrefclk()
168 if ((BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 || in bcm54xx_adjust_rxrefclk()
169 BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) && in bcm54xx_adjust_rxrefclk()
170 BRCM_PHY_REV(phydev) >= 0x3) { in bcm54xx_adjust_rxrefclk()
177 if (phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED) { in bcm54xx_adjust_rxrefclk()
184 if (!clk125en || (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE)) in bcm54xx_adjust_rxrefclk()
189 if (phydev->dev_flags & PHY_BRCM_DIS_TXCRXC_NOENRGY) in bcm54xx_adjust_rxrefclk()
193 bcm54xx_shadow_write(phydev, BCM54XX_SHD_SCR3, val); in bcm54xx_adjust_rxrefclk()
195 val = bcm54xx_shadow_read(phydev, BCM54XX_SHD_APD); in bcm54xx_adjust_rxrefclk()
201 if (!clk125en || (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE)) in bcm54xx_adjust_rxrefclk()
207 bcm54xx_shadow_write(phydev, BCM54XX_SHD_APD, val); in bcm54xx_adjust_rxrefclk()
210 static int bcm54xx_config_init(struct phy_device *phydev) in bcm54xx_config_init() argument
214 reg = phy_read(phydev, MII_BCM54XX_ECR); in bcm54xx_config_init()
220 err = phy_write(phydev, MII_BCM54XX_ECR, reg); in bcm54xx_config_init()
228 err = phy_write(phydev, MII_BCM54XX_IMR, reg); in bcm54xx_config_init()
232 if ((BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 || in bcm54xx_config_init()
233 BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) && in bcm54xx_config_init()
234 (phydev->dev_flags & PHY_BRCM_CLEAR_RGMII_MODE)) in bcm54xx_config_init()
235 bcm54xx_shadow_write(phydev, BCM54XX_SHD_RGMII_MODE, 0); in bcm54xx_config_init()
237 if ((phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED) || in bcm54xx_config_init()
238 (phydev->dev_flags & PHY_BRCM_DIS_TXCRXC_NOENRGY) || in bcm54xx_config_init()
239 (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE)) in bcm54xx_config_init()
240 bcm54xx_adjust_rxrefclk(phydev); in bcm54xx_config_init()
242 bcm54xx_phydsp_config(phydev); in bcm54xx_config_init()
247 static int bcm5482_config_init(struct phy_device *phydev) in bcm5482_config_init() argument
251 err = bcm54xx_config_init(phydev); in bcm5482_config_init()
253 if (phydev->dev_flags & PHY_BCM_FLAGS_MODE_1000BX) { in bcm5482_config_init()
257 reg = bcm54xx_shadow_read(phydev, BCM5482_SHD_SSD); in bcm5482_config_init()
258 bcm54xx_shadow_write(phydev, BCM5482_SHD_SSD, in bcm5482_config_init()
267 err = bcm54xx_exp_read(phydev, reg); in bcm5482_config_init()
270 err = bcm54xx_exp_write(phydev, reg, err | in bcm5482_config_init()
280 err = bcm54xx_exp_read(phydev, reg); in bcm5482_config_init()
283 err = bcm54xx_exp_write(phydev, reg, in bcm5482_config_init()
291 reg = bcm54xx_shadow_read(phydev, BCM5482_SHD_MODE); in bcm5482_config_init()
292 bcm54xx_shadow_write(phydev, BCM5482_SHD_MODE, in bcm5482_config_init()
299 bcm54xx_shadow_write(phydev, BCM5482_SHD_LEDS1, in bcm5482_config_init()
309 phydev->autoneg = AUTONEG_DISABLE; in bcm5482_config_init()
310 phydev->speed = SPEED_1000; in bcm5482_config_init()
311 phydev->duplex = DUPLEX_FULL; in bcm5482_config_init()
317 static int bcm5482_read_status(struct phy_device *phydev) in bcm5482_read_status() argument
321 err = genphy_read_status(phydev); in bcm5482_read_status()
323 if (phydev->dev_flags & PHY_BCM_FLAGS_MODE_1000BX) { in bcm5482_read_status()
328 if (phydev->link) { in bcm5482_read_status()
329 phydev->speed = SPEED_1000; in bcm5482_read_status()
330 phydev->duplex = DUPLEX_FULL; in bcm5482_read_status()
337 static int bcm54xx_ack_interrupt(struct phy_device *phydev) in bcm54xx_ack_interrupt() argument
342 reg = phy_read(phydev, MII_BCM54XX_ISR); in bcm54xx_ack_interrupt()
349 static int bcm54xx_config_intr(struct phy_device *phydev) in bcm54xx_config_intr() argument
353 reg = phy_read(phydev, MII_BCM54XX_ECR); in bcm54xx_config_intr()
357 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) in bcm54xx_config_intr()
362 err = phy_write(phydev, MII_BCM54XX_ECR, reg); in bcm54xx_config_intr()
366 static int bcm5481_config_aneg(struct phy_device *phydev) in bcm5481_config_aneg() argument
371 ret = genphy_config_aneg(phydev); in bcm5481_config_aneg()
374 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { in bcm5481_config_aneg()
388 phy_write(phydev, 0x18, reg); in bcm5481_config_aneg()
390 reg = phy_read(phydev, 0x18); in bcm5481_config_aneg()
395 phy_write(phydev, 0x18, reg); in bcm5481_config_aneg()
401 static int brcm_phy_setbits(struct phy_device *phydev, int reg, int set) in brcm_phy_setbits() argument
405 val = phy_read(phydev, reg); in brcm_phy_setbits()
409 return phy_write(phydev, reg, val | set); in brcm_phy_setbits()
412 static int brcm_fet_config_init(struct phy_device *phydev) in brcm_fet_config_init() argument
417 err = phy_write(phydev, MII_BMCR, BMCR_RESET); in brcm_fet_config_init()
421 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_config_init()
432 err = phy_write(phydev, MII_BRCM_FET_INTREG, reg); in brcm_fet_config_init()
437 brcmtest = phy_read(phydev, MII_BRCM_FET_BRCMTEST); in brcm_fet_config_init()
443 err = phy_write(phydev, MII_BRCM_FET_BRCMTEST, reg); in brcm_fet_config_init()
448 reg = phy_read(phydev, MII_BRCM_FET_SHDW_AUXMODE4); in brcm_fet_config_init()
457 err = phy_write(phydev, MII_BRCM_FET_SHDW_AUXMODE4, reg); in brcm_fet_config_init()
462 err = brcm_phy_setbits(phydev, MII_BRCM_FET_SHDW_MISCCTRL, in brcm_fet_config_init()
467 if (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE) { in brcm_fet_config_init()
469 err = brcm_phy_setbits(phydev, MII_BRCM_FET_SHDW_AUXSTAT2, in brcm_fet_config_init()
475 err2 = phy_write(phydev, MII_BRCM_FET_BRCMTEST, brcmtest); in brcm_fet_config_init()
482 static int brcm_fet_ack_interrupt(struct phy_device *phydev) in brcm_fet_ack_interrupt() argument
487 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_ack_interrupt()
494 static int brcm_fet_config_intr(struct phy_device *phydev) in brcm_fet_config_intr() argument
498 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_config_intr()
502 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) in brcm_fet_config_intr()
507 err = phy_write(phydev, MII_BRCM_FET_INTREG, reg); in brcm_fet_config_intr()