239 	dev->mii.mdio_write = asix_mdio_write;  in ax88172_bind()
249 	asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);  in ax88172_bind()
250 	asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,  in ax88172_bind()
361 	asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);  in ax88772_reset()
362 	asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,  in ax88772_reset()
449 	dev->mii.mdio_write = asix_mdio_write;  in ax88772_bind()
518 	asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,  in marvell_phy_init()
528 		asix_mdio_write(dev->net, dev->mii.phy_id,  in marvell_phy_init()
546 	asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);  in rtl8211cl_phy_init()
547 	asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);  in rtl8211cl_phy_init()
548 	asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,  in rtl8211cl_phy_init()
550 	asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);  in rtl8211cl_phy_init()
553 		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);  in rtl8211cl_phy_init()
554 		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);  in rtl8211cl_phy_init()
555 		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);  in rtl8211cl_phy_init()
582 	asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);  in marvell_led_status()
649 	asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,  in ax88178_reset()
651 	asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,  in ax88178_reset()
653 	asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,  in ax88178_reset()
804 	dev->mii.mdio_write = asix_mdio_write;  in ax88178_bind()