149 static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index,  in smsc95xx_write_reg()  function
353 		ret = smsc95xx_write_reg(dev, E2P_CMD, val);  in smsc95xx_read_eeprom()
391 	ret = smsc95xx_write_reg(dev, E2P_CMD, val);  in smsc95xx_write_eeprom()
405 		ret = smsc95xx_write_reg(dev, E2P_DATA, val);  in smsc95xx_write_eeprom()
413 		ret = smsc95xx_write_reg(dev, E2P_CMD, val);  in smsc95xx_write_eeprom()
547 	ret = smsc95xx_write_reg(dev, FLOW, flow);  in smsc95xx_phy_update_flowcontrol()
551 	return smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);  in smsc95xx_phy_update_flowcontrol()
568 	ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);  in smsc95xx_link_reset()
591 	ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);  in smsc95xx_link_reset()
646 	ret = smsc95xx_write_reg(dev, COE_CR, read_buf);  in smsc95xx_set_features()
790 	ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);  in smsc95xx_set_mac_address()
794 	return smsc95xx_write_reg(dev, ADDRH, addr_hi);  in smsc95xx_set_mac_address()
809 	ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);  in smsc95xx_start_tx_path()
814 	return smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_);  in smsc95xx_start_tx_path()
883 	ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_);  in smsc95xx_reset()
901 	ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_);  in smsc95xx_reset()
935 	ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);  in smsc95xx_reset()
961 	ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);  in smsc95xx_reset()
973 	ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);  in smsc95xx_reset()
1000 	ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);  in smsc95xx_reset()
1011 	ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);  in smsc95xx_reset()
1023 	ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);  in smsc95xx_reset()
1028 	ret = smsc95xx_write_reg(dev, FLOW, 0);  in smsc95xx_reset()
1032 	ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT);  in smsc95xx_reset()
1043 	ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q);  in smsc95xx_reset()
1069 	ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);  in smsc95xx_reset()