Lines Matching refs:ret
171 int ret; in sr_set_sw_mii() local
173 ret = sr_write_cmd(dev, SR_CMD_SET_SW_MII, 0x0000, 0, 0, NULL); in sr_set_sw_mii()
174 if (ret < 0) in sr_set_sw_mii()
176 return ret; in sr_set_sw_mii()
181 int ret; in sr_set_hw_mii() local
183 ret = sr_write_cmd(dev, SR_CMD_SET_HW_MII, 0x0000, 0, 0, NULL); in sr_set_hw_mii()
184 if (ret < 0) in sr_set_hw_mii()
186 return ret; in sr_set_hw_mii()
192 int ret; in sr_get_phy_addr() local
194 ret = sr_read_cmd(dev, SR_CMD_READ_PHY_ID, 0, 0, 2, buf); in sr_get_phy_addr()
195 if (ret < 0) { in sr_get_phy_addr()
197 __func__, ret); in sr_get_phy_addr()
203 ret = buf[1]; in sr_get_phy_addr()
206 return ret; in sr_get_phy_addr()
211 int ret; in sr_sw_reset() local
213 ret = sr_write_cmd(dev, SR_CMD_SW_RESET, flags, 0, 0, NULL); in sr_sw_reset()
214 if (ret < 0) in sr_sw_reset()
216 ret); in sr_sw_reset()
218 return ret; in sr_sw_reset()
224 int ret; in sr_read_rx_ctl() local
226 ret = sr_read_cmd(dev, SR_CMD_READ_RX_CTL, 0, 0, 2, &v); in sr_read_rx_ctl()
227 if (ret < 0) { in sr_read_rx_ctl()
229 ret); in sr_read_rx_ctl()
233 ret = le16_to_cpu(v); in sr_read_rx_ctl()
235 return ret; in sr_read_rx_ctl()
240 int ret; in sr_write_rx_ctl() local
243 ret = sr_write_cmd(dev, SR_CMD_WRITE_RX_CTL, mode, 0, 0, NULL); in sr_write_rx_ctl()
244 if (ret < 0) in sr_write_rx_ctl()
247 mode, ret); in sr_write_rx_ctl()
249 return ret; in sr_write_rx_ctl()
255 int ret; in sr_read_medium_status() local
257 ret = sr_read_cmd(dev, SR_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v); in sr_read_medium_status()
258 if (ret < 0) { in sr_read_medium_status()
260 "Error reading Medium Status register:%02x\n", ret); in sr_read_medium_status()
261 return ret; /* TODO: callers not checking for error ret */ in sr_read_medium_status()
269 int ret; in sr_write_medium_mode() local
272 ret = sr_write_cmd(dev, SR_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL); in sr_write_medium_mode()
273 if (ret < 0) in sr_write_medium_mode()
276 mode, ret); in sr_write_medium_mode()
277 return ret; in sr_write_medium_mode()
282 int ret; in sr_write_gpio() local
285 ret = sr_write_cmd(dev, SR_CMD_WRITE_GPIOS, value, 0, 0, NULL); in sr_write_gpio()
286 if (ret < 0) in sr_write_gpio()
288 value, ret); in sr_write_gpio()
292 return ret; in sr_write_gpio()
449 int ret; in sr_get_eeprom() local
462 ret = sr_read_cmd(dev, SR_CMD_READ_EEPROM, eeprom->offset + i, in sr_get_eeprom()
464 if (ret < 0) in sr_get_eeprom()
563 int ret; in sr9800_set_default_mode() local
570 ret = sr_write_medium_mode(dev, SR9800_MEDIUM_DEFAULT); in sr9800_set_default_mode()
571 if (ret < 0) in sr9800_set_default_mode()
574 ret = sr_write_cmd(dev, SR_CMD_WRITE_IPG012, in sr9800_set_default_mode()
577 if (ret < 0) { in sr9800_set_default_mode()
578 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret); in sr9800_set_default_mode()
583 ret = sr_write_rx_ctl(dev, SR_DEFAULT_RX_CTL); in sr9800_set_default_mode()
584 if (ret < 0) in sr9800_set_default_mode()
597 return ret; in sr9800_set_default_mode()
603 int ret, embd_phy; in sr9800_reset() local
606 ret = sr_write_gpio(dev, in sr9800_reset()
608 if (ret < 0) in sr9800_reset()
613 ret = sr_write_cmd(dev, SR_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL); in sr9800_reset()
614 if (ret < 0) { in sr9800_reset()
615 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret); in sr9800_reset()
619 ret = sr_sw_reset(dev, SR_SWRESET_IPPD | SR_SWRESET_PRL); in sr9800_reset()
620 if (ret < 0) in sr9800_reset()
625 ret = sr_sw_reset(dev, SR_SWRESET_CLEAR); in sr9800_reset()
626 if (ret < 0) in sr9800_reset()
632 ret = sr_sw_reset(dev, SR_SWRESET_IPRL); in sr9800_reset()
633 if (ret < 0) in sr9800_reset()
636 ret = sr_sw_reset(dev, SR_SWRESET_PRTE); in sr9800_reset()
637 if (ret < 0) in sr9800_reset()
644 ret = sr_write_rx_ctl(dev, 0x0000); in sr9800_reset()
645 if (ret < 0) in sr9800_reset()
651 ret = sr_sw_reset(dev, SR_SWRESET_PRL); in sr9800_reset()
652 if (ret < 0) in sr9800_reset()
657 ret = sr_sw_reset(dev, SR_SWRESET_IPRL | SR_SWRESET_PRL); in sr9800_reset()
658 if (ret < 0) in sr9800_reset()
663 ret = sr9800_set_default_mode(dev); in sr9800_reset()
664 if (ret < 0) in sr9800_reset()
669 ret = sr_write_cmd(dev, SR_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN, in sr9800_reset()
671 if (ret < 0) in sr9800_reset()
677 return ret; in sr9800_reset()
694 int ret; in sr9800_phy_powerup() local
697 ret = sr_sw_reset(dev, SR_SWRESET_IPPD | SR_SWRESET_IPRL); in sr9800_phy_powerup()
698 if (ret < 0) { in sr9800_phy_powerup()
699 netdev_err(dev->net, "Failed to power down PHY : %d\n", ret); in sr9800_phy_powerup()
700 return ret; in sr9800_phy_powerup()
705 ret = sr_sw_reset(dev, SR_SWRESET_IPRL); in sr9800_phy_powerup()
706 if (ret < 0) { in sr9800_phy_powerup()
707 netdev_err(dev->net, "Failed to reset PHY: %d\n", ret); in sr9800_phy_powerup()
708 return ret; in sr9800_phy_powerup()
713 ret = sr_sw_reset(dev, SR_SWRESET_CLEAR); in sr9800_phy_powerup()
714 if (ret < 0) { in sr9800_phy_powerup()
715 netdev_err(dev->net, "Failed to power up PHY: %d\n", ret); in sr9800_phy_powerup()
716 return ret; in sr9800_phy_powerup()
721 ret = sr_sw_reset(dev, SR_SWRESET_IPRL); in sr9800_phy_powerup()
722 if (ret < 0) { in sr9800_phy_powerup()
723 netdev_err(dev->net, "Failed to reset PHY: %d\n", ret); in sr9800_phy_powerup()
724 return ret; in sr9800_phy_powerup()
734 int ret, embd_phy; in sr9800_bind() local
751 ret = sr_write_cmd(dev, SR_CMD_LED_MUX, led01_mux, led23_mux, 0, NULL); in sr9800_bind()
752 if (ret < 0) { in sr9800_bind()
753 netdev_err(dev->net, "set LINK LED failed : %d\n", ret); in sr9800_bind()
758 ret = sr_read_cmd(dev, SR_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, in sr9800_bind()
760 if (ret < 0) { in sr9800_bind()
761 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret); in sr9800_bind()
762 return ret; in sr9800_bind()
779 ret = sr_write_cmd(dev, SR_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL); in sr9800_bind()
780 if (ret < 0) { in sr9800_bind()
781 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret); in sr9800_bind()
782 return ret; in sr9800_bind()
786 ret = sr9800_phy_powerup(dev); in sr9800_bind()
787 if (ret < 0) in sr9800_bind()
792 ret = sr_write_rx_ctl(dev, 0x0000); in sr9800_bind()
793 if (ret < 0) in sr9800_bind()
804 ret = sr9800_set_default_mode(dev); in sr9800_bind()
805 if (ret < 0) in sr9800_bind()
809 ret = sr_write_cmd(dev, SR_CMD_BULKIN_SIZE, in sr9800_bind()
813 if (ret < 0) { in sr9800_bind()
814 netdev_err(dev->net, "Reset RX_CTL failed: %d\n", ret); in sr9800_bind()
820 ret = sr_write_cmd(dev, SR_CMD_BULKIN_SIZE, in sr9800_bind()
824 if (ret < 0) { in sr9800_bind()
825 netdev_err(dev->net, "Reset RX_CTL failed: %d\n", ret); in sr9800_bind()
836 return ret; in sr9800_bind()