Lines Matching refs:ah
1380 ath5k_hw_ini_registers(struct ath5k_hw *ah, unsigned int size, in ath5k_hw_ini_registers() argument
1397 ath5k_hw_reg_read(ah, ini_regs[i].ini_register); in ath5k_hw_ini_registers()
1402 ath5k_hw_reg_write(ah, ini_regs[i].ini_value, in ath5k_hw_ini_registers()
1416 ath5k_hw_ini_mode_registers(struct ath5k_hw *ah, in ath5k_hw_ini_mode_registers() argument
1424 ath5k_hw_reg_write(ah, ini_mode[i].mode_value[mode], in ath5k_hw_ini_mode_registers()
1440 ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool skip_pcu) in ath5k_hw_write_initvals() argument
1447 if (ah->ah_version == AR5K_AR5212) { in ath5k_hw_write_initvals()
1450 ath5k_hw_ini_mode_registers(ah, in ath5k_hw_write_initvals()
1457 ath5k_hw_ini_registers(ah, ARRAY_SIZE(ar5212_ini_common_start), in ath5k_hw_write_initvals()
1461 switch (ah->ah_radio) { in ath5k_hw_write_initvals()
1464 ath5k_hw_ini_mode_registers(ah, in ath5k_hw_write_initvals()
1468 ath5k_hw_ini_registers(ah, in ath5k_hw_write_initvals()
1473 ath5k_hw_ini_registers(ah, in ath5k_hw_write_initvals()
1480 ath5k_hw_ini_mode_registers(ah, in ath5k_hw_write_initvals()
1484 ath5k_hw_ini_registers(ah, in ath5k_hw_write_initvals()
1488 ath5k_hw_ini_registers(ah, in ath5k_hw_write_initvals()
1495 ath5k_hw_ini_mode_registers(ah, in ath5k_hw_write_initvals()
1499 ath5k_hw_ini_registers(ah, in ath5k_hw_write_initvals()
1503 ath5k_hw_ini_registers(ah, in ath5k_hw_write_initvals()
1511 ath5k_hw_ini_mode_registers(ah, in ath5k_hw_write_initvals()
1515 ath5k_hw_ini_registers(ah, in ath5k_hw_write_initvals()
1520 if (ah->ah_radio == AR5K_RF2316) { in ath5k_hw_write_initvals()
1521 ath5k_hw_reg_write(ah, 0x00004000, in ath5k_hw_write_initvals()
1523 ath5k_hw_reg_write(ah, 0x081b7caa, in ath5k_hw_write_initvals()
1527 ath5k_hw_ini_registers(ah, in ath5k_hw_write_initvals()
1533 ath5k_hw_ini_mode_registers(ah, in ath5k_hw_write_initvals()
1537 ath5k_hw_ini_registers(ah, in ath5k_hw_write_initvals()
1542 ath5k_hw_reg_write(ah, 0x00180a65, AR5K_PHY_GAIN); in ath5k_hw_write_initvals()
1545 ath5k_hw_reg_write(ah, 0x00004000, AR5K_PHY_AGC); in ath5k_hw_write_initvals()
1546 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_TPC_RG5, in ath5k_hw_write_initvals()
1548 ath5k_hw_reg_write(ah, 0x800000a8, 0x8140); in ath5k_hw_write_initvals()
1549 ath5k_hw_reg_write(ah, 0x000000ff, 0x9958); in ath5k_hw_write_initvals()
1551 ath5k_hw_ini_registers(ah, in ath5k_hw_write_initvals()
1557 ath5k_hw_ini_mode_registers(ah, in ath5k_hw_write_initvals()
1561 ath5k_hw_ini_registers(ah, in ath5k_hw_write_initvals()
1565 ath5k_hw_ini_registers(ah, in ath5k_hw_write_initvals()
1575 } else if (ah->ah_version == AR5K_AR5211) { in ath5k_hw_write_initvals()
1579 ATH5K_ERR(ah, "unsupported channel mode: %d\n", mode); in ath5k_hw_write_initvals()
1584 ath5k_hw_ini_mode_registers(ah, ARRAY_SIZE(ar5211_ini_mode), in ath5k_hw_write_initvals()
1590 ath5k_hw_ini_registers(ah, ARRAY_SIZE(ar5211_ini), in ath5k_hw_write_initvals()
1596 ath5k_hw_ini_registers(ah, ARRAY_SIZE(rf5111_ini_bbgain), in ath5k_hw_write_initvals()
1599 } else if (ah->ah_version == AR5K_AR5210) { in ath5k_hw_write_initvals()
1600 ath5k_hw_ini_registers(ah, ARRAY_SIZE(ar5210_ini), in ath5k_hw_write_initvals()