Lines Matching refs:chan
185 static int ar5008_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan) in ar5008_hw_set_channel() argument
195 ath9k_hw_get_channel_centers(ah, chan, ¢ers); in ar5008_hw_set_channel()
252 ah->curchan = chan; in ar5008_hw_set_channel()
266 struct ath9k_channel *chan) in ar5008_hw_spur_mitigate() argument
291 bool is2GHz = IS_CHAN_2GHZ(chan); in ar5008_hw_spur_mitigate()
300 cur_bb_spur = cur_bb_spur - (chan->channel * 10); in ar5008_hw_spur_mitigate()
330 denominator = IS_CHAN_2GHZ(chan) ? 440 : 400; in ar5008_hw_spur_mitigate()
503 struct ath9k_channel *chan, in ar5008_hw_set_rf_regs() argument
528 if (IS_CHAN_2GHZ(chan)) { in ar5008_hw_set_rf_regs()
557 struct ath9k_channel *chan) in ar5008_hw_init_bb() argument
565 ath9k_hw_synth_delay(ah, chan, synthDelay); in ar5008_hw_init_bb()
612 struct ath9k_channel *chan) in ar5008_hw_override_ini() argument
665 struct ath9k_channel *chan) in ar5008_hw_set_channel_regs() argument
677 if (IS_CHAN_HT40(chan)) { in ar5008_hw_set_channel_regs()
680 if (IS_CHAN_HT40PLUS(chan)) in ar5008_hw_set_channel_regs()
689 ath9k_hw_set11nmac2040(ah, chan); in ar5008_hw_set_channel_regs()
699 struct ath9k_channel *chan) in ar5008_hw_process_ini() argument
705 if (IS_CHAN_5GHZ(chan)) { in ar5008_hw_process_ini()
707 modesIndex = IS_CHAN_HT40(chan) ? 2 : 1; in ar5008_hw_process_ini()
710 modesIndex = IS_CHAN_HT40(chan) ? 3 : 4; in ar5008_hw_process_ini()
722 ah->eep_ops->set_addac(ah, chan); in ar5008_hw_process_ini()
783 if (IS_CHAN_A_FAST_CLOCK(ah, chan)) in ar5008_hw_process_ini()
787 ar5008_hw_override_ini(ah, chan); in ar5008_hw_process_ini()
788 ar5008_hw_set_channel_regs(ah, chan); in ar5008_hw_process_ini()
791 ath9k_hw_apply_txpower(ah, chan, false); in ar5008_hw_process_ini()
794 if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) { in ar5008_hw_process_ini()
802 static void ar5008_hw_set_rfmode(struct ath_hw *ah, struct ath9k_channel *chan) in ar5008_hw_set_rfmode() argument
806 if (chan == NULL) in ar5008_hw_set_rfmode()
809 if (IS_CHAN_2GHZ(chan)) in ar5008_hw_set_rfmode()
815 rfMode |= (IS_CHAN_5GHZ(chan)) ? in ar5008_hw_set_rfmode()
818 if (IS_CHAN_A_FAST_CLOCK(ah, chan)) in ar5008_hw_set_rfmode()
830 struct ath9k_channel *chan) in ar5008_hw_set_delta_slope() argument
836 if (IS_CHAN_HALF_RATE(chan)) in ar5008_hw_set_delta_slope()
838 else if (IS_CHAN_QUARTER_RATE(chan)) in ar5008_hw_set_delta_slope()
841 ath9k_hw_get_channel_centers(ah, chan, ¢ers); in ar5008_hw_set_delta_slope()
890 struct ath9k_channel *chan) in ar9160_hw_compute_pll_control() argument
896 if (chan && IS_CHAN_HALF_RATE(chan)) in ar9160_hw_compute_pll_control()
898 else if (chan && IS_CHAN_QUARTER_RATE(chan)) in ar9160_hw_compute_pll_control()
901 if (chan && IS_CHAN_5GHZ(chan)) in ar9160_hw_compute_pll_control()
910 struct ath9k_channel *chan) in ar5008_hw_compute_pll_control() argument
916 if (chan && IS_CHAN_HALF_RATE(chan)) in ar5008_hw_compute_pll_control()
918 else if (chan && IS_CHAN_QUARTER_RATE(chan)) in ar5008_hw_compute_pll_control()
921 if (chan && IS_CHAN_5GHZ(chan)) in ar5008_hw_compute_pll_control()
934 struct ath9k_channel *chan = ah->curchan; in ar5008_hw_ani_control_new() local
1008 chan->channel, in ar5008_hw_ani_control_new()
1032 chan->channel, in ar5008_hw_ani_control_new()
1040 chan->channel, in ar5008_hw_ani_control_new()
1067 chan->channel, in ar5008_hw_ani_control_new()
1075 chan->channel, in ar5008_hw_ani_control_new()
1148 struct ath9k_channel *chan = ah->curchan; in ar5008_hw_ani_cache_ini_regs() local
1159 chan->channel); in ar5008_hw_ani_cache_ini_regs()
1293 struct ath9k_channel *chan, int ht40_delta) in ar5008_hw_init_rate_txpower() argument
1295 if (IS_CHAN_5GHZ(chan)) { in ar5008_hw_init_rate_txpower()
1298 if (IS_CHAN_HT20(chan) || IS_CHAN_HT40(chan)) { in ar5008_hw_init_rate_txpower()
1302 IS_CHAN_HT40(chan), in ar5008_hw_init_rate_txpower()
1309 if (IS_CHAN_HT20(chan) || IS_CHAN_HT40(chan)) { in ar5008_hw_init_rate_txpower()
1313 IS_CHAN_HT40(chan), in ar5008_hw_init_rate_txpower()