22 static void ar9002_hw_rx_enable(struct ath_hw *ah)  in ar9002_hw_rx_enable()  argument
24 	REG_WRITE(ah, AR_CR, AR_CR_RXE);  in ar9002_hw_rx_enable()
32 static bool ar9002_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked,  in ar9002_hw_get_isr()  argument
37 	struct ath9k_hw_capabilities *pCap = &ah->caps;  in ar9002_hw_get_isr()
40 	struct ath_common *common = ath9k_hw_common(ah);  in ar9002_hw_get_isr()
42 	if (!AR_SREV_9100(ah)) {  in ar9002_hw_get_isr()
43 		if (REG_READ(ah, AR_INTR_ASYNC_CAUSE) & AR_INTR_MAC_IRQ) {  in ar9002_hw_get_isr()
44 			if ((REG_READ(ah, AR_RTC_STATUS) & AR_RTC_STATUS_M)  in ar9002_hw_get_isr()
46 				isr = REG_READ(ah, AR_ISR);  in ar9002_hw_get_isr()
50 		sync_cause = REG_READ(ah, AR_INTR_SYNC_CAUSE) &  in ar9002_hw_get_isr()
59 		isr = REG_READ(ah, AR_ISR);  in ar9002_hw_get_isr()
65 			isr2 = REG_READ(ah, AR_ISR_S2);  in ar9002_hw_get_isr()
82 				REG_WRITE(ah, AR_ISR_S2, isr2);  in ar9002_hw_get_isr()
88 			isr = REG_READ(ah, AR_ISR_RAC);  in ar9002_hw_get_isr()
109 				s0_s = REG_READ(ah, AR_ISR_S0_S);  in ar9002_hw_get_isr()
110 				s1_s = REG_READ(ah, AR_ISR_S1_S);  in ar9002_hw_get_isr()
112 				s0_s = REG_READ(ah, AR_ISR_S0);  in ar9002_hw_get_isr()
113 				REG_WRITE(ah, AR_ISR_S0, s0_s);  in ar9002_hw_get_isr()
114 				s1_s = REG_READ(ah, AR_ISR_S1);  in ar9002_hw_get_isr()
115 				REG_WRITE(ah, AR_ISR_S1, s1_s);  in ar9002_hw_get_isr()
123 			ah->intr_txqs |= MS(s0_s, AR_ISR_S0_QCU_TXOK);  in ar9002_hw_get_isr()
124 			ah->intr_txqs |= MS(s0_s, AR_ISR_S0_QCU_TXDESC);  in ar9002_hw_get_isr()
125 			ah->intr_txqs |= MS(s1_s, AR_ISR_S1_QCU_TXERR);  in ar9002_hw_get_isr()
126 			ah->intr_txqs |= MS(s1_s, AR_ISR_S1_QCU_TXEOL);  in ar9002_hw_get_isr()
137 	if (!AR_SREV_9100(ah) && (isr & AR_ISR_GENTMR)) {  in ar9002_hw_get_isr()
141 			s5_s = REG_READ(ah, AR_ISR_S5_S);  in ar9002_hw_get_isr()
143 			s5_s = REG_READ(ah, AR_ISR_S5);  in ar9002_hw_get_isr()
146 		ah->intr_gen_timer_trigger =  in ar9002_hw_get_isr()
149 		ah->intr_gen_timer_thresh =  in ar9002_hw_get_isr()
152 		if (ah->intr_gen_timer_trigger)  in ar9002_hw_get_isr()
160 			REG_WRITE(ah, AR_ISR_S5, s5_s);  in ar9002_hw_get_isr()
166 		REG_WRITE(ah, AR_ISR, isr);  in ar9002_hw_get_isr()
167 		REG_READ(ah, AR_ISR);  in ar9002_hw_get_isr()
170 	if (AR_SREV_9100(ah))  in ar9002_hw_get_isr()
195 			REG_WRITE(ah, AR_RC, AR_RC_HOSTIF);  in ar9002_hw_get_isr()
196 			REG_WRITE(ah, AR_RC, 0);  in ar9002_hw_get_isr()
204 		REG_WRITE(ah, AR_INTR_SYNC_CAUSE_CLR, sync_cause);  in ar9002_hw_get_isr()
205 		(void) REG_READ(ah, AR_INTR_SYNC_CAUSE_CLR);  in ar9002_hw_get_isr()
212 ar9002_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i)  in ar9002_set_txdesc()  argument
229 	if (AR_SREV_9285(ah)) {  in ar9002_set_txdesc()
315 static int ar9002_hw_proc_txdesc(struct ath_hw *ah, void *ds,  in ar9002_hw_proc_txdesc()  argument
355 			ath9k_hw_updatetxtriglevel(ah, true);  in ar9002_hw_proc_txdesc()
364 		ath9k_hw_updatetxtriglevel(ah, true);  in ar9002_hw_proc_txdesc()
368 		ath9k_hw_updatetxtriglevel(ah, true);  in ar9002_hw_proc_txdesc()
387 static int ar9002_hw_get_duration(struct ath_hw *ah, const void *ds, int index)  in ar9002_hw_get_duration()  argument
405 void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds,  in ath9k_hw_setuprxdesc()  argument
418 void ar9002_hw_attach_mac_ops(struct ath_hw *ah)  in ar9002_hw_attach_mac_ops()  argument
420 	struct ath_hw_ops *ops = ath9k_hw_ops(ah);  in ar9002_hw_attach_mac_ops()