Lines Matching refs:SM
255 SM(SPUR_RSSI_THRESH, AR_PHY_SPUR_REG_SPUR_RSSI_THRESH)); in ar9002_hw_spur_mitigate()
284 SM(spur_freq_sd, AR_PHY_TIMING11_SPUR_FREQ_SD) | in ar9002_hw_spur_mitigate()
285 SM(spur_delta_phase, AR_PHY_TIMING11_SPUR_DELTA_PHASE)); in ar9002_hw_spur_mitigate()
464 pll = SM(ref_div, AR_RTC_9160_PLL_REFDIV); in ar9002_hw_compute_pll_control()
465 pll |= SM(pll_div, AR_RTC_9160_PLL_DIV); in ar9002_hw_compute_pll_control()
468 pll |= SM(0x1, AR_RTC_9160_PLL_CLKSEL); in ar9002_hw_compute_pll_control()
470 pll |= SM(0x2, AR_RTC_9160_PLL_CLKSEL); in ar9002_hw_compute_pll_control()
606 regval |= SM(antdiv_ctrl1, AR_PHY_9285_ANT_DIV_CTL); in ar9002_hw_set_bt_ant_diversity()
607 regval |= SM(antdiv_ctrl2, AR_PHY_9285_ANT_DIV_ALT_LNACONF); in ar9002_hw_set_bt_ant_diversity()
608 regval |= SM((antdiv_ctrl2 >> 2), AR_PHY_9285_ANT_DIV_MAIN_LNACONF); in ar9002_hw_set_bt_ant_diversity()
609 regval |= SM((antdiv_ctrl1 >> 1), AR_PHY_9285_ANT_DIV_ALT_GAINTB); in ar9002_hw_set_bt_ant_diversity()
610 regval |= SM((antdiv_ctrl1 >> 2), AR_PHY_9285_ANT_DIV_MAIN_GAINTB); in ar9002_hw_set_bt_ant_diversity()
615 regval |= SM((antdiv_ctrl1 >> 3), AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV); in ar9002_hw_set_bt_ant_diversity()