27 ar9003_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i)  in ar9003_set_txdesc()  argument
34 	desc_len = ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x18 : 0x17);  in ar9003_set_txdesc()
182 static bool ar9003_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked,  in ar9003_hw_get_isr()  argument
187 	struct ath9k_hw_capabilities *pCap = &ah->caps;  in ar9003_hw_get_isr()
188 	struct ath_common *common = ath9k_hw_common(ah);  in ar9003_hw_get_isr()
192 	if (ath9k_hw_mci_is_enabled(ah))  in ar9003_hw_get_isr()
195 	async_cause = REG_READ(ah, AR_INTR_ASYNC_CAUSE);  in ar9003_hw_get_isr()
198 		if ((REG_READ(ah, AR_RTC_STATUS) & AR_RTC_STATUS_M)  in ar9003_hw_get_isr()
200 			isr = REG_READ(ah, AR_ISR);  in ar9003_hw_get_isr()
204 	sync_cause = REG_READ(ah, AR_INTR_SYNC_CAUSE) & AR_INTR_SYNC_DEFAULT;  in ar9003_hw_get_isr()
214 			isr2 = REG_READ(ah, AR_ISR_S2);  in ar9003_hw_get_isr()
234 				REG_WRITE(ah, AR_ISR_S2, isr2);  in ar9003_hw_get_isr()
240 			isr = REG_READ(ah, AR_ISR_RAC);  in ar9003_hw_get_isr()
249 		if (ah->config.rx_intr_mitigation)  in ar9003_hw_get_isr()
253 		if (ah->config.tx_intr_mitigation)  in ar9003_hw_get_isr()
268 				s0 = REG_READ(ah, AR_ISR_S0);  in ar9003_hw_get_isr()
269 				REG_WRITE(ah, AR_ISR_S0, s0);  in ar9003_hw_get_isr()
270 				s1 = REG_READ(ah, AR_ISR_S1);  in ar9003_hw_get_isr()
271 				REG_WRITE(ah, AR_ISR_S1, s1);  in ar9003_hw_get_isr()
282 				s5 = REG_READ(ah, AR_ISR_S5_S);  in ar9003_hw_get_isr()
284 				s5 = REG_READ(ah, AR_ISR_S5);  in ar9003_hw_get_isr()
286 			ah->intr_gen_timer_trigger =  in ar9003_hw_get_isr()
289 			ah->intr_gen_timer_thresh =  in ar9003_hw_get_isr()
292 			if (ah->intr_gen_timer_trigger)  in ar9003_hw_get_isr()
296 				REG_WRITE(ah, AR_ISR_S5, s5);  in ar9003_hw_get_isr()
305 			REG_WRITE(ah, AR_ISR, isr);  in ar9003_hw_get_isr()
307 			(void) REG_READ(ah, AR_ISR);  in ar9003_hw_get_isr()
311 			ar9003_hw_bb_watchdog_read(ah);  in ar9003_hw_get_isr()
315 		ar9003_mci_get_isr(ah, masked);  in ar9003_hw_get_isr()
338 			REG_WRITE(ah, AR_RC, AR_RC_HOSTIF);  in ar9003_hw_get_isr()
339 			REG_WRITE(ah, AR_RC, 0);  in ar9003_hw_get_isr()
347 		REG_WRITE(ah, AR_INTR_SYNC_CAUSE_CLR, sync_cause);  in ar9003_hw_get_isr()
348 		(void) REG_READ(ah, AR_INTR_SYNC_CAUSE_CLR);  in ar9003_hw_get_isr()
354 static int ar9003_hw_proc_txdesc(struct ath_hw *ah, void *ds,  in ar9003_hw_proc_txdesc()  argument
360 	ads = &ah->ts_ring[ah->ts_tail];  in ar9003_hw_proc_txdesc()
366 	ah->ts_tail = (ah->ts_tail + 1) % ah->ts_size;  in ar9003_hw_proc_txdesc()
370 		ath_dbg(ath9k_hw_common(ah), XMIT,  in ar9003_hw_proc_txdesc()
405 		ath9k_hw_updatetxtriglevel(ah, true);  in ar9003_hw_proc_txdesc()
413 		ath9k_hw_updatetxtriglevel(ah, true);  in ar9003_hw_proc_txdesc()
417 		ath9k_hw_updatetxtriglevel(ah, true);  in ar9003_hw_proc_txdesc()
434 static int ar9003_hw_get_duration(struct ath_hw *ah, const void *ds, int index)  in ar9003_hw_get_duration()  argument
464 void ath9k_hw_set_rx_bufsize(struct ath_hw *ah, u16 buf_size)  in ath9k_hw_set_rx_bufsize()  argument
466 	REG_WRITE(ah, AR_DATABUF_SIZE, buf_size & AR_DATABUF_SIZE_MASK);  in ath9k_hw_set_rx_bufsize()
470 void ath9k_hw_addrxbuf_edma(struct ath_hw *ah, u32 rxdp,  in ath9k_hw_addrxbuf_edma()  argument
474 		REG_WRITE(ah, AR_HP_RXDP, rxdp);  in ath9k_hw_addrxbuf_edma()
476 		REG_WRITE(ah, AR_LP_RXDP, rxdp);  in ath9k_hw_addrxbuf_edma()
480 int ath9k_hw_process_rxdesc_edma(struct ath_hw *ah, struct ath_rx_status *rxs,  in ath9k_hw_process_rxdesc_edma()  argument
588 void ath9k_hw_reset_txstatus_ring(struct ath_hw *ah)  in ath9k_hw_reset_txstatus_ring()  argument
590 	ah->ts_tail = 0;  in ath9k_hw_reset_txstatus_ring()
592 	memset((void *) ah->ts_ring, 0,  in ath9k_hw_reset_txstatus_ring()
593 		ah->ts_size * sizeof(struct ar9003_txs));  in ath9k_hw_reset_txstatus_ring()
595 	ath_dbg(ath9k_hw_common(ah), XMIT,  in ath9k_hw_reset_txstatus_ring()
597 		ah->ts_paddr_start, ah->ts_paddr_end,  in ath9k_hw_reset_txstatus_ring()
598 		ah->ts_ring, ah->ts_size);  in ath9k_hw_reset_txstatus_ring()
600 	REG_WRITE(ah, AR_Q_STATUS_RING_START, ah->ts_paddr_start);  in ath9k_hw_reset_txstatus_ring()
601 	REG_WRITE(ah, AR_Q_STATUS_RING_END, ah->ts_paddr_end);  in ath9k_hw_reset_txstatus_ring()
604 void ath9k_hw_setup_statusring(struct ath_hw *ah, void *ts_start,  in ath9k_hw_setup_statusring()  argument
609 	ah->ts_paddr_start = ts_paddr_start;  in ath9k_hw_setup_statusring()
610 	ah->ts_paddr_end = ts_paddr_start + (size * sizeof(struct ar9003_txs));  in ath9k_hw_setup_statusring()
611 	ah->ts_size = size;  in ath9k_hw_setup_statusring()
612 	ah->ts_ring = (struct ar9003_txs *) ts_start;  in ath9k_hw_setup_statusring()
614 	ath9k_hw_reset_txstatus_ring(ah);  in ath9k_hw_setup_statusring()