Lines Matching refs:chan
148 static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan) in ar9003_hw_set_channel() argument
155 ath9k_hw_get_channel_centers(ah, chan, ¢ers); in ar9003_hw_set_channel()
240 ah->curchan = chan; in ar9003_hw_set_channel()
256 struct ath9k_channel *chan) in ar9003_hw_spur_mitigate_mrc_cck() argument
262 u8 *spur_fbin_ptr = ar9003_get_spur_chan_ptr(ah, IS_CHAN_2GHZ(chan)); in ar9003_hw_spur_mitigate_mrc_cck()
274 if (IS_CHAN_HT40(chan)) { in ar9003_hw_spur_mitigate_mrc_cck()
278 synth_freq = chan->channel + 10; in ar9003_hw_spur_mitigate_mrc_cck()
280 synth_freq = chan->channel - 10; in ar9003_hw_spur_mitigate_mrc_cck()
283 synth_freq = chan->channel; in ar9003_hw_spur_mitigate_mrc_cck()
288 synth_freq = chan->channel; in ar9003_hw_spur_mitigate_mrc_cck()
299 IS_CHAN_2GHZ(chan)); in ar9003_hw_spur_mitigate_mrc_cck()
487 struct ath9k_channel *chan, in ar9003_hw_spur_ofdm_work() argument
496 if (IS_CHAN_HT40(chan)) { in ar9003_hw_spur_ofdm_work()
538 struct ath9k_channel *chan) in ar9003_hw_spur_mitigate_ofdm() argument
548 if (IS_CHAN_5GHZ(chan)) { in ar9003_hw_spur_mitigate_ofdm()
560 if (IS_CHAN_HT40(chan)) { in ar9003_hw_spur_mitigate_ofdm()
564 synth_freq = chan->channel - 10; in ar9003_hw_spur_mitigate_ofdm()
566 synth_freq = chan->channel + 10; in ar9003_hw_spur_mitigate_ofdm()
569 synth_freq = chan->channel; in ar9003_hw_spur_mitigate_ofdm()
578 ar9003_hw_spur_ofdm_work(ah, chan, freq_offset, in ar9003_hw_spur_mitigate_ofdm()
595 struct ath9k_channel *chan) in ar9003_hw_spur_mitigate() argument
598 ar9003_hw_spur_mitigate_mrc_cck(ah, chan); in ar9003_hw_spur_mitigate()
599 ar9003_hw_spur_mitigate_ofdm(ah, chan); in ar9003_hw_spur_mitigate()
603 struct ath9k_channel *chan) in ar9003_hw_compute_pll_control_soc() argument
609 if (chan && IS_CHAN_HALF_RATE(chan)) in ar9003_hw_compute_pll_control_soc()
611 else if (chan && IS_CHAN_QUARTER_RATE(chan)) in ar9003_hw_compute_pll_control_soc()
620 struct ath9k_channel *chan) in ar9003_hw_compute_pll_control() argument
626 if (chan && IS_CHAN_HALF_RATE(chan)) in ar9003_hw_compute_pll_control()
628 else if (chan && IS_CHAN_QUARTER_RATE(chan)) in ar9003_hw_compute_pll_control()
637 struct ath9k_channel *chan) in ar9003_hw_set_channel_regs() argument
652 if (IS_CHAN_HT40(chan)) { in ar9003_hw_set_channel_regs()
655 if (IS_CHAN_HT40PLUS(chan)) in ar9003_hw_set_channel_regs()
668 ath9k_hw_set11nmac2040(ah, chan); in ar9003_hw_set_channel_regs()
677 struct ath9k_channel *chan) in ar9003_hw_init_bb() argument
690 ath9k_hw_synth_delay(ah, chan, synthDelay); in ar9003_hw_init_bb()
796 struct ath9k_channel *chan) in ar9550_hw_get_modes_txgain_index() argument
800 if (IS_CHAN_2GHZ(chan)) { in ar9550_hw_get_modes_txgain_index()
801 if (IS_CHAN_HT40(chan)) in ar9550_hw_get_modes_txgain_index()
807 if (chan->channel <= 5350) in ar9550_hw_get_modes_txgain_index()
809 else if ((chan->channel > 5350) && (chan->channel <= 5600)) in ar9550_hw_get_modes_txgain_index()
814 if (IS_CHAN_HT40(chan)) in ar9550_hw_get_modes_txgain_index()
821 struct ath9k_channel *chan) in ar9561_hw_get_modes_txgain_index() argument
823 if (IS_CHAN_2GHZ(chan)) { in ar9561_hw_get_modes_txgain_index()
824 if (IS_CHAN_HT40(chan)) in ar9561_hw_get_modes_txgain_index()
882 struct ath9k_channel *chan) in ar9003_hw_process_ini() argument
887 if (IS_CHAN_5GHZ(chan)) in ar9003_hw_process_ini()
888 modesIndex = IS_CHAN_HT40(chan) ? 2 : 1; in ar9003_hw_process_ini()
890 modesIndex = IS_CHAN_HT40(chan) ? 3 : 4; in ar9003_hw_process_ini()
949 modes_txgain_index = ar9550_hw_get_modes_txgain_index(ah, chan); in ar9003_hw_process_ini()
953 ar9561_hw_get_modes_txgain_index(ah, chan); in ar9003_hw_process_ini()
968 if (IS_CHAN_A_FAST_CLOCK(ah, chan)) in ar9003_hw_process_ini()
980 if (chan->channel == 2484) in ar9003_hw_process_ini()
985 ar9003_hw_set_channel_regs(ah, chan); in ar9003_hw_process_ini()
987 ath9k_hw_apply_txpower(ah, chan, false); in ar9003_hw_process_ini()
993 struct ath9k_channel *chan) in ar9003_hw_set_rfmode() argument
997 if (chan == NULL) in ar9003_hw_set_rfmode()
1000 if (IS_CHAN_2GHZ(chan)) in ar9003_hw_set_rfmode()
1005 if (IS_CHAN_A_FAST_CLOCK(ah, chan)) in ar9003_hw_set_rfmode()
1021 struct ath9k_channel *chan) in ar9003_hw_set_delta_slope() argument
1031 if (IS_CHAN_HALF_RATE(chan)) in ar9003_hw_set_delta_slope()
1033 else if (IS_CHAN_QUARTER_RATE(chan)) in ar9003_hw_set_delta_slope()
1040 ath9k_hw_get_channel_centers(ah, chan, ¢ers); in ar9003_hw_set_delta_slope()
1091 struct ath9k_channel *chan = ah->curchan; in ar9003_hw_ani_control() local
1176 chan->channel, in ar9003_hw_ani_control()
1231 chan->channel, in ar9003_hw_ani_control()
1239 chan->channel, in ar9003_hw_ani_control()
1295 chan->channel, in ar9003_hw_ani_control()
1303 chan->channel, in ar9003_hw_ani_control()
1333 chan->channel, in ar9003_hw_ani_control()
1418 struct ath9k_channel *chan = ah->curchan; in ar9003_hw_ani_cache_ini_regs() local
1429 chan->channel); in ar9003_hw_ani_cache_ini_regs()
1690 struct ath9k_channel *chan, in ar9003_hw_fast_chan_change() argument
1696 if (IS_CHAN_5GHZ(chan)) in ar9003_hw_fast_chan_change()
1697 modesIndex = IS_CHAN_HT40(chan) ? 2 : 1; in ar9003_hw_fast_chan_change()
1699 modesIndex = IS_CHAN_HT40(chan) ? 3 : 4; in ar9003_hw_fast_chan_change()
1735 if (IS_CHAN_A_FAST_CLOCK(ah, chan)) in ar9003_hw_fast_chan_change()
1744 if (chan->channel == 2484) in ar9003_hw_fast_chan_change()
1751 ar9003_hw_set_rfmode(ah, chan); in ar9003_hw_fast_chan_change()
1968 struct ath9k_channel *chan) in ar9003_hw_init_rate_txpower() argument
1970 if (IS_CHAN_5GHZ(chan)) { in ar9003_hw_init_rate_txpower()
1973 if (IS_CHAN_HT20(chan) || IS_CHAN_HT40(chan)) { in ar9003_hw_init_rate_txpower()
1978 IS_CHAN_HT40(chan)); in ar9003_hw_init_rate_txpower()
1988 if (IS_CHAN_HT20(chan) || IS_CHAN_HT40(chan)) { in ar9003_hw_init_rate_txpower()
1993 IS_CHAN_HT40(chan)); in ar9003_hw_init_rate_txpower()