1523 	u32 regval;  in ar9003_hw_antdiv_comb_conf_get()  local
1525 	regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL);  in ar9003_hw_antdiv_comb_conf_get()
1526 	antconf->main_lna_conf = (regval & AR_PHY_ANT_DIV_MAIN_LNACONF) >>  in ar9003_hw_antdiv_comb_conf_get()
1528 	antconf->alt_lna_conf = (regval & AR_PHY_ANT_DIV_ALT_LNACONF) >>  in ar9003_hw_antdiv_comb_conf_get()
1530 	antconf->fast_div_bias = (regval & AR_PHY_ANT_FAST_DIV_BIAS) >>  in ar9003_hw_antdiv_comb_conf_get()
1555 	u32 regval;  in ar9003_hw_antdiv_comb_conf_set()  local
1557 	regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL);  in ar9003_hw_antdiv_comb_conf_set()
1558 	regval &= ~(AR_PHY_ANT_DIV_MAIN_LNACONF |  in ar9003_hw_antdiv_comb_conf_set()
1563 	regval |= ((antconf->main_lna_conf << AR_PHY_ANT_DIV_MAIN_LNACONF_S)  in ar9003_hw_antdiv_comb_conf_set()
1565 	regval |= ((antconf->alt_lna_conf << AR_PHY_ANT_DIV_ALT_LNACONF_S)  in ar9003_hw_antdiv_comb_conf_set()
1567 	regval |= ((antconf->fast_div_bias << AR_PHY_ANT_FAST_DIV_BIAS_S)  in ar9003_hw_antdiv_comb_conf_set()
1569 	regval |= ((antconf->main_gaintb << AR_PHY_ANT_DIV_MAIN_GAINTB_S)  in ar9003_hw_antdiv_comb_conf_set()
1571 	regval |= ((antconf->alt_gaintb << AR_PHY_ANT_DIV_ALT_GAINTB_S)  in ar9003_hw_antdiv_comb_conf_set()
1574 	REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval);  in ar9003_hw_antdiv_comb_conf_set()
1583 	u32 regval;  in ar9003_hw_set_bt_ant_diversity()  local
1589 		regval = ar9003_hw_ant_ctrl_common_2_get(ah,  in ar9003_hw_set_bt_ant_diversity()
1592 			regval &= ~AR_SWITCH_TABLE_COM2_ALL;  in ar9003_hw_set_bt_ant_diversity()
1593 			regval |= ah->config.ant_ctrl_comm2g_switch_enable;  in ar9003_hw_set_bt_ant_diversity()
1596 			      AR_SWITCH_TABLE_COM2_ALL, regval);  in ar9003_hw_set_bt_ant_diversity()
1605 	regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL);  in ar9003_hw_set_bt_ant_diversity()
1606 	regval &= (~AR_ANT_DIV_CTRL_ALL);  in ar9003_hw_set_bt_ant_diversity()
1607 	regval |= (ant_div_ctl1 & 0x3f) << AR_ANT_DIV_CTRL_ALL_S;  in ar9003_hw_set_bt_ant_diversity()
1608 	REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval);  in ar9003_hw_set_bt_ant_diversity()
1614 		regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL);  in ar9003_hw_set_bt_ant_diversity()
1615 		regval &= ~AR_PHY_ANT_DIV_LNADIV;  in ar9003_hw_set_bt_ant_diversity()
1616 		regval |= ((ant_div_ctl1 >> 6) & 0x1) << AR_PHY_ANT_DIV_LNADIV_S;  in ar9003_hw_set_bt_ant_diversity()
1618 			regval |= AR_ANT_DIV_ENABLE;  in ar9003_hw_set_bt_ant_diversity()
1620 		REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval);  in ar9003_hw_set_bt_ant_diversity()
1625 		regval = REG_READ(ah, AR_PHY_CCK_DETECT);  in ar9003_hw_set_bt_ant_diversity()
1626 		regval &= ~AR_FAST_DIV_ENABLE;  in ar9003_hw_set_bt_ant_diversity()
1627 		regval |= ((ant_div_ctl1 >> 7) & 0x1) << AR_FAST_DIV_ENABLE_S;  in ar9003_hw_set_bt_ant_diversity()
1629 			regval |= AR_FAST_DIV_ENABLE;  in ar9003_hw_set_bt_ant_diversity()
1631 		REG_WRITE(ah, AR_PHY_CCK_DETECT, regval);  in ar9003_hw_set_bt_ant_diversity()
1634 			regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL);  in ar9003_hw_set_bt_ant_diversity()
1635 			regval &= (~(AR_PHY_ANT_DIV_MAIN_LNACONF |  in ar9003_hw_set_bt_ant_diversity()
1643 			regval |= (ATH_ANT_DIV_COMB_LNA1 <<  in ar9003_hw_set_bt_ant_diversity()
1645 			regval |= (ATH_ANT_DIV_COMB_LNA2 <<  in ar9003_hw_set_bt_ant_diversity()
1647 			REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval);  in ar9003_hw_set_bt_ant_diversity()
1673 			regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL);  in ar9003_hw_set_bt_ant_diversity()
1674 			regval &= ~(AR_PHY_ANT_DIV_MAIN_LNACONF |  in ar9003_hw_set_bt_ant_diversity()
1678 			regval |= (ATH_ANT_DIV_COMB_LNA1 <<  in ar9003_hw_set_bt_ant_diversity()
1680 			regval |= (ATH_ANT_DIV_COMB_LNA2 <<  in ar9003_hw_set_bt_ant_diversity()
1682 			REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval);  in ar9003_hw_set_bt_ant_diversity()