Lines Matching refs:ah
21 static int ath9k_hw_4k_get_eeprom_ver(struct ath_hw *ah) in ath9k_hw_4k_get_eeprom_ver() argument
23 return ((ah->eeprom.map4k.baseEepHeader.version >> 12) & 0xF); in ath9k_hw_4k_get_eeprom_ver()
26 static int ath9k_hw_4k_get_eeprom_rev(struct ath_hw *ah) in ath9k_hw_4k_get_eeprom_rev() argument
28 return ((ah->eeprom.map4k.baseEepHeader.version) & 0xFFF); in ath9k_hw_4k_get_eeprom_rev()
33 static bool __ath9k_hw_4k_fill_eeprom(struct ath_hw *ah) in __ath9k_hw_4k_fill_eeprom() argument
35 u16 *eep_data = (u16 *)&ah->eeprom.map4k; in __ath9k_hw_4k_fill_eeprom()
39 if (!ath9k_hw_nvram_read(ah, addr + eep_start_loc, eep_data)) in __ath9k_hw_4k_fill_eeprom()
47 static bool __ath9k_hw_usb_4k_fill_eeprom(struct ath_hw *ah) in __ath9k_hw_usb_4k_fill_eeprom() argument
49 u16 *eep_data = (u16 *)&ah->eeprom.map4k; in __ath9k_hw_usb_4k_fill_eeprom()
51 ath9k_hw_usb_gen_fill_eeprom(ah, eep_data, 64, SIZE_EEPROM_4K); in __ath9k_hw_usb_4k_fill_eeprom()
56 static bool ath9k_hw_4k_fill_eeprom(struct ath_hw *ah) in ath9k_hw_4k_fill_eeprom() argument
58 struct ath_common *common = ath9k_hw_common(ah); in ath9k_hw_4k_fill_eeprom()
60 if (!ath9k_hw_use_flash(ah)) { in ath9k_hw_4k_fill_eeprom()
65 return __ath9k_hw_usb_4k_fill_eeprom(ah); in ath9k_hw_4k_fill_eeprom()
67 return __ath9k_hw_4k_fill_eeprom(ah); in ath9k_hw_4k_fill_eeprom()
125 static u32 ath9k_hw_4k_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr, in ath9k_hw_4k_dump_eeprom() argument
128 struct ar5416_eeprom_4k *eep = &ah->eeprom.map4k; in ath9k_hw_4k_dump_eeprom()
173 static u32 ath9k_hw_4k_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr, in ath9k_hw_4k_dump_eeprom() argument
183 static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah) in ath9k_hw_4k_check_eeprom() argument
186 struct ath_common *common = ath9k_hw_common(ah); in ath9k_hw_4k_check_eeprom()
187 struct ar5416_eeprom_4k *eep = &ah->eeprom.map4k; in ath9k_hw_4k_check_eeprom()
194 if (!ath9k_hw_use_flash(ah)) { in ath9k_hw_4k_check_eeprom()
195 if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET, in ath9k_hw_4k_check_eeprom()
208 eepdata = (u16 *) (&ah->eeprom); in ath9k_hw_4k_check_eeprom()
227 el = swab16(ah->eeprom.map4k.baseEepHeader.length); in ath9k_hw_4k_check_eeprom()
229 el = ah->eeprom.map4k.baseEepHeader.length; in ath9k_hw_4k_check_eeprom()
236 eepdata = (u16 *)(&ah->eeprom); in ath9k_hw_4k_check_eeprom()
286 if (sum != 0xffff || ah->eep_ops->get_eeprom_ver(ah) != AR5416_EEP_VER || in ath9k_hw_4k_check_eeprom()
287 ah->eep_ops->get_eeprom_rev(ah) < AR5416_EEP_NO_BACK_VER) { in ath9k_hw_4k_check_eeprom()
289 sum, ah->eep_ops->get_eeprom_ver(ah)); in ath9k_hw_4k_check_eeprom()
297 static u32 ath9k_hw_4k_get_eeprom(struct ath_hw *ah, in ath9k_hw_4k_get_eeprom() argument
300 struct ar5416_eeprom_4k *eep = &ah->eeprom.map4k; in ath9k_hw_4k_get_eeprom()
351 static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah, in ath9k_hw_set_4k_power_cal_table() argument
354 struct ath_common *common = ath9k_hw_common(ah); in ath9k_hw_set_4k_power_cal_table()
355 struct ar5416_eeprom_4k *pEepData = &ah->eeprom.map4k; in ath9k_hw_set_4k_power_cal_table()
373 pdGainOverlap_t2 = (u16)(MS(REG_READ(ah, AR_PHY_TPCRG5), in ath9k_hw_set_4k_power_cal_table()
392 ENABLE_REG_RMW_BUFFER(ah); in ath9k_hw_set_4k_power_cal_table()
393 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN, in ath9k_hw_set_4k_power_cal_table()
395 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_1, in ath9k_hw_set_4k_power_cal_table()
397 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_2, in ath9k_hw_set_4k_power_cal_table()
399 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3, 0); in ath9k_hw_set_4k_power_cal_table()
400 REG_RMW_BUFFER_FLUSH(ah); in ath9k_hw_set_4k_power_cal_table()
408 ath9k_hw_get_gain_boundaries_pdadcs(ah, chan, in ath9k_hw_set_4k_power_cal_table()
414 ENABLE_REGWRITE_BUFFER(ah); in ath9k_hw_set_4k_power_cal_table()
416 REG_WRITE(ah, AR_PHY_TPCRG5 + regChainOffset, in ath9k_hw_set_4k_power_cal_table()
431 REG_WRITE(ah, regOffset, reg32); in ath9k_hw_set_4k_power_cal_table()
451 REGWRITE_BUFFER_FLUSH(ah); in ath9k_hw_set_4k_power_cal_table()
456 static void ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah, in ath9k_hw_set_4k_power_per_rate_table() argument
478 struct ar5416_eeprom_4k *pEepData = &ah->eeprom.map4k; in ath9k_hw_set_4k_power_per_rate_table()
494 ath9k_hw_get_channel_centers(ah, chan, ¢ers); in ath9k_hw_set_4k_power_per_rate_table()
500 ath9k_hw_get_legacy_target_powers(ah, chan, in ath9k_hw_set_4k_power_per_rate_table()
504 ath9k_hw_get_legacy_target_powers(ah, chan, in ath9k_hw_set_4k_power_per_rate_table()
508 ath9k_hw_get_target_powers(ah, chan, in ath9k_hw_set_4k_power_per_rate_table()
515 ath9k_hw_get_target_powers(ah, chan, in ath9k_hw_set_4k_power_per_rate_table()
519 ath9k_hw_get_legacy_target_powers(ah, chan, in ath9k_hw_set_4k_power_per_rate_table()
523 ath9k_hw_get_legacy_target_powers(ah, chan, in ath9k_hw_set_4k_power_per_rate_table()
551 ar5416_get_ntxchains(ah->txchainmask) - 1], in ath9k_hw_set_4k_power_per_rate_table()
646 static void ath9k_hw_4k_set_txpower(struct ath_hw *ah, in ath9k_hw_4k_set_txpower() argument
652 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); in ath9k_hw_4k_set_txpower()
653 struct ar5416_eeprom_4k *pEepData = &ah->eeprom.map4k; in ath9k_hw_4k_set_txpower()
666 ath9k_hw_set_4k_power_per_rate_table(ah, chan, in ath9k_hw_4k_set_txpower()
671 ath9k_hw_set_4k_power_cal_table(ah, chan); in ath9k_hw_4k_set_txpower()
688 ENABLE_REGWRITE_BUFFER(ah); in ath9k_hw_4k_set_txpower()
691 REG_WRITE(ah, AR_PHY_POWER_TX_RATE1, in ath9k_hw_4k_set_txpower()
696 REG_WRITE(ah, AR_PHY_POWER_TX_RATE2, in ath9k_hw_4k_set_txpower()
703 REG_WRITE(ah, AR_PHY_POWER_TX_RATE3, in ath9k_hw_4k_set_txpower()
708 REG_WRITE(ah, AR_PHY_POWER_TX_RATE4, in ath9k_hw_4k_set_txpower()
715 REG_WRITE(ah, AR_PHY_POWER_TX_RATE5, in ath9k_hw_4k_set_txpower()
720 REG_WRITE(ah, AR_PHY_POWER_TX_RATE6, in ath9k_hw_4k_set_txpower()
728 REG_WRITE(ah, AR_PHY_POWER_TX_RATE7, in ath9k_hw_4k_set_txpower()
737 REG_WRITE(ah, AR_PHY_POWER_TX_RATE8, in ath9k_hw_4k_set_txpower()
746 REG_WRITE(ah, AR_PHY_POWER_TX_RATE9, in ath9k_hw_4k_set_txpower()
754 if (ah->tpc_enabled) { in ath9k_hw_4k_set_txpower()
758 ar5008_hw_init_rate_txpower(ah, ratesArray, chan, ht40_delta); in ath9k_hw_4k_set_txpower()
760 REG_WRITE(ah, AR_PHY_POWER_TX_RATE_MAX, in ath9k_hw_4k_set_txpower()
764 REG_WRITE(ah, AR_PHY_POWER_TX_RATE_MAX, MAX_RATE_POWER); in ath9k_hw_4k_set_txpower()
767 REGWRITE_BUFFER_FLUSH(ah); in ath9k_hw_4k_set_txpower()
770 static void ath9k_hw_4k_set_gain(struct ath_hw *ah, in ath9k_hw_4k_set_gain() argument
775 ENABLE_REG_RMW_BUFFER(ah); in ath9k_hw_4k_set_gain()
776 REG_RMW(ah, AR_PHY_SWITCH_CHAIN_0, in ath9k_hw_4k_set_gain()
779 REG_RMW(ah, AR_PHY_TIMING_CTRL4(0), in ath9k_hw_4k_set_gain()
788 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, in ath9k_hw_4k_set_gain()
790 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, in ath9k_hw_4k_set_gain()
792 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, in ath9k_hw_4k_set_gain()
795 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, in ath9k_hw_4k_set_gain()
799 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ath9k_hw_4k_set_gain()
802 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ath9k_hw_4k_set_gain()
804 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ath9k_hw_4k_set_gain()
807 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ath9k_hw_4k_set_gain()
812 REG_RMW_FIELD(ah, AR_PHY_RXGAIN, in ath9k_hw_4k_set_gain()
814 REG_RMW_FIELD(ah, AR_PHY_RXGAIN, in ath9k_hw_4k_set_gain()
817 REG_RMW_FIELD(ah, AR_PHY_RXGAIN + 0x1000, in ath9k_hw_4k_set_gain()
819 REG_RMW_FIELD(ah, AR_PHY_RXGAIN + 0x1000, in ath9k_hw_4k_set_gain()
821 REG_RMW_BUFFER_FLUSH(ah); in ath9k_hw_4k_set_gain()
828 static void ath9k_hw_4k_set_board_values(struct ath_hw *ah, in ath9k_hw_4k_set_board_values() argument
831 struct ath9k_hw_capabilities *pCap = &ah->caps; in ath9k_hw_4k_set_board_values()
833 struct ar5416_eeprom_4k *eep = &ah->eeprom.map4k; in ath9k_hw_4k_set_board_values()
844 REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon); in ath9k_hw_4k_set_board_values()
847 ath9k_hw_4k_set_gain(ah, pModal, eep, txRxAttenLocal); in ath9k_hw_4k_set_board_values()
854 regVal = REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL); in ath9k_hw_4k_set_board_values()
869 REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regVal); in ath9k_hw_4k_set_board_values()
870 regVal = REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL); in ath9k_hw_4k_set_board_values()
871 regVal = REG_READ(ah, AR_PHY_CCK_DETECT); in ath9k_hw_4k_set_board_values()
876 REG_WRITE(ah, AR_PHY_CCK_DETECT, regVal); in ath9k_hw_4k_set_board_values()
877 regVal = REG_READ(ah, AR_PHY_CCK_DETECT); in ath9k_hw_4k_set_board_values()
884 regVal = REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL); in ath9k_hw_4k_set_board_values()
894 REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regVal); in ath9k_hw_4k_set_board_values()
933 ENABLE_REG_RMW_BUFFER(ah); in ath9k_hw_4k_set_board_values()
934 if (AR_SREV_9271(ah)) { in ath9k_hw_4k_set_board_values()
935 ath9k_hw_analog_shift_rmw(ah, in ath9k_hw_4k_set_board_values()
940 ath9k_hw_analog_shift_rmw(ah, in ath9k_hw_4k_set_board_values()
945 ath9k_hw_analog_shift_rmw(ah, in ath9k_hw_4k_set_board_values()
950 ath9k_hw_analog_shift_rmw(ah, in ath9k_hw_4k_set_board_values()
955 ath9k_hw_analog_shift_rmw(ah, in ath9k_hw_4k_set_board_values()
961 ath9k_hw_analog_shift_rmw(ah, in ath9k_hw_4k_set_board_values()
966 ath9k_hw_analog_shift_rmw(ah, in ath9k_hw_4k_set_board_values()
971 ath9k_hw_analog_shift_rmw(ah, in ath9k_hw_4k_set_board_values()
976 ath9k_hw_analog_shift_rmw(ah, in ath9k_hw_4k_set_board_values()
981 ath9k_hw_analog_shift_rmw(ah, in ath9k_hw_4k_set_board_values()
987 ath9k_hw_analog_shift_rmw(ah, in ath9k_hw_4k_set_board_values()
992 ath9k_hw_analog_shift_rmw(ah, in ath9k_hw_4k_set_board_values()
997 ath9k_hw_analog_shift_rmw(ah, in ath9k_hw_4k_set_board_values()
1002 ath9k_hw_analog_shift_rmw(ah, in ath9k_hw_4k_set_board_values()
1007 ath9k_hw_analog_shift_rmw(ah, in ath9k_hw_4k_set_board_values()
1012 ath9k_hw_analog_shift_rmw(ah, in ath9k_hw_4k_set_board_values()
1017 ath9k_hw_analog_shift_rmw(ah, in ath9k_hw_4k_set_board_values()
1022 ath9k_hw_analog_shift_rmw(ah, in ath9k_hw_4k_set_board_values()
1027 ath9k_hw_analog_shift_rmw(ah, in ath9k_hw_4k_set_board_values()
1032 ath9k_hw_analog_shift_rmw(ah, in ath9k_hw_4k_set_board_values()
1038 REG_RMW_BUFFER_FLUSH(ah); in ath9k_hw_4k_set_board_values()
1040 ENABLE_REG_RMW_BUFFER(ah); in ath9k_hw_4k_set_board_values()
1041 REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_SWITCH, in ath9k_hw_4k_set_board_values()
1043 REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, AR_PHY_DESIRED_SZ_ADC, in ath9k_hw_4k_set_board_values()
1046 REG_RMW(ah, AR_PHY_RF_CTL4, in ath9k_hw_4k_set_board_values()
1052 REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, AR_PHY_TX_END_TO_A2_RX_ON, in ath9k_hw_4k_set_board_values()
1055 if (AR_SREV_9271_10(ah)) in ath9k_hw_4k_set_board_values()
1056 REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, AR_PHY_TX_END_TO_A2_RX_ON, in ath9k_hw_4k_set_board_values()
1058 REG_RMW_FIELD(ah, AR_PHY_CCA, AR9280_PHY_CCA_THRESH62, in ath9k_hw_4k_set_board_values()
1060 REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, AR_PHY_EXT_CCA0_THRESH62, in ath9k_hw_4k_set_board_values()
1065 REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_END_DATA_START, in ath9k_hw_4k_set_board_values()
1067 REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_END_PA_ON, in ath9k_hw_4k_set_board_values()
1074 REG_RMW_FIELD(ah, AR_PHY_SETTLING, in ath9k_hw_4k_set_board_values()
1079 REG_RMW_BUFFER_FLUSH(ah); in ath9k_hw_4k_set_board_values()
1089 ENABLE_REG_RMW_BUFFER(ah); in ath9k_hw_4k_set_board_values()
1090 REG_RMW(ah, AR_PHY_TX_PWRCTRL8, pwrctrl, clr); in ath9k_hw_4k_set_board_values()
1091 REG_RMW(ah, AR_PHY_TX_PWRCTRL10, pwrctrl, clr); in ath9k_hw_4k_set_board_values()
1092 REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL12, pwrctrl, clr); in ath9k_hw_4k_set_board_values()
1097 REG_RMW(ah, AR_PHY_TX_PWRCTRL9, pwrctrl, clr); in ath9k_hw_4k_set_board_values()
1102 REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL11, pwrctrl, clr); in ath9k_hw_4k_set_board_values()
1103 REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL13, pwrctrl, clr); in ath9k_hw_4k_set_board_values()
1104 REG_RMW_BUFFER_FLUSH(ah); in ath9k_hw_4k_set_board_values()
1108 static u16 ath9k_hw_4k_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz) in ath9k_hw_4k_get_spur_channel() argument
1110 return ah->eeprom.map4k.modalHeader.spurChans[i].spurChan; in ath9k_hw_4k_get_spur_channel()