Lines Matching refs:wil
77 static void wil6210_mask_irq_tx(struct wil6210_priv *wil) in wil6210_mask_irq_tx() argument
79 iowrite32(WIL6210_IRQ_DISABLE, wil->csr + in wil6210_mask_irq_tx()
84 static void wil6210_mask_irq_rx(struct wil6210_priv *wil) in wil6210_mask_irq_rx() argument
86 iowrite32(WIL6210_IRQ_DISABLE, wil->csr + in wil6210_mask_irq_rx()
91 static void wil6210_mask_irq_misc(struct wil6210_priv *wil) in wil6210_mask_irq_misc() argument
93 iowrite32(WIL6210_IRQ_DISABLE, wil->csr + in wil6210_mask_irq_misc()
98 static void wil6210_mask_irq_pseudo(struct wil6210_priv *wil) in wil6210_mask_irq_pseudo() argument
100 wil_dbg_irq(wil, "%s()\n", __func__); in wil6210_mask_irq_pseudo()
102 iowrite32(WIL6210_IRQ_DISABLE, wil->csr + in wil6210_mask_irq_pseudo()
105 clear_bit(wil_status_irqen, wil->status); in wil6210_mask_irq_pseudo()
108 void wil6210_unmask_irq_tx(struct wil6210_priv *wil) in wil6210_unmask_irq_tx() argument
110 iowrite32(WIL6210_IMC_TX, wil->csr + in wil6210_unmask_irq_tx()
115 void wil6210_unmask_irq_rx(struct wil6210_priv *wil) in wil6210_unmask_irq_rx() argument
117 iowrite32(WIL6210_IMC_RX, wil->csr + in wil6210_unmask_irq_rx()
122 static void wil6210_unmask_irq_misc(struct wil6210_priv *wil) in wil6210_unmask_irq_misc() argument
124 iowrite32(WIL6210_IMC_MISC, wil->csr + in wil6210_unmask_irq_misc()
129 static void wil6210_unmask_irq_pseudo(struct wil6210_priv *wil) in wil6210_unmask_irq_pseudo() argument
131 wil_dbg_irq(wil, "%s()\n", __func__); in wil6210_unmask_irq_pseudo()
133 set_bit(wil_status_irqen, wil->status); in wil6210_unmask_irq_pseudo()
135 iowrite32(WIL6210_IRQ_PSEUDO_MASK, wil->csr + in wil6210_unmask_irq_pseudo()
139 void wil_mask_irq(struct wil6210_priv *wil) in wil_mask_irq() argument
141 wil_dbg_irq(wil, "%s()\n", __func__); in wil_mask_irq()
143 wil6210_mask_irq_tx(wil); in wil_mask_irq()
144 wil6210_mask_irq_rx(wil); in wil_mask_irq()
145 wil6210_mask_irq_misc(wil); in wil_mask_irq()
146 wil6210_mask_irq_pseudo(wil); in wil_mask_irq()
149 void wil_unmask_irq(struct wil6210_priv *wil) in wil_unmask_irq() argument
151 wil_dbg_irq(wil, "%s()\n", __func__); in wil_unmask_irq()
153 iowrite32(WIL_ICR_ICC_VALUE, wil->csr + HOSTADDR(RGF_DMA_EP_RX_ICR) + in wil_unmask_irq()
155 iowrite32(WIL_ICR_ICC_VALUE, wil->csr + HOSTADDR(RGF_DMA_EP_TX_ICR) + in wil_unmask_irq()
157 iowrite32(WIL_ICR_ICC_VALUE, wil->csr + HOSTADDR(RGF_DMA_EP_MISC_ICR) + in wil_unmask_irq()
160 wil6210_unmask_irq_pseudo(wil); in wil_unmask_irq()
161 wil6210_unmask_irq_tx(wil); in wil_unmask_irq()
162 wil6210_unmask_irq_rx(wil); in wil_unmask_irq()
163 wil6210_unmask_irq_misc(wil); in wil_unmask_irq()
167 #define W(a, v) do { iowrite32(v, wil->csr + HOSTADDR(a)); wmb(); } while (0)
169 void wil_configure_interrupt_moderation(struct wil6210_priv *wil) in wil_configure_interrupt_moderation() argument
171 wil_dbg_irq(wil, "%s()\n", __func__); in wil_configure_interrupt_moderation()
176 if (wil->wdev->iftype == NL80211_IFTYPE_MONITOR) in wil_configure_interrupt_moderation()
181 W(RGF_DMA_ITR_TX_CNT_TRSH, wil->tx_max_burst_duration); in wil_configure_interrupt_moderation()
182 wil_info(wil, "set ITR_TX_CNT_TRSH = %d usec\n", in wil_configure_interrupt_moderation()
183 wil->tx_max_burst_duration); in wil_configure_interrupt_moderation()
190 W(RGF_DMA_ITR_TX_IDL_CNT_TRSH, wil->tx_interframe_timeout); in wil_configure_interrupt_moderation()
191 wil_info(wil, "set ITR_TX_IDL_CNT_TRSH = %d usec\n", in wil_configure_interrupt_moderation()
192 wil->tx_interframe_timeout); in wil_configure_interrupt_moderation()
199 W(RGF_DMA_ITR_RX_CNT_TRSH, wil->rx_max_burst_duration); in wil_configure_interrupt_moderation()
200 wil_info(wil, "set ITR_RX_CNT_TRSH = %d usec\n", in wil_configure_interrupt_moderation()
201 wil->rx_max_burst_duration); in wil_configure_interrupt_moderation()
208 W(RGF_DMA_ITR_RX_IDL_CNT_TRSH, wil->rx_interframe_timeout); in wil_configure_interrupt_moderation()
209 wil_info(wil, "set ITR_RX_IDL_CNT_TRSH = %d usec\n", in wil_configure_interrupt_moderation()
210 wil->rx_interframe_timeout); in wil_configure_interrupt_moderation()
220 struct wil6210_priv *wil = cookie; in wil6210_irq_rx() local
221 u32 isr = wil_ioread32_and_clear(wil->csr + in wil6210_irq_rx()
227 wil_dbg_irq(wil, "ISR RX 0x%08x\n", isr); in wil6210_irq_rx()
230 wil_err(wil, "spurious IRQ: RX\n"); in wil6210_irq_rx()
234 wil6210_mask_irq_rx(wil); in wil6210_irq_rx()
244 wil_dbg_irq(wil, "RX done\n"); in wil6210_irq_rx()
247 wil_err_ratelimited(wil, in wil6210_irq_rx()
252 if (likely(test_bit(wil_status_reset_done, wil->status))) { in wil6210_irq_rx()
253 if (likely(test_bit(wil_status_napi_en, wil->status))) { in wil6210_irq_rx()
254 wil_dbg_txrx(wil, "NAPI(Rx) schedule\n"); in wil6210_irq_rx()
256 napi_schedule(&wil->napi_rx); in wil6210_irq_rx()
258 wil_err(wil, in wil6210_irq_rx()
262 wil_err(wil, "Got Rx interrupt while in reset\n"); in wil6210_irq_rx()
267 wil_err(wil, "un-handled RX ISR bits 0x%08x\n", isr); in wil6210_irq_rx()
271 atomic_inc(&wil->isr_count_rx); in wil6210_irq_rx()
274 wil6210_unmask_irq_rx(wil); in wil6210_irq_rx()
281 struct wil6210_priv *wil = cookie; in wil6210_irq_tx() local
282 u32 isr = wil_ioread32_and_clear(wil->csr + in wil6210_irq_tx()
288 wil_dbg_irq(wil, "ISR TX 0x%08x\n", isr); in wil6210_irq_tx()
291 wil_err(wil, "spurious IRQ: TX\n"); in wil6210_irq_tx()
295 wil6210_mask_irq_tx(wil); in wil6210_irq_tx()
298 wil_dbg_irq(wil, "TX done\n"); in wil6210_irq_tx()
302 if (likely(test_bit(wil_status_reset_done, wil->status))) { in wil6210_irq_tx()
303 wil_dbg_txrx(wil, "NAPI(Tx) schedule\n"); in wil6210_irq_tx()
305 napi_schedule(&wil->napi_tx); in wil6210_irq_tx()
307 wil_err(wil, "Got Tx interrupt while in reset\n"); in wil6210_irq_tx()
312 wil_err(wil, "un-handled TX ISR bits 0x%08x\n", isr); in wil6210_irq_tx()
316 atomic_inc(&wil->isr_count_tx); in wil6210_irq_tx()
319 wil6210_unmask_irq_tx(wil); in wil6210_irq_tx()
324 static void wil_notify_fw_error(struct wil6210_priv *wil) in wil_notify_fw_error() argument
326 struct device *dev = &wil_to_ndev(wil)->dev; in wil_notify_fw_error()
332 wil_err(wil, "Notify about firmware error\n"); in wil_notify_fw_error()
336 static void wil_cache_mbox_regs(struct wil6210_priv *wil) in wil_cache_mbox_regs() argument
339 wil_memcpy_fromio_32(&wil->mbox_ctl, wil->csr + HOST_MBOX, in wil_cache_mbox_regs()
341 wil_mbox_ring_le2cpus(&wil->mbox_ctl.rx); in wil_cache_mbox_regs()
342 wil_mbox_ring_le2cpus(&wil->mbox_ctl.tx); in wil_cache_mbox_regs()
347 struct wil6210_priv *wil = cookie; in wil6210_irq_misc() local
348 u32 isr = wil_ioread32_and_clear(wil->csr + in wil6210_irq_misc()
353 wil_dbg_irq(wil, "ISR MISC 0x%08x\n", isr); in wil6210_irq_misc()
356 wil_err(wil, "spurious IRQ: MISC\n"); in wil6210_irq_misc()
360 wil6210_mask_irq_misc(wil); in wil6210_irq_misc()
363 wil_err(wil, "Firmware error detected\n"); in wil6210_irq_misc()
364 clear_bit(wil_status_fwready, wil->status); in wil6210_irq_misc()
373 wil_dbg_irq(wil, "IRQ: FW ready\n"); in wil6210_irq_misc()
374 wil_cache_mbox_regs(wil); in wil6210_irq_misc()
375 set_bit(wil_status_reset_done, wil->status); in wil6210_irq_misc()
383 wil->isr_misc = isr; in wil6210_irq_misc()
388 wil6210_unmask_irq_misc(wil); in wil6210_irq_misc()
395 struct wil6210_priv *wil = cookie; in wil6210_irq_misc_thread() local
396 u32 isr = wil->isr_misc; in wil6210_irq_misc_thread()
399 wil_dbg_irq(wil, "Thread ISR MISC 0x%08x\n", isr); in wil6210_irq_misc_thread()
402 wil_notify_fw_error(wil); in wil6210_irq_misc_thread()
404 wil_fw_error_recovery(wil); in wil6210_irq_misc_thread()
408 wil_dbg_irq(wil, "MBOX event\n"); in wil6210_irq_misc_thread()
409 wmi_recv_cmd(wil); in wil6210_irq_misc_thread()
414 wil_dbg_irq(wil, "un-handled MISC ISR bits 0x%08x\n", isr); in wil6210_irq_misc_thread()
416 wil->isr_misc = 0; in wil6210_irq_misc_thread()
418 wil6210_unmask_irq_misc(wil); in wil6210_irq_misc_thread()
428 struct wil6210_priv *wil = cookie; in wil6210_thread_irq() local
430 wil_dbg_irq(wil, "Thread IRQ\n"); in wil6210_thread_irq()
432 if (wil->isr_misc) in wil6210_thread_irq()
435 wil6210_unmask_irq_pseudo(wil); in wil6210_thread_irq()
446 static int wil6210_debug_irq_mask(struct wil6210_priv *wil, u32 pseudo_cause) in wil6210_debug_irq_mask() argument
448 if (!test_bit(wil_status_irqen, wil->status)) { in wil6210_debug_irq_mask()
449 u32 icm_rx = wil_ioread32_and_clear(wil->csr + in wil6210_debug_irq_mask()
452 u32 icr_rx = wil_ioread32_and_clear(wil->csr + in wil6210_debug_irq_mask()
455 u32 imv_rx = ioread32(wil->csr + in wil6210_debug_irq_mask()
458 u32 icm_tx = wil_ioread32_and_clear(wil->csr + in wil6210_debug_irq_mask()
461 u32 icr_tx = wil_ioread32_and_clear(wil->csr + in wil6210_debug_irq_mask()
464 u32 imv_tx = ioread32(wil->csr + in wil6210_debug_irq_mask()
467 u32 icm_misc = wil_ioread32_and_clear(wil->csr + in wil6210_debug_irq_mask()
470 u32 icr_misc = wil_ioread32_and_clear(wil->csr + in wil6210_debug_irq_mask()
473 u32 imv_misc = ioread32(wil->csr + in wil6210_debug_irq_mask()
476 wil_err(wil, "IRQ when it should be masked: pseudo 0x%08x\n" in wil6210_debug_irq_mask()
494 struct wil6210_priv *wil = cookie; in wil6210_hardirq() local
495 u32 pseudo_cause = ioread32(wil->csr + HOSTADDR(RGF_DMA_PSEUDO_CAUSE)); in wil6210_hardirq()
504 if (unlikely(wil6210_debug_irq_mask(wil, pseudo_cause))) in wil6210_hardirq()
508 wil_dbg_irq(wil, "Pseudo IRQ 0x%08x\n", pseudo_cause); in wil6210_hardirq()
510 wil6210_mask_irq_pseudo(wil); in wil6210_hardirq()
539 wil6210_unmask_irq_pseudo(wil); in wil6210_hardirq()
544 static int wil6210_request_3msi(struct wil6210_priv *wil, int irq) in wil6210_request_3msi() argument
555 WIL_NAME"_tx", wil); in wil6210_request_3msi()
560 WIL_NAME"_rx", wil); in wil6210_request_3msi()
566 IRQF_SHARED, WIL_NAME"_misc", wil); in wil6210_request_3msi()
573 free_irq(irq + 1, wil); in wil6210_request_3msi()
575 free_irq(irq, wil); in wil6210_request_3msi()
588 void wil6210_clear_irq(struct wil6210_priv *wil) in wil6210_clear_irq() argument
590 wil_clear32(wil->csr + HOSTADDR(RGF_DMA_EP_RX_ICR) + in wil6210_clear_irq()
592 wil_clear32(wil->csr + HOSTADDR(RGF_DMA_EP_TX_ICR) + in wil6210_clear_irq()
594 wil_clear32(wil->csr + HOSTADDR(RGF_DMA_EP_MISC_ICR) + in wil6210_clear_irq()
599 int wil6210_init_irq(struct wil6210_priv *wil, int irq) in wil6210_init_irq() argument
603 wil_dbg_misc(wil, "%s() n_msi=%d\n", __func__, wil->n_msi); in wil6210_init_irq()
605 if (wil->n_msi == 3) in wil6210_init_irq()
606 rc = wil6210_request_3msi(wil, irq); in wil6210_init_irq()
610 wil->n_msi ? 0 : IRQF_SHARED, in wil6210_init_irq()
611 WIL_NAME, wil); in wil6210_init_irq()
615 void wil6210_fini_irq(struct wil6210_priv *wil, int irq) in wil6210_fini_irq() argument
617 wil_dbg_misc(wil, "%s()\n", __func__); in wil6210_fini_irq()
619 wil_mask_irq(wil); in wil6210_fini_irq()
620 free_irq(irq, wil); in wil6210_fini_irq()
621 if (wil->n_msi == 3) { in wil6210_fini_irq()
622 free_irq(irq + 1, wil); in wil6210_fini_irq()
623 free_irq(irq + 2, wil); in wil6210_fini_irq()