Lines Matching refs:dev
365 static void b43_wireless_core_exit(struct b43_wldev *dev);
366 static int b43_wireless_core_init(struct b43_wldev *dev);
367 static struct b43_wldev * b43_wireless_core_stop(struct b43_wldev *dev);
368 static int b43_wireless_core_start(struct b43_wldev *dev);
467 static void b43_ram_write(struct b43_wldev *dev, u16 offset, u32 val) in b43_ram_write() argument
473 macctl = b43_read32(dev, B43_MMIO_MACCTL); in b43_ram_write()
477 b43_write32(dev, B43_MMIO_RAM_CONTROL, offset); in b43_ram_write()
479 b43_write32(dev, B43_MMIO_RAM_DATA, val); in b43_ram_write()
482 static inline void b43_shm_control_word(struct b43_wldev *dev, in b43_shm_control_word() argument
491 b43_write32(dev, B43_MMIO_SHM_CONTROL, control); in b43_shm_control_word()
494 u32 b43_shm_read32(struct b43_wldev *dev, u16 routing, u16 offset) in b43_shm_read32() argument
502 b43_shm_control_word(dev, routing, offset >> 2); in b43_shm_read32()
503 ret = b43_read16(dev, B43_MMIO_SHM_DATA_UNALIGNED); in b43_shm_read32()
504 b43_shm_control_word(dev, routing, (offset >> 2) + 1); in b43_shm_read32()
505 ret |= ((u32)b43_read16(dev, B43_MMIO_SHM_DATA)) << 16; in b43_shm_read32()
511 b43_shm_control_word(dev, routing, offset); in b43_shm_read32()
512 ret = b43_read32(dev, B43_MMIO_SHM_DATA); in b43_shm_read32()
517 u16 b43_shm_read16(struct b43_wldev *dev, u16 routing, u16 offset) in b43_shm_read16() argument
525 b43_shm_control_word(dev, routing, offset >> 2); in b43_shm_read16()
526 ret = b43_read16(dev, B43_MMIO_SHM_DATA_UNALIGNED); in b43_shm_read16()
532 b43_shm_control_word(dev, routing, offset); in b43_shm_read16()
533 ret = b43_read16(dev, B43_MMIO_SHM_DATA); in b43_shm_read16()
538 void b43_shm_write32(struct b43_wldev *dev, u16 routing, u16 offset, u32 value) in b43_shm_write32() argument
544 b43_shm_control_word(dev, routing, offset >> 2); in b43_shm_write32()
545 b43_write16(dev, B43_MMIO_SHM_DATA_UNALIGNED, in b43_shm_write32()
547 b43_shm_control_word(dev, routing, (offset >> 2) + 1); in b43_shm_write32()
548 b43_write16(dev, B43_MMIO_SHM_DATA, in b43_shm_write32()
554 b43_shm_control_word(dev, routing, offset); in b43_shm_write32()
555 b43_write32(dev, B43_MMIO_SHM_DATA, value); in b43_shm_write32()
558 void b43_shm_write16(struct b43_wldev *dev, u16 routing, u16 offset, u16 value) in b43_shm_write16() argument
564 b43_shm_control_word(dev, routing, offset >> 2); in b43_shm_write16()
565 b43_write16(dev, B43_MMIO_SHM_DATA_UNALIGNED, value); in b43_shm_write16()
570 b43_shm_control_word(dev, routing, offset); in b43_shm_write16()
571 b43_write16(dev, B43_MMIO_SHM_DATA, value); in b43_shm_write16()
575 u64 b43_hf_read(struct b43_wldev *dev) in b43_hf_read() argument
579 ret = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTF3); in b43_hf_read()
581 ret |= b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTF2); in b43_hf_read()
583 ret |= b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTF1); in b43_hf_read()
589 void b43_hf_write(struct b43_wldev *dev, u64 value) in b43_hf_write() argument
596 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTF1, lo); in b43_hf_write()
597 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTF2, mi); in b43_hf_write()
598 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTF3, hi); in b43_hf_write()
602 static u16 b43_fwcapa_read(struct b43_wldev *dev) in b43_fwcapa_read() argument
604 B43_WARN_ON(!dev->fw.opensource); in b43_fwcapa_read()
605 return b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_FWCAPA); in b43_fwcapa_read()
608 void b43_tsf_read(struct b43_wldev *dev, u64 *tsf) in b43_tsf_read() argument
612 B43_WARN_ON(dev->dev->core_rev < 3); in b43_tsf_read()
616 low = b43_read32(dev, B43_MMIO_REV3PLUS_TSF_LOW); in b43_tsf_read()
617 high = b43_read32(dev, B43_MMIO_REV3PLUS_TSF_HIGH); in b43_tsf_read()
624 static void b43_time_lock(struct b43_wldev *dev) in b43_time_lock() argument
626 b43_maskset32(dev, B43_MMIO_MACCTL, ~0, B43_MACCTL_TBTTHOLD); in b43_time_lock()
628 b43_read32(dev, B43_MMIO_MACCTL); in b43_time_lock()
631 static void b43_time_unlock(struct b43_wldev *dev) in b43_time_unlock() argument
633 b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_TBTTHOLD, 0); in b43_time_unlock()
635 b43_read32(dev, B43_MMIO_MACCTL); in b43_time_unlock()
638 static void b43_tsf_write_locked(struct b43_wldev *dev, u64 tsf) in b43_tsf_write_locked() argument
642 B43_WARN_ON(dev->dev->core_rev < 3); in b43_tsf_write_locked()
648 b43_write32(dev, B43_MMIO_REV3PLUS_TSF_LOW, low); in b43_tsf_write_locked()
650 b43_write32(dev, B43_MMIO_REV3PLUS_TSF_HIGH, high); in b43_tsf_write_locked()
654 void b43_tsf_write(struct b43_wldev *dev, u64 tsf) in b43_tsf_write() argument
656 b43_time_lock(dev); in b43_tsf_write()
657 b43_tsf_write_locked(dev, tsf); in b43_tsf_write()
658 b43_time_unlock(dev); in b43_tsf_write()
662 void b43_macfilter_set(struct b43_wldev *dev, u16 offset, const u8 *mac) in b43_macfilter_set() argument
671 b43_write16(dev, B43_MMIO_MACFILTER_CONTROL, offset); in b43_macfilter_set()
675 b43_write16(dev, B43_MMIO_MACFILTER_DATA, data); in b43_macfilter_set()
678 b43_write16(dev, B43_MMIO_MACFILTER_DATA, data); in b43_macfilter_set()
681 b43_write16(dev, B43_MMIO_MACFILTER_DATA, data); in b43_macfilter_set()
684 static void b43_write_mac_bssid_templates(struct b43_wldev *dev) in b43_write_mac_bssid_templates() argument
692 bssid = dev->wl->bssid; in b43_write_mac_bssid_templates()
693 mac = dev->wl->mac_addr; in b43_write_mac_bssid_templates()
695 b43_macfilter_set(dev, B43_MACFILTER_BSSID, bssid); in b43_write_mac_bssid_templates()
706 b43_ram_write(dev, 0x20 + i, tmp); in b43_write_mac_bssid_templates()
710 static void b43_upload_card_macaddress(struct b43_wldev *dev) in b43_upload_card_macaddress() argument
712 b43_write_mac_bssid_templates(dev); in b43_upload_card_macaddress()
713 b43_macfilter_set(dev, B43_MACFILTER_SELF, dev->wl->mac_addr); in b43_upload_card_macaddress()
716 static void b43_set_slot_time(struct b43_wldev *dev, u16 slot_time) in b43_set_slot_time() argument
720 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) in b43_set_slot_time()
722 b43_write16(dev, B43_MMIO_IFSSLOT, 510 + slot_time); in b43_set_slot_time()
732 static void b43_short_slot_timing_enable(struct b43_wldev *dev) in b43_short_slot_timing_enable() argument
734 b43_set_slot_time(dev, 9); in b43_short_slot_timing_enable()
737 static void b43_short_slot_timing_disable(struct b43_wldev *dev) in b43_short_slot_timing_disable() argument
739 b43_set_slot_time(dev, 20); in b43_short_slot_timing_disable()
745 void b43_dummy_transmission(struct b43_wldev *dev, bool ofdm, bool pa_on) in b43_dummy_transmission() argument
747 struct b43_phy *phy = &dev->phy; in b43_dummy_transmission()
767 b43_ram_write(dev, i * 4, buffer[i]); in b43_dummy_transmission()
769 b43_write16(dev, B43_MMIO_XMTSEL, 0x0000); in b43_dummy_transmission()
771 if (dev->dev->core_rev < 11) in b43_dummy_transmission()
772 b43_write16(dev, B43_MMIO_WEPCTL, 0x0000); in b43_dummy_transmission()
774 b43_write16(dev, B43_MMIO_WEPCTL, 0x0100); in b43_dummy_transmission()
777 b43_write16(dev, B43_MMIO_TXE0_PHYCTL, value); in b43_dummy_transmission()
780 b43_write16(dev, B43_MMIO_TXE0_PHYCTL1, 0x1A02); in b43_dummy_transmission()
782 b43_write16(dev, B43_MMIO_TXE0_WM_0, 0x0000); in b43_dummy_transmission()
783 b43_write16(dev, B43_MMIO_TXE0_WM_1, 0x0000); in b43_dummy_transmission()
785 b43_write16(dev, B43_MMIO_XMTTPLATETXPTR, 0x0000); in b43_dummy_transmission()
786 b43_write16(dev, B43_MMIO_XMTTXCNT, 0x0014); in b43_dummy_transmission()
787 b43_write16(dev, B43_MMIO_XMTSEL, 0x0826); in b43_dummy_transmission()
788 b43_write16(dev, B43_MMIO_TXE0_CTL, 0x0000); in b43_dummy_transmission()
796 b43_write16(dev, B43_MMIO_TXE0_AUX, 0x00D0); in b43_dummy_transmission()
799 b43_write16(dev, B43_MMIO_TXE0_AUX, 0x0050); in b43_dummy_transmission()
802 b43_write16(dev, B43_MMIO_TXE0_AUX, 0x0030); in b43_dummy_transmission()
804 b43_read16(dev, B43_MMIO_TXE0_AUX); in b43_dummy_transmission()
807 b43_radio_write16(dev, 0x0051, 0x0017); in b43_dummy_transmission()
809 value = b43_read16(dev, B43_MMIO_TXE0_STATUS); in b43_dummy_transmission()
815 value = b43_read16(dev, B43_MMIO_TXE0_STATUS); in b43_dummy_transmission()
821 value = b43_read16(dev, B43_MMIO_IFSSTAT); in b43_dummy_transmission()
827 b43_radio_write16(dev, 0x0051, 0x0037); in b43_dummy_transmission()
830 static void key_write(struct b43_wldev *dev, in key_write() argument
839 kidx = b43_kidx_to_fw(dev, index); in key_write()
841 b43_shm_write16(dev, B43_SHM_SHARED, in key_write()
845 offset = dev->ktp + (index * B43_SEC_KEYSIZE); in key_write()
849 b43_shm_write16(dev, B43_SHM_SHARED, offset + i, value); in key_write()
853 static void keymac_write(struct b43_wldev *dev, u8 index, const u8 *addr) in keymac_write() argument
858 if (b43_new_kidx_api(dev)) in keymac_write()
880 b43_shm_write32(dev, B43_SHM_RCMTA, in keymac_write()
882 b43_shm_write16(dev, B43_SHM_RCMTA, in keymac_write()
903 static void rx_tkip_phase1_write(struct b43_wldev *dev, u8 index, u32 iv32, in rx_tkip_phase1_write() argument
913 if (b43_new_kidx_api(dev)) in rx_tkip_phase1_write()
925 if (b43_debug(dev, B43_DBG_KEYS)) { in rx_tkip_phase1_write()
926 b43dbg(dev->wl, "rx_tkip_phase1_write : idx 0x%x, iv32 0x%x\n", in rx_tkip_phase1_write()
932 b43_shm_write16(dev, B43_SHM_SHARED, offset + i, in rx_tkip_phase1_write()
935 b43_shm_write16(dev, B43_SHM_SHARED, offset + i, iv32); in rx_tkip_phase1_write()
936 b43_shm_write16(dev, B43_SHM_SHARED, offset + i + 2, iv32 >> 16); in rx_tkip_phase1_write()
946 struct b43_wldev *dev; in b43_op_update_tkip_key() local
955 dev = wl->current_dev; in b43_op_update_tkip_key()
956 B43_WARN_ON(!dev || b43_status(dev) < B43_STAT_INITIALIZED); in b43_op_update_tkip_key()
958 keymac_write(dev, index, NULL); /* First zero out mac to avoid race */ in b43_op_update_tkip_key()
960 rx_tkip_phase1_write(dev, index, iv32, phase1key); in b43_op_update_tkip_key()
964 keymac_write(dev, index, sta->addr); in b43_op_update_tkip_key()
967 static void do_key_write(struct b43_wldev *dev, in do_key_write() argument
974 if (b43_new_kidx_api(dev)) in do_key_write()
977 B43_WARN_ON(index >= ARRAY_SIZE(dev->key)); in do_key_write()
981 keymac_write(dev, index, NULL); /* First zero out mac. */ in do_key_write()
992 rx_tkip_phase1_write(dev, index, 0xffffffff, (u16*)buf); in do_key_write()
994 rx_tkip_phase1_write(dev, index, 0, NULL); in do_key_write()
997 key_write(dev, index, algorithm, buf); in do_key_write()
999 keymac_write(dev, index, mac_addr); in do_key_write()
1001 dev->key[index].algorithm = algorithm; in do_key_write()
1004 static int b43_key_write(struct b43_wldev *dev, in b43_key_write() argument
1024 for (i = 0; i < ARRAY_SIZE(dev->key); i++) { in b43_key_write()
1026 B43_WARN_ON(dev->key[i].keyconf == keyconf); in b43_key_write()
1030 if (b43_new_kidx_api(dev)) in b43_key_write()
1037 B43_WARN_ON(i >= ARRAY_SIZE(dev->key)); in b43_key_write()
1038 if (!dev->key[i].keyconf) { in b43_key_write()
1045 b43warn(dev->wl, "Out of hardware key memory\n"); in b43_key_write()
1051 do_key_write(dev, index, algorithm, key, key_len, mac_addr); in b43_key_write()
1052 if ((index <= 3) && !b43_new_kidx_api(dev)) { in b43_key_write()
1055 do_key_write(dev, index + 4, algorithm, key, key_len, NULL); in b43_key_write()
1058 dev->key[index].keyconf = keyconf; in b43_key_write()
1063 static int b43_key_clear(struct b43_wldev *dev, int index) in b43_key_clear() argument
1065 if (B43_WARN_ON((index < 0) || (index >= ARRAY_SIZE(dev->key)))) in b43_key_clear()
1067 do_key_write(dev, index, B43_SEC_ALGO_NONE, in b43_key_clear()
1069 if ((index <= 3) && !b43_new_kidx_api(dev)) { in b43_key_clear()
1070 do_key_write(dev, index + 4, B43_SEC_ALGO_NONE, in b43_key_clear()
1073 dev->key[index].keyconf = NULL; in b43_key_clear()
1078 static void b43_clear_keys(struct b43_wldev *dev) in b43_clear_keys() argument
1082 if (b43_new_kidx_api(dev)) in b43_clear_keys()
1087 b43_key_clear(dev, i); in b43_clear_keys()
1090 static void b43_dump_keymemory(struct b43_wldev *dev) in b43_dump_keymemory() argument
1100 if (!b43_debug(dev, B43_DBG_KEYS)) in b43_dump_keymemory()
1103 hf = b43_hf_read(dev); in b43_dump_keymemory()
1104 b43dbg(dev->wl, "Hardware key memory dump: USEDEFKEYS=%u\n", in b43_dump_keymemory()
1106 if (b43_new_kidx_api(dev)) { in b43_dump_keymemory()
1114 key = &(dev->key[index]); in b43_dump_keymemory()
1117 offset = dev->ktp + (index * B43_SEC_KEYSIZE); in b43_dump_keymemory()
1119 u16 tmp = b43_shm_read16(dev, B43_SHM_SHARED, offset + i); in b43_dump_keymemory()
1123 algo = b43_shm_read16(dev, B43_SHM_SHARED, in b43_dump_keymemory()
1132 u16 tmp = b43_shm_read16(dev, B43_SHM_SHARED, offset + i); in b43_dump_keymemory()
1136 rcmta0 = b43_shm_read32(dev, B43_SHM_RCMTA, in b43_dump_keymemory()
1138 rcmta1 = b43_shm_read16(dev, B43_SHM_RCMTA, in b43_dump_keymemory()
1149 void b43_power_saving_ctl_bits(struct b43_wldev *dev, unsigned int ps_flags) in b43_power_saving_ctl_bits() argument
1183 macctl = b43_read32(dev, B43_MMIO_MACCTL); in b43_power_saving_ctl_bits()
1192 b43_write32(dev, B43_MMIO_MACCTL, macctl); in b43_power_saving_ctl_bits()
1194 b43_read32(dev, B43_MMIO_MACCTL); in b43_power_saving_ctl_bits()
1195 if (awake && dev->dev->core_rev >= 5) { in b43_power_saving_ctl_bits()
1198 ucstat = b43_shm_read16(dev, B43_SHM_SHARED, in b43_power_saving_ctl_bits()
1208 void b43_wireless_core_phy_pll_reset(struct b43_wldev *dev) in b43_wireless_core_phy_pll_reset() argument
1213 switch (dev->dev->bus_type) { in b43_wireless_core_phy_pll_reset()
1216 bcma_cc = &dev->dev->bdev->bus->drv_cc; in b43_wireless_core_phy_pll_reset()
1226 ssb_cc = &dev->dev->sdev->bus->chipco; in b43_wireless_core_phy_pll_reset()
1238 static void b43_bcma_phy_reset(struct b43_wldev *dev) in b43_bcma_phy_reset() argument
1243 flags = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); in b43_bcma_phy_reset()
1246 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, flags); in b43_bcma_phy_reset()
1249 b43_phy_take_out_of_reset(dev); in b43_bcma_phy_reset()
1252 static void b43_bcma_wireless_core_reset(struct b43_wldev *dev, bool gmode) in b43_bcma_wireless_core_reset() argument
1263 b43_device_enable(dev, flags); in b43_bcma_wireless_core_reset()
1265 if (dev->phy.type == B43_PHYTYPE_AC) { in b43_bcma_wireless_core_reset()
1268 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); in b43_bcma_wireless_core_reset()
1271 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); in b43_bcma_wireless_core_reset()
1273 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); in b43_bcma_wireless_core_reset()
1275 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); in b43_bcma_wireless_core_reset()
1277 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); in b43_bcma_wireless_core_reset()
1279 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); in b43_bcma_wireless_core_reset()
1282 bcma_core_set_clockmode(dev->dev->bdev, BCMA_CLKMODE_FAST); in b43_bcma_wireless_core_reset()
1283 b43_bcma_phy_reset(dev); in b43_bcma_wireless_core_reset()
1284 bcma_core_pll_ctl(dev->dev->bdev, req, status, true); in b43_bcma_wireless_core_reset()
1289 static void b43_ssb_wireless_core_reset(struct b43_wldev *dev, bool gmode) in b43_ssb_wireless_core_reset() argument
1297 if (dev->phy.type == B43_PHYTYPE_N) in b43_ssb_wireless_core_reset()
1299 b43_device_enable(dev, flags); in b43_ssb_wireless_core_reset()
1302 b43_phy_take_out_of_reset(dev); in b43_ssb_wireless_core_reset()
1306 void b43_wireless_core_reset(struct b43_wldev *dev, bool gmode) in b43_wireless_core_reset() argument
1310 switch (dev->dev->bus_type) { in b43_wireless_core_reset()
1313 b43_bcma_wireless_core_reset(dev, gmode); in b43_wireless_core_reset()
1318 b43_ssb_wireless_core_reset(dev, gmode); in b43_wireless_core_reset()
1327 if (dev->phy.ops) in b43_wireless_core_reset()
1328 dev->phy.ops->switch_analog(dev, 1); in b43_wireless_core_reset()
1330 macctl = b43_read32(dev, B43_MMIO_MACCTL); in b43_wireless_core_reset()
1335 b43_write32(dev, B43_MMIO_MACCTL, macctl); in b43_wireless_core_reset()
1338 static void handle_irq_transmit_status(struct b43_wldev *dev) in handle_irq_transmit_status() argument
1345 v0 = b43_read32(dev, B43_MMIO_XMITSTAT_0); in handle_irq_transmit_status()
1348 v1 = b43_read32(dev, B43_MMIO_XMITSTAT_1); in handle_irq_transmit_status()
1362 b43_handle_txstatus(dev, &stat); in handle_irq_transmit_status()
1366 static void drain_txstatus_queue(struct b43_wldev *dev) in drain_txstatus_queue() argument
1370 if (dev->dev->core_rev < 5) in drain_txstatus_queue()
1376 dummy = b43_read32(dev, B43_MMIO_XMITSTAT_0); in drain_txstatus_queue()
1379 dummy = b43_read32(dev, B43_MMIO_XMITSTAT_1); in drain_txstatus_queue()
1383 static u32 b43_jssi_read(struct b43_wldev *dev) in b43_jssi_read() argument
1387 val = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_JSSI1); in b43_jssi_read()
1389 val |= b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_JSSI0); in b43_jssi_read()
1394 static void b43_jssi_write(struct b43_wldev *dev, u32 jssi) in b43_jssi_write() argument
1396 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_JSSI0, in b43_jssi_write()
1398 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_JSSI1, in b43_jssi_write()
1402 static void b43_generate_noise_sample(struct b43_wldev *dev) in b43_generate_noise_sample() argument
1404 b43_jssi_write(dev, 0x7F7F7F7F); in b43_generate_noise_sample()
1405 b43_write32(dev, B43_MMIO_MACCMD, in b43_generate_noise_sample()
1406 b43_read32(dev, B43_MMIO_MACCMD) | B43_MACCMD_BGNOISE); in b43_generate_noise_sample()
1409 static void b43_calculate_link_quality(struct b43_wldev *dev) in b43_calculate_link_quality() argument
1413 if (dev->phy.type != B43_PHYTYPE_G) in b43_calculate_link_quality()
1415 if (dev->noisecalc.calculation_running) in b43_calculate_link_quality()
1417 dev->noisecalc.calculation_running = true; in b43_calculate_link_quality()
1418 dev->noisecalc.nr_samples = 0; in b43_calculate_link_quality()
1420 b43_generate_noise_sample(dev); in b43_calculate_link_quality()
1423 static void handle_irq_noise(struct b43_wldev *dev) in handle_irq_noise() argument
1425 struct b43_phy_g *phy = dev->phy.g; in handle_irq_noise()
1433 if (dev->phy.type != B43_PHYTYPE_G) in handle_irq_noise()
1445 B43_WARN_ON(!dev->noisecalc.calculation_running); in handle_irq_noise()
1446 *((__le32 *)noise) = cpu_to_le32(b43_jssi_read(dev)); in handle_irq_noise()
1452 B43_WARN_ON(dev->noisecalc.nr_samples >= 8); in handle_irq_noise()
1453 i = dev->noisecalc.nr_samples; in handle_irq_noise()
1458 dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]]; in handle_irq_noise()
1459 dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]]; in handle_irq_noise()
1460 dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]]; in handle_irq_noise()
1461 dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]]; in handle_irq_noise()
1462 dev->noisecalc.nr_samples++; in handle_irq_noise()
1463 if (dev->noisecalc.nr_samples == 8) { in handle_irq_noise()
1468 average += dev->noisecalc.samples[i][j]; in handle_irq_noise()
1474 tmp = b43_shm_read16(dev, B43_SHM_SHARED, 0x40C); in handle_irq_noise()
1485 dev->stats.link_noise = average; in handle_irq_noise()
1486 dev->noisecalc.calculation_running = false; in handle_irq_noise()
1490 b43_generate_noise_sample(dev); in handle_irq_noise()
1493 static void handle_irq_tbtt_indication(struct b43_wldev *dev) in handle_irq_tbtt_indication() argument
1495 if (b43_is_mode(dev->wl, NL80211_IFTYPE_AP)) { in handle_irq_tbtt_indication()
1499 b43_power_saving_ctl_bits(dev, 0); in handle_irq_tbtt_indication()
1501 if (b43_is_mode(dev->wl, NL80211_IFTYPE_ADHOC)) in handle_irq_tbtt_indication()
1502 dev->dfq_valid = true; in handle_irq_tbtt_indication()
1505 static void handle_irq_atim_end(struct b43_wldev *dev) in handle_irq_atim_end() argument
1507 if (dev->dfq_valid) { in handle_irq_atim_end()
1508 b43_write32(dev, B43_MMIO_MACCMD, in handle_irq_atim_end()
1509 b43_read32(dev, B43_MMIO_MACCMD) in handle_irq_atim_end()
1511 dev->dfq_valid = false; in handle_irq_atim_end()
1515 static void handle_irq_pmq(struct b43_wldev *dev) in handle_irq_pmq() argument
1522 tmp = b43_read32(dev, B43_MMIO_PS_STATUS); in handle_irq_pmq()
1527 b43_write16(dev, B43_MMIO_PS_STATUS, 0x0002); in handle_irq_pmq()
1530 static void b43_write_template_common(struct b43_wldev *dev, in b43_write_template_common() argument
1540 b43_ram_write(dev, ram_offset, le32_to_cpu(plcp.data)); in b43_write_template_common()
1547 b43_ram_write(dev, ram_offset, tmp); in b43_write_template_common()
1557 b43_ram_write(dev, ram_offset + i - 2, tmp); in b43_write_template_common()
1559 b43_shm_write16(dev, B43_SHM_SHARED, shm_size_offset, in b43_write_template_common()
1566 u8 b43_ieee80211_antenna_sanitize(struct b43_wldev *dev, in b43_ieee80211_antenna_sanitize() argument
1577 if (dev->phy.gmode) in b43_ieee80211_antenna_sanitize()
1578 antenna_mask = dev->dev->bus_sprom->ant_available_bg; in b43_ieee80211_antenna_sanitize()
1580 antenna_mask = dev->dev->bus_sprom->ant_available_a; in b43_ieee80211_antenna_sanitize()
1610 static void b43_write_beacon_template(struct b43_wldev *dev, in b43_write_beacon_template() argument
1625 spin_lock_irqsave(&dev->wl->beacon_lock, flags); in b43_write_beacon_template()
1626 info = IEEE80211_SKB_CB(dev->wl->current_beacon); in b43_write_beacon_template()
1627 rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value; in b43_write_beacon_template()
1629 beacon_skb = skb_clone(dev->wl->current_beacon, GFP_ATOMIC); in b43_write_beacon_template()
1630 spin_unlock_irqrestore(&dev->wl->beacon_lock, flags); in b43_write_beacon_template()
1633 b43dbg(dev->wl, "Could not upload beacon. " in b43_write_beacon_template()
1642 b43_write_template_common(dev, (const u8 *)bcn, in b43_write_beacon_template()
1648 ctl = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_BEACPHYCTL); in b43_write_beacon_template()
1658 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_BEACPHYCTL, ctl); in b43_write_beacon_template()
1688 b43_shm_write16(dev, B43_SHM_SHARED, in b43_write_beacon_template()
1690 b43_shm_write16(dev, B43_SHM_SHARED, in b43_write_beacon_template()
1701 b43_shm_write16(dev, B43_SHM_SHARED, in b43_write_beacon_template()
1704 b43_shm_write16(dev, B43_SHM_SHARED, in b43_write_beacon_template()
1707 b43dbg(dev->wl, "Updated beacon template at 0x%x\n", ram_offset); in b43_write_beacon_template()
1712 static void b43_upload_beacon0(struct b43_wldev *dev) in b43_upload_beacon0() argument
1714 struct b43_wl *wl = dev->wl; in b43_upload_beacon0()
1718 b43_write_beacon_template(dev, B43_SHM_SH_BT_BASE0, B43_SHM_SH_BTL0); in b43_upload_beacon0()
1722 static void b43_upload_beacon1(struct b43_wldev *dev) in b43_upload_beacon1() argument
1724 struct b43_wl *wl = dev->wl; in b43_upload_beacon1()
1728 b43_write_beacon_template(dev, B43_SHM_SH_BT_BASE1, B43_SHM_SH_BTL1); in b43_upload_beacon1()
1732 static void handle_irq_beacon(struct b43_wldev *dev) in handle_irq_beacon() argument
1734 struct b43_wl *wl = dev->wl; in handle_irq_beacon()
1745 dev->irq_mask &= ~B43_IRQ_BEACON; in handle_irq_beacon()
1747 cmd = b43_read32(dev, B43_MMIO_MACCMD); in handle_irq_beacon()
1753 b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, B43_IRQ_BEACON); in handle_irq_beacon()
1754 dev->irq_mask |= B43_IRQ_BEACON; in handle_irq_beacon()
1762 b43_upload_beacon0(dev); in handle_irq_beacon()
1763 b43_upload_beacon1(dev); in handle_irq_beacon()
1764 cmd = b43_read32(dev, B43_MMIO_MACCMD); in handle_irq_beacon()
1766 b43_write32(dev, B43_MMIO_MACCMD, cmd); in handle_irq_beacon()
1769 b43_upload_beacon0(dev); in handle_irq_beacon()
1770 cmd = b43_read32(dev, B43_MMIO_MACCMD); in handle_irq_beacon()
1772 b43_write32(dev, B43_MMIO_MACCMD, cmd); in handle_irq_beacon()
1774 b43_upload_beacon1(dev); in handle_irq_beacon()
1775 cmd = b43_read32(dev, B43_MMIO_MACCMD); in handle_irq_beacon()
1777 b43_write32(dev, B43_MMIO_MACCMD, cmd); in handle_irq_beacon()
1782 static void b43_do_beacon_update_trigger_work(struct b43_wldev *dev) in b43_do_beacon_update_trigger_work() argument
1784 u32 old_irq_mask = dev->irq_mask; in b43_do_beacon_update_trigger_work()
1787 handle_irq_beacon(dev); in b43_do_beacon_update_trigger_work()
1788 if (old_irq_mask != dev->irq_mask) { in b43_do_beacon_update_trigger_work()
1790 B43_WARN_ON(!dev->irq_mask); in b43_do_beacon_update_trigger_work()
1791 if (b43_read32(dev, B43_MMIO_GEN_IRQ_MASK)) { in b43_do_beacon_update_trigger_work()
1792 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask); in b43_do_beacon_update_trigger_work()
1807 struct b43_wldev *dev; in b43_beacon_update_trigger_work() local
1810 dev = wl->current_dev; in b43_beacon_update_trigger_work()
1811 if (likely(dev && (b43_status(dev) >= B43_STAT_INITIALIZED))) { in b43_beacon_update_trigger_work()
1812 if (b43_bus_host_is_sdio(dev->dev)) { in b43_beacon_update_trigger_work()
1814 b43_do_beacon_update_trigger_work(dev); in b43_beacon_update_trigger_work()
1818 b43_do_beacon_update_trigger_work(dev); in b43_beacon_update_trigger_work()
1859 static void b43_set_beacon_int(struct b43_wldev *dev, u16 beacon_int) in b43_set_beacon_int() argument
1861 b43_time_lock(dev); in b43_set_beacon_int()
1862 if (dev->dev->core_rev >= 3) { in b43_set_beacon_int()
1863 b43_write32(dev, B43_MMIO_TSF_CFP_REP, (beacon_int << 16)); in b43_set_beacon_int()
1864 b43_write32(dev, B43_MMIO_TSF_CFP_START, (beacon_int << 10)); in b43_set_beacon_int()
1866 b43_write16(dev, 0x606, (beacon_int >> 6)); in b43_set_beacon_int()
1867 b43_write16(dev, 0x610, beacon_int); in b43_set_beacon_int()
1869 b43_time_unlock(dev); in b43_set_beacon_int()
1870 b43dbg(dev->wl, "Set beacon interval to %u\n", beacon_int); in b43_set_beacon_int()
1873 static void b43_handle_firmware_panic(struct b43_wldev *dev) in b43_handle_firmware_panic() argument
1878 reason = b43_shm_read16(dev, B43_SHM_SCRATCH, B43_FWPANIC_REASON_REG); in b43_handle_firmware_panic()
1879 b43err(dev->wl, "Whoopsy, firmware panic! Reason: %u\n", reason); in b43_handle_firmware_panic()
1883 b43dbg(dev->wl, "The panic reason is unknown.\n"); in b43_handle_firmware_panic()
1892 b43_controller_restart(dev, "Microcode panic"); in b43_handle_firmware_panic()
1897 static void handle_irq_ucode_debug(struct b43_wldev *dev) in handle_irq_ucode_debug() argument
1904 if (!dev->fw.opensource) in handle_irq_ucode_debug()
1908 reason = b43_shm_read16(dev, B43_SHM_SCRATCH, B43_DEBUGIRQ_REASON_REG); in handle_irq_ucode_debug()
1912 b43_handle_firmware_panic(dev); in handle_irq_ucode_debug()
1919 b43dbg(dev->wl, "SHM-dump: Failed to allocate memory\n"); in handle_irq_ucode_debug()
1923 u16 tmp = b43_shm_read16(dev, B43_SHM_SHARED, i); in handle_irq_ucode_debug()
1926 b43info(dev->wl, "Shared memory dump:\n"); in handle_irq_ucode_debug()
1934 b43info(dev->wl, "Microcode register dump:\n"); in handle_irq_ucode_debug()
1936 u16 tmp = b43_shm_read16(dev, B43_SHM_SCRATCH, i); in handle_irq_ucode_debug()
1951 marker_id = b43_shm_read16(dev, B43_SHM_SCRATCH, in handle_irq_ucode_debug()
1953 marker_line = b43_shm_read16(dev, B43_SHM_SCRATCH, in handle_irq_ucode_debug()
1955 b43info(dev->wl, "The firmware just executed the MARKER(%u) " in handle_irq_ucode_debug()
1960 b43dbg(dev->wl, "Debug-IRQ triggered for unknown reason: %u\n", in handle_irq_ucode_debug()
1965 b43_shm_write16(dev, B43_SHM_SCRATCH, in handle_irq_ucode_debug()
1969 static void b43_do_interrupt_thread(struct b43_wldev *dev) in b43_do_interrupt_thread() argument
1972 u32 dma_reason[ARRAY_SIZE(dev->dma_reason)]; in b43_do_interrupt_thread()
1976 if (unlikely(b43_status(dev) != B43_STAT_STARTED)) in b43_do_interrupt_thread()
1979 reason = dev->irq_reason; in b43_do_interrupt_thread()
1981 dma_reason[i] = dev->dma_reason[i]; in b43_do_interrupt_thread()
1986 b43err(dev->wl, "MAC transmission error\n"); in b43_do_interrupt_thread()
1989 b43err(dev->wl, "PHY transmission error\n"); in b43_do_interrupt_thread()
1991 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) { in b43_do_interrupt_thread()
1992 atomic_set(&dev->phy.txerr_cnt, in b43_do_interrupt_thread()
1994 b43err(dev->wl, "Too many PHY TX errors, " in b43_do_interrupt_thread()
1996 b43_controller_restart(dev, "PHY TX errors"); in b43_do_interrupt_thread()
2001 b43err(dev->wl, in b43_do_interrupt_thread()
2006 b43err(dev->wl, "This device does not support DMA " in b43_do_interrupt_thread()
2009 dev->use_pio = true; in b43_do_interrupt_thread()
2010 b43_controller_restart(dev, "DMA error"); in b43_do_interrupt_thread()
2015 handle_irq_ucode_debug(dev); in b43_do_interrupt_thread()
2017 handle_irq_tbtt_indication(dev); in b43_do_interrupt_thread()
2019 handle_irq_atim_end(dev); in b43_do_interrupt_thread()
2021 handle_irq_beacon(dev); in b43_do_interrupt_thread()
2023 handle_irq_pmq(dev); in b43_do_interrupt_thread()
2027 handle_irq_noise(dev); in b43_do_interrupt_thread()
2032 b43warn(dev->wl, "RX descriptor underrun\n"); in b43_do_interrupt_thread()
2033 b43_dma_handle_rx_overflow(dev->dma.rx_ring); in b43_do_interrupt_thread()
2036 if (b43_using_pio_transfers(dev)) in b43_do_interrupt_thread()
2037 b43_pio_rx(dev->pio.rx_queue); in b43_do_interrupt_thread()
2039 b43_dma_rx(dev->dma.rx_ring); in b43_do_interrupt_thread()
2048 handle_irq_transmit_status(dev); in b43_do_interrupt_thread()
2051 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask); in b43_do_interrupt_thread()
2054 if (b43_debug(dev, B43_DBG_VERBOSESTATS)) { in b43_do_interrupt_thread()
2055 dev->irq_count++; in b43_do_interrupt_thread()
2056 for (i = 0; i < ARRAY_SIZE(dev->irq_bit_count); i++) { in b43_do_interrupt_thread()
2058 dev->irq_bit_count[i]++; in b43_do_interrupt_thread()
2067 struct b43_wldev *dev = dev_id; in b43_interrupt_thread_handler() local
2069 mutex_lock(&dev->wl->mutex); in b43_interrupt_thread_handler()
2070 b43_do_interrupt_thread(dev); in b43_interrupt_thread_handler()
2072 mutex_unlock(&dev->wl->mutex); in b43_interrupt_thread_handler()
2077 static irqreturn_t b43_do_interrupt(struct b43_wldev *dev) in b43_do_interrupt() argument
2084 reason = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON); in b43_do_interrupt()
2087 reason &= dev->irq_mask; in b43_do_interrupt()
2091 dev->dma_reason[0] = b43_read32(dev, B43_MMIO_DMA0_REASON) in b43_do_interrupt()
2093 dev->dma_reason[1] = b43_read32(dev, B43_MMIO_DMA1_REASON) in b43_do_interrupt()
2095 dev->dma_reason[2] = b43_read32(dev, B43_MMIO_DMA2_REASON) in b43_do_interrupt()
2097 dev->dma_reason[3] = b43_read32(dev, B43_MMIO_DMA3_REASON) in b43_do_interrupt()
2099 dev->dma_reason[4] = b43_read32(dev, B43_MMIO_DMA4_REASON) in b43_do_interrupt()
2107 b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, reason); in b43_do_interrupt()
2108 b43_write32(dev, B43_MMIO_DMA0_REASON, dev->dma_reason[0]); in b43_do_interrupt()
2109 b43_write32(dev, B43_MMIO_DMA1_REASON, dev->dma_reason[1]); in b43_do_interrupt()
2110 b43_write32(dev, B43_MMIO_DMA2_REASON, dev->dma_reason[2]); in b43_do_interrupt()
2111 b43_write32(dev, B43_MMIO_DMA3_REASON, dev->dma_reason[3]); in b43_do_interrupt()
2112 b43_write32(dev, B43_MMIO_DMA4_REASON, dev->dma_reason[4]); in b43_do_interrupt()
2118 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0); in b43_do_interrupt()
2120 dev->irq_reason = reason; in b43_do_interrupt()
2128 struct b43_wldev *dev = dev_id; in b43_interrupt_handler() local
2131 if (unlikely(b43_status(dev) < B43_STAT_STARTED)) in b43_interrupt_handler()
2134 spin_lock(&dev->wl->hardirq_lock); in b43_interrupt_handler()
2135 ret = b43_do_interrupt(dev); in b43_interrupt_handler()
2137 spin_unlock(&dev->wl->hardirq_lock); in b43_interrupt_handler()
2143 static void b43_sdio_interrupt_handler(struct b43_wldev *dev) in b43_sdio_interrupt_handler() argument
2145 struct b43_wl *wl = dev->wl; in b43_sdio_interrupt_handler()
2150 ret = b43_do_interrupt(dev); in b43_sdio_interrupt_handler()
2152 b43_do_interrupt_thread(dev); in b43_sdio_interrupt_handler()
2164 static void b43_release_firmware(struct b43_wldev *dev) in b43_release_firmware() argument
2166 complete(&dev->fw_load_complete); in b43_release_firmware()
2167 b43_do_release_fw(&dev->fw.ucode); in b43_release_firmware()
2168 b43_do_release_fw(&dev->fw.pcm); in b43_release_firmware()
2169 b43_do_release_fw(&dev->fw.initvals); in b43_release_firmware()
2170 b43_do_release_fw(&dev->fw.initvals_band); in b43_release_firmware()
2192 complete(&ctx->dev->fw_load_complete); in b43_fw_cb()
2239 init_completion(&ctx->dev->fw_load_complete); in b43_do_request_fw()
2241 ctx->dev->dev->dev, GFP_KERNEL, in b43_do_request_fw()
2247 wait_for_completion(&ctx->dev->fw_load_complete); in b43_do_request_fw()
2255 ctx->dev->dev->dev); in b43_do_request_fw()
2306 struct b43_wldev *dev = ctx->dev; in b43_try_request_fw() local
2307 struct b43_firmware *fw = &ctx->dev->fw; in b43_try_request_fw()
2308 struct b43_phy *phy = &dev->phy; in b43_try_request_fw()
2309 const u8 rev = ctx->dev->dev->core_rev; in b43_try_request_fw()
2401 switch (dev->phy.type) { in b43_try_request_fw()
2461 switch (dev->phy.type) { in b43_try_request_fw()
2525 b43err(dev->wl, "The driver does not know which firmware (ucode) " in b43_try_request_fw()
2531 b43err(dev->wl, "The driver does not know which firmware (PCM) " in b43_try_request_fw()
2537 b43err(dev->wl, "The driver does not know which firmware (initvals) " in b43_try_request_fw()
2548 b43_release_firmware(dev); in b43_try_request_fw()
2552 static int b43_one_core_attach(struct b43_bus_dev *dev, struct b43_wl *wl);
2553 static void b43_one_core_detach(struct b43_bus_dev *dev);
2560 struct b43_wldev *dev = wl->current_dev; in b43_request_firmware() local
2569 ctx->dev = dev; in b43_request_firmware()
2591 b43err(dev->wl, "%s", errmsg); in b43_request_firmware()
2593 b43_print_fw_helptext(dev->wl, 1); in b43_request_firmware()
2598 if (!modparam_qos || dev->fw.opensource) in b43_request_firmware()
2613 b43_one_core_detach(dev->dev); in b43_request_firmware()
2619 static int b43_upload_microcode(struct b43_wldev *dev) in b43_upload_microcode() argument
2621 struct wiphy *wiphy = dev->wl->hw->wiphy; in b43_upload_microcode()
2630 macctl = b43_read32(dev, B43_MMIO_MACCTL); in b43_upload_microcode()
2633 b43_write32(dev, B43_MMIO_MACCTL, macctl); in b43_upload_microcode()
2636 b43_shm_write16(dev, B43_SHM_SCRATCH, i, 0); in b43_upload_microcode()
2638 b43_shm_write16(dev, B43_SHM_SHARED, i, 0); in b43_upload_microcode()
2641 data = (__be32 *) (dev->fw.ucode.data->data + hdr_len); in b43_upload_microcode()
2642 len = (dev->fw.ucode.data->size - hdr_len) / sizeof(__be32); in b43_upload_microcode()
2643 b43_shm_control_word(dev, B43_SHM_UCODE | B43_SHM_AUTOINC_W, 0x0000); in b43_upload_microcode()
2645 b43_write32(dev, B43_MMIO_SHM_DATA, be32_to_cpu(data[i])); in b43_upload_microcode()
2649 if (dev->fw.pcm.data) { in b43_upload_microcode()
2651 data = (__be32 *) (dev->fw.pcm.data->data + hdr_len); in b43_upload_microcode()
2652 len = (dev->fw.pcm.data->size - hdr_len) / sizeof(__be32); in b43_upload_microcode()
2653 b43_shm_control_word(dev, B43_SHM_HW, 0x01EA); in b43_upload_microcode()
2654 b43_write32(dev, B43_MMIO_SHM_DATA, 0x00004000); in b43_upload_microcode()
2656 b43_shm_control_word(dev, B43_SHM_HW, 0x01EB); in b43_upload_microcode()
2658 b43_write32(dev, B43_MMIO_SHM_DATA, be32_to_cpu(data[i])); in b43_upload_microcode()
2663 b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, B43_IRQ_ALL); in b43_upload_microcode()
2666 b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_PSM_JMP0, in b43_upload_microcode()
2672 tmp = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON); in b43_upload_microcode()
2677 b43err(dev->wl, "Microcode not responding\n"); in b43_upload_microcode()
2678 b43_print_fw_helptext(dev->wl, 1); in b43_upload_microcode()
2684 b43_read32(dev, B43_MMIO_GEN_IRQ_REASON); /* dummy read */ in b43_upload_microcode()
2687 fwrev = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_UCODEREV); in b43_upload_microcode()
2688 fwpatch = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_UCODEPATCH); in b43_upload_microcode()
2689 fwdate = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_UCODEDATE); in b43_upload_microcode()
2690 fwtime = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_UCODETIME); in b43_upload_microcode()
2693 b43err(dev->wl, "YOUR FIRMWARE IS TOO OLD. Firmware from " in b43_upload_microcode()
2696 b43_print_fw_helptext(dev->wl, 1); in b43_upload_microcode()
2700 dev->fw.rev = fwrev; in b43_upload_microcode()
2701 dev->fw.patch = fwpatch; in b43_upload_microcode()
2702 if (dev->fw.rev >= 598) in b43_upload_microcode()
2703 dev->fw.hdr_format = B43_FW_HDR_598; in b43_upload_microcode()
2704 else if (dev->fw.rev >= 410) in b43_upload_microcode()
2705 dev->fw.hdr_format = B43_FW_HDR_410; in b43_upload_microcode()
2707 dev->fw.hdr_format = B43_FW_HDR_351; in b43_upload_microcode()
2708 WARN_ON(dev->fw.opensource != (fwdate == 0xFFFF)); in b43_upload_microcode()
2710 dev->qos_enabled = dev->wl->hw->queues > 1; in b43_upload_microcode()
2712 dev->hwcrypto_enabled = true; in b43_upload_microcode()
2714 if (dev->fw.opensource) { in b43_upload_microcode()
2718 dev->fw.patch = fwtime; in b43_upload_microcode()
2719 b43info(dev->wl, "Loading OpenSource firmware version %u.%u\n", in b43_upload_microcode()
2720 dev->fw.rev, dev->fw.patch); in b43_upload_microcode()
2722 fwcapa = b43_fwcapa_read(dev); in b43_upload_microcode()
2723 if (!(fwcapa & B43_FWCAPA_HWCRYPTO) || dev->fw.pcm_request_failed) { in b43_upload_microcode()
2724 b43info(dev->wl, "Hardware crypto acceleration not supported by firmware\n"); in b43_upload_microcode()
2726 dev->hwcrypto_enabled = false; in b43_upload_microcode()
2731 b43info(dev->wl, "Loading firmware version %u.%u " in b43_upload_microcode()
2736 if (dev->fw.pcm_request_failed) { in b43_upload_microcode()
2737 b43warn(dev->wl, "No \"pcm5.fw\" firmware file found. " in b43_upload_microcode()
2739 b43_print_fw_helptext(dev->wl, 0); in b43_upload_microcode()
2744 dev->fw.rev, dev->fw.patch); in b43_upload_microcode()
2745 wiphy->hw_version = dev->dev->core_id; in b43_upload_microcode()
2747 if (dev->fw.hdr_format == B43_FW_HDR_351) { in b43_upload_microcode()
2750 b43warn(dev->wl, "You are using an old firmware image. " in b43_upload_microcode()
2753 b43_print_fw_helptext(dev->wl, 0); in b43_upload_microcode()
2760 b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_PSM_RUN, in b43_upload_microcode()
2766 static int b43_write_initvals(struct b43_wldev *dev, in b43_write_initvals() argument
2795 b43_write32(dev, offset, value); in b43_write_initvals()
2808 b43_write16(dev, offset, value); in b43_write_initvals()
2821 b43err(dev->wl, "Initial Values Firmware file-format error.\n"); in b43_write_initvals()
2822 b43_print_fw_helptext(dev->wl, 1); in b43_write_initvals()
2827 static int b43_upload_initvals(struct b43_wldev *dev) in b43_upload_initvals() argument
2831 struct b43_firmware *fw = &dev->fw; in b43_upload_initvals()
2838 return b43_write_initvals(dev, ivals, count, in b43_upload_initvals()
2842 static int b43_upload_initvals_band(struct b43_wldev *dev) in b43_upload_initvals_band() argument
2846 struct b43_firmware *fw = &dev->fw; in b43_upload_initvals_band()
2856 return b43_write_initvals(dev, ivals, count, in b43_upload_initvals_band()
2865 static struct ssb_device *b43_ssb_gpio_dev(struct b43_wldev *dev) in b43_ssb_gpio_dev() argument
2867 struct ssb_bus *bus = dev->dev->sdev->bus; in b43_ssb_gpio_dev()
2870 return (bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev); in b43_ssb_gpio_dev()
2872 return bus->chipco.dev; in b43_ssb_gpio_dev()
2877 static int b43_gpio_init(struct b43_wldev *dev) in b43_gpio_init() argument
2884 b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_GPOUTSMSK, 0); in b43_gpio_init()
2885 b43_maskset16(dev, B43_MMIO_GPIO_MASK, ~0, 0xF); in b43_gpio_init()
2889 if (dev->dev->chip_id == 0x4301) { in b43_gpio_init()
2892 } else if (dev->dev->chip_id == 0x5354) { in b43_gpio_init()
2898 b43_write16(dev, B43_MMIO_GPIO_MASK, in b43_gpio_init()
2899 b43_read16(dev, B43_MMIO_GPIO_MASK) in b43_gpio_init()
2908 if (dev->dev->bus_sprom->boardflags_lo & B43_BFL_PACTRL) { in b43_gpio_init()
2910 b43_write16(dev, B43_MMIO_GPIO_MASK, in b43_gpio_init()
2911 b43_read16(dev, B43_MMIO_GPIO_MASK) in b43_gpio_init()
2917 switch (dev->dev->bus_type) { in b43_gpio_init()
2920 bcma_chipco_gpio_control(&dev->dev->bdev->bus->drv_cc, mask, set); in b43_gpio_init()
2925 gpiodev = b43_ssb_gpio_dev(dev); in b43_gpio_init()
2938 static void b43_gpio_cleanup(struct b43_wldev *dev) in b43_gpio_cleanup() argument
2944 switch (dev->dev->bus_type) { in b43_gpio_cleanup()
2947 bcma_chipco_gpio_control(&dev->dev->bdev->bus->drv_cc, ~0, 0); in b43_gpio_cleanup()
2952 gpiodev = b43_ssb_gpio_dev(dev); in b43_gpio_cleanup()
2961 void b43_mac_enable(struct b43_wldev *dev) in b43_mac_enable() argument
2963 if (b43_debug(dev, B43_DBG_FIRMWARE)) { in b43_mac_enable()
2966 fwstate = b43_shm_read16(dev, B43_SHM_SHARED, in b43_mac_enable()
2970 b43err(dev->wl, "b43_mac_enable(): The firmware " in b43_mac_enable()
2976 dev->mac_suspended--; in b43_mac_enable()
2977 B43_WARN_ON(dev->mac_suspended < 0); in b43_mac_enable()
2978 if (dev->mac_suspended == 0) { in b43_mac_enable()
2979 b43_maskset32(dev, B43_MMIO_MACCTL, ~0, B43_MACCTL_ENABLED); in b43_mac_enable()
2980 b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, in b43_mac_enable()
2983 b43_read32(dev, B43_MMIO_MACCTL); in b43_mac_enable()
2984 b43_read32(dev, B43_MMIO_GEN_IRQ_REASON); in b43_mac_enable()
2985 b43_power_saving_ctl_bits(dev, 0); in b43_mac_enable()
2990 void b43_mac_suspend(struct b43_wldev *dev) in b43_mac_suspend() argument
2996 B43_WARN_ON(dev->mac_suspended < 0); in b43_mac_suspend()
2998 if (dev->mac_suspended == 0) { in b43_mac_suspend()
2999 b43_power_saving_ctl_bits(dev, B43_PS_AWAKE); in b43_mac_suspend()
3000 b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_ENABLED, 0); in b43_mac_suspend()
3002 b43_read32(dev, B43_MMIO_MACCTL); in b43_mac_suspend()
3004 tmp = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON); in b43_mac_suspend()
3011 tmp = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON); in b43_mac_suspend()
3016 b43err(dev->wl, "MAC suspend failed\n"); in b43_mac_suspend()
3019 dev->mac_suspended++; in b43_mac_suspend()
3023 void b43_mac_phy_clock_set(struct b43_wldev *dev, bool on) in b43_mac_phy_clock_set() argument
3027 switch (dev->dev->bus_type) { in b43_mac_phy_clock_set()
3030 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); in b43_mac_phy_clock_set()
3035 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); in b43_mac_phy_clock_set()
3040 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); in b43_mac_phy_clock_set()
3045 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); in b43_mac_phy_clock_set()
3052 void b43_mac_switch_freq(struct b43_wldev *dev, u8 spurmode) in b43_mac_switch_freq() argument
3054 u16 chip_id = dev->dev->chip_id; in b43_mac_switch_freq()
3059 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x1862); in b43_mac_switch_freq()
3060 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x6); in b43_mac_switch_freq()
3063 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x3e70); in b43_mac_switch_freq()
3064 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x6); in b43_mac_switch_freq()
3067 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x6666); in b43_mac_switch_freq()
3068 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x6); in b43_mac_switch_freq()
3080 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x2082); in b43_mac_switch_freq()
3081 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8); in b43_mac_switch_freq()
3084 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x5341); in b43_mac_switch_freq()
3085 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8); in b43_mac_switch_freq()
3088 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x8889); in b43_mac_switch_freq()
3089 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8); in b43_mac_switch_freq()
3092 } else if (dev->phy.type == B43_PHYTYPE_LCN) { in b43_mac_switch_freq()
3095 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x7CE0); in b43_mac_switch_freq()
3096 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0xC); in b43_mac_switch_freq()
3099 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0xCCCD); in b43_mac_switch_freq()
3100 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0xC); in b43_mac_switch_freq()
3106 static void b43_adjust_opmode(struct b43_wldev *dev) in b43_adjust_opmode() argument
3108 struct b43_wl *wl = dev->wl; in b43_adjust_opmode()
3112 ctl = b43_read32(dev, B43_MMIO_MACCTL); in b43_adjust_opmode()
3142 if (dev->dev->core_rev <= 4) in b43_adjust_opmode()
3145 b43_write32(dev, B43_MMIO_MACCTL, ctl); in b43_adjust_opmode()
3149 if (dev->dev->chip_id == 0x4306 && in b43_adjust_opmode()
3150 dev->dev->chip_rev == 3) in b43_adjust_opmode()
3155 b43_write16(dev, 0x612, cfp_pretbtt); in b43_adjust_opmode()
3162 b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_DISCPMQ, 0); in b43_adjust_opmode()
3164 b43_maskset32(dev, B43_MMIO_MACCTL, ~0, B43_MACCTL_DISCPMQ); in b43_adjust_opmode()
3167 static void b43_rate_memory_write(struct b43_wldev *dev, u16 rate, int is_ofdm) in b43_rate_memory_write() argument
3178 b43_shm_write16(dev, B43_SHM_SHARED, offset + 0x20, in b43_rate_memory_write()
3179 b43_shm_read16(dev, B43_SHM_SHARED, offset)); in b43_rate_memory_write()
3182 static void b43_rate_memory_init(struct b43_wldev *dev) in b43_rate_memory_init() argument
3184 switch (dev->phy.type) { in b43_rate_memory_init()
3191 b43_rate_memory_write(dev, B43_OFDM_RATE_6MB, 1); in b43_rate_memory_init()
3192 b43_rate_memory_write(dev, B43_OFDM_RATE_9MB, 1); in b43_rate_memory_init()
3193 b43_rate_memory_write(dev, B43_OFDM_RATE_12MB, 1); in b43_rate_memory_init()
3194 b43_rate_memory_write(dev, B43_OFDM_RATE_18MB, 1); in b43_rate_memory_init()
3195 b43_rate_memory_write(dev, B43_OFDM_RATE_24MB, 1); in b43_rate_memory_init()
3196 b43_rate_memory_write(dev, B43_OFDM_RATE_36MB, 1); in b43_rate_memory_init()
3197 b43_rate_memory_write(dev, B43_OFDM_RATE_48MB, 1); in b43_rate_memory_init()
3198 b43_rate_memory_write(dev, B43_OFDM_RATE_54MB, 1); in b43_rate_memory_init()
3199 if (dev->phy.type == B43_PHYTYPE_A) in b43_rate_memory_init()
3203 b43_rate_memory_write(dev, B43_CCK_RATE_1MB, 0); in b43_rate_memory_init()
3204 b43_rate_memory_write(dev, B43_CCK_RATE_2MB, 0); in b43_rate_memory_init()
3205 b43_rate_memory_write(dev, B43_CCK_RATE_5MB, 0); in b43_rate_memory_init()
3206 b43_rate_memory_write(dev, B43_CCK_RATE_11MB, 0); in b43_rate_memory_init()
3214 static void b43_set_phytxctl_defaults(struct b43_wldev *dev) in b43_set_phytxctl_defaults() argument
3222 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_BEACPHYCTL, ctl); in b43_set_phytxctl_defaults()
3223 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_ACKCTSPHYCTL, ctl); in b43_set_phytxctl_defaults()
3224 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PRPHYCTL, ctl); in b43_set_phytxctl_defaults()
3228 static void b43_mgmtframe_txantenna(struct b43_wldev *dev, int antenna) in b43_mgmtframe_txantenna() argument
3236 tmp = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_ACKCTSPHYCTL); in b43_mgmtframe_txantenna()
3238 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_ACKCTSPHYCTL, tmp); in b43_mgmtframe_txantenna()
3240 tmp = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_PRPHYCTL); in b43_mgmtframe_txantenna()
3242 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PRPHYCTL, tmp); in b43_mgmtframe_txantenna()
3246 static void b43_chip_exit(struct b43_wldev *dev) in b43_chip_exit() argument
3248 b43_phy_exit(dev); in b43_chip_exit()
3249 b43_gpio_cleanup(dev); in b43_chip_exit()
3256 static int b43_chip_init(struct b43_wldev *dev) in b43_chip_init() argument
3258 struct b43_phy *phy = &dev->phy; in b43_chip_init()
3265 if (dev->phy.gmode) in b43_chip_init()
3268 b43_write32(dev, B43_MMIO_MACCTL, macctl); in b43_chip_init()
3270 err = b43_upload_microcode(dev); in b43_chip_init()
3274 err = b43_gpio_init(dev); in b43_chip_init()
3278 err = b43_upload_initvals(dev); in b43_chip_init()
3282 err = b43_upload_initvals_band(dev); in b43_chip_init()
3287 phy->ops->switch_analog(dev, 1); in b43_chip_init()
3288 err = b43_phy_init(dev); in b43_chip_init()
3294 phy->ops->interf_mitigation(dev, B43_INTERFMODE_NONE); in b43_chip_init()
3298 phy->ops->set_rx_antenna(dev, B43_ANTENNA_DEFAULT); in b43_chip_init()
3299 b43_mgmtframe_txantenna(dev, B43_ANTENNA_DEFAULT); in b43_chip_init()
3302 value16 = b43_read16(dev, 0x005E); in b43_chip_init()
3304 b43_write16(dev, 0x005E, value16); in b43_chip_init()
3306 b43_write32(dev, 0x0100, 0x01000000); in b43_chip_init()
3307 if (dev->dev->core_rev < 5) in b43_chip_init()
3308 b43_write32(dev, 0x010C, 0x01000000); in b43_chip_init()
3310 b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_INFRA, 0); in b43_chip_init()
3311 b43_maskset32(dev, B43_MMIO_MACCTL, ~0, B43_MACCTL_INFRA); in b43_chip_init()
3315 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PRMAXTIME, 0); in b43_chip_init()
3318 b43_adjust_opmode(dev); in b43_chip_init()
3320 if (dev->dev->core_rev < 3) { in b43_chip_init()
3321 b43_write16(dev, 0x060E, 0x0000); in b43_chip_init()
3322 b43_write16(dev, 0x0610, 0x8000); in b43_chip_init()
3323 b43_write16(dev, 0x0604, 0x0000); in b43_chip_init()
3324 b43_write16(dev, 0x0606, 0x0200); in b43_chip_init()
3326 b43_write32(dev, 0x0188, 0x80000000); in b43_chip_init()
3327 b43_write32(dev, 0x018C, 0x02000000); in b43_chip_init()
3329 b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, 0x00004000); in b43_chip_init()
3330 b43_write32(dev, B43_MMIO_DMA0_IRQ_MASK, 0x0001FC00); in b43_chip_init()
3331 b43_write32(dev, B43_MMIO_DMA1_IRQ_MASK, 0x0000DC00); in b43_chip_init()
3332 b43_write32(dev, B43_MMIO_DMA2_IRQ_MASK, 0x0000DC00); in b43_chip_init()
3333 b43_write32(dev, B43_MMIO_DMA3_IRQ_MASK, 0x0001DC00); in b43_chip_init()
3334 b43_write32(dev, B43_MMIO_DMA4_IRQ_MASK, 0x0000DC00); in b43_chip_init()
3335 b43_write32(dev, B43_MMIO_DMA5_IRQ_MASK, 0x0000DC00); in b43_chip_init()
3337 b43_mac_phy_clock_set(dev, true); in b43_chip_init()
3339 switch (dev->dev->bus_type) { in b43_chip_init()
3343 b43_write16(dev, B43_MMIO_POWERUP_DELAY, 0xE74); in b43_chip_init()
3348 b43_write16(dev, B43_MMIO_POWERUP_DELAY, in b43_chip_init()
3349 dev->dev->sdev->bus->chipco.fast_pwrup_delay); in b43_chip_init()
3355 b43dbg(dev->wl, "Chip initialized\n"); in b43_chip_init()
3360 b43_gpio_cleanup(dev); in b43_chip_init()
3364 static void b43_periodic_every60sec(struct b43_wldev *dev) in b43_periodic_every60sec() argument
3366 const struct b43_phy_operations *ops = dev->phy.ops; in b43_periodic_every60sec()
3369 ops->pwork_60sec(dev); in b43_periodic_every60sec()
3372 b43_phy_txpower_check(dev, B43_TXPWR_IGNORE_TIME); in b43_periodic_every60sec()
3375 static void b43_periodic_every30sec(struct b43_wldev *dev) in b43_periodic_every30sec() argument
3378 b43_calculate_link_quality(dev); in b43_periodic_every30sec()
3381 static void b43_periodic_every15sec(struct b43_wldev *dev) in b43_periodic_every15sec() argument
3383 struct b43_phy *phy = &dev->phy; in b43_periodic_every15sec()
3386 if (dev->fw.opensource) { in b43_periodic_every15sec()
3389 wdr = b43_shm_read16(dev, B43_SHM_SCRATCH, B43_WATCHDOG_REG); in b43_periodic_every15sec()
3391 b43err(dev->wl, "Firmware watchdog: The firmware died!\n"); in b43_periodic_every15sec()
3392 b43_controller_restart(dev, "Firmware watchdog"); in b43_periodic_every15sec()
3395 b43_shm_write16(dev, B43_SHM_SCRATCH, in b43_periodic_every15sec()
3401 phy->ops->pwork_15sec(dev); in b43_periodic_every15sec()
3407 if (b43_debug(dev, B43_DBG_VERBOSESTATS)) { in b43_periodic_every15sec()
3410 b43dbg(dev->wl, "Stats: %7u IRQs/sec, %7u TX/sec, %7u RX/sec\n", in b43_periodic_every15sec()
3411 dev->irq_count / 15, in b43_periodic_every15sec()
3412 dev->tx_count / 15, in b43_periodic_every15sec()
3413 dev->rx_count / 15); in b43_periodic_every15sec()
3414 dev->irq_count = 0; in b43_periodic_every15sec()
3415 dev->tx_count = 0; in b43_periodic_every15sec()
3416 dev->rx_count = 0; in b43_periodic_every15sec()
3417 for (i = 0; i < ARRAY_SIZE(dev->irq_bit_count); i++) { in b43_periodic_every15sec()
3418 if (dev->irq_bit_count[i]) { in b43_periodic_every15sec()
3419 b43dbg(dev->wl, "Stats: %7u IRQ-%02u/sec (0x%08X)\n", in b43_periodic_every15sec()
3420 dev->irq_bit_count[i] / 15, i, (1 << i)); in b43_periodic_every15sec()
3421 dev->irq_bit_count[i] = 0; in b43_periodic_every15sec()
3428 static void do_periodic_work(struct b43_wldev *dev) in do_periodic_work() argument
3432 state = dev->periodic_state; in do_periodic_work()
3434 b43_periodic_every60sec(dev); in do_periodic_work()
3436 b43_periodic_every30sec(dev); in do_periodic_work()
3437 b43_periodic_every15sec(dev); in do_periodic_work()
3447 struct b43_wldev *dev = container_of(work, struct b43_wldev, in b43_periodic_work_handler() local
3449 struct b43_wl *wl = dev->wl; in b43_periodic_work_handler()
3454 if (unlikely(b43_status(dev) != B43_STAT_STARTED)) in b43_periodic_work_handler()
3456 if (b43_debug(dev, B43_DBG_PWORK_STOP)) in b43_periodic_work_handler()
3459 do_periodic_work(dev); in b43_periodic_work_handler()
3461 dev->periodic_state++; in b43_periodic_work_handler()
3463 if (b43_debug(dev, B43_DBG_PWORK_FAST)) in b43_periodic_work_handler()
3467 ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay); in b43_periodic_work_handler()
3472 static void b43_periodic_tasks_setup(struct b43_wldev *dev) in b43_periodic_tasks_setup() argument
3474 struct delayed_work *work = &dev->periodic_work; in b43_periodic_tasks_setup()
3476 dev->periodic_state = 0; in b43_periodic_tasks_setup()
3478 ieee80211_queue_delayed_work(dev->wl->hw, work, 0); in b43_periodic_tasks_setup()
3482 static int b43_validate_chipaccess(struct b43_wldev *dev) in b43_validate_chipaccess() argument
3486 backup0 = b43_shm_read32(dev, B43_SHM_SHARED, 0); in b43_validate_chipaccess()
3487 backup4 = b43_shm_read32(dev, B43_SHM_SHARED, 4); in b43_validate_chipaccess()
3490 b43_shm_write32(dev, B43_SHM_SHARED, 0, 0x55AAAA55); in b43_validate_chipaccess()
3491 if (b43_shm_read32(dev, B43_SHM_SHARED, 0) != 0x55AAAA55) in b43_validate_chipaccess()
3493 b43_shm_write32(dev, B43_SHM_SHARED, 0, 0xAA5555AA); in b43_validate_chipaccess()
3494 if (b43_shm_read32(dev, B43_SHM_SHARED, 0) != 0xAA5555AA) in b43_validate_chipaccess()
3499 b43_shm_write16(dev, B43_SHM_SHARED, 0, 0x1122); in b43_validate_chipaccess()
3500 b43_shm_write16(dev, B43_SHM_SHARED, 2, 0x3344); in b43_validate_chipaccess()
3501 b43_shm_write16(dev, B43_SHM_SHARED, 4, 0x5566); in b43_validate_chipaccess()
3502 b43_shm_write16(dev, B43_SHM_SHARED, 6, 0x7788); in b43_validate_chipaccess()
3503 if (b43_shm_read32(dev, B43_SHM_SHARED, 2) != 0x55663344) in b43_validate_chipaccess()
3504 b43warn(dev->wl, "Unaligned 32bit SHM read access is broken\n"); in b43_validate_chipaccess()
3505 b43_shm_write32(dev, B43_SHM_SHARED, 2, 0xAABBCCDD); in b43_validate_chipaccess()
3506 if (b43_shm_read16(dev, B43_SHM_SHARED, 0) != 0x1122 || in b43_validate_chipaccess()
3507 b43_shm_read16(dev, B43_SHM_SHARED, 2) != 0xCCDD || in b43_validate_chipaccess()
3508 b43_shm_read16(dev, B43_SHM_SHARED, 4) != 0xAABB || in b43_validate_chipaccess()
3509 b43_shm_read16(dev, B43_SHM_SHARED, 6) != 0x7788) in b43_validate_chipaccess()
3510 b43warn(dev->wl, "Unaligned 32bit SHM write access is broken\n"); in b43_validate_chipaccess()
3512 b43_shm_write32(dev, B43_SHM_SHARED, 0, backup0); in b43_validate_chipaccess()
3513 b43_shm_write32(dev, B43_SHM_SHARED, 4, backup4); in b43_validate_chipaccess()
3515 if ((dev->dev->core_rev >= 3) && (dev->dev->core_rev <= 10)) { in b43_validate_chipaccess()
3518 b43_write16(dev, B43_MMIO_TSF_CFP_START, 0xAAAA); in b43_validate_chipaccess()
3519 b43_write32(dev, B43_MMIO_TSF_CFP_START, 0xCCCCBBBB); in b43_validate_chipaccess()
3520 if (b43_read16(dev, B43_MMIO_TSF_CFP_START_LOW) != 0xBBBB) in b43_validate_chipaccess()
3522 if (b43_read16(dev, B43_MMIO_TSF_CFP_START_HIGH) != 0xCCCC) in b43_validate_chipaccess()
3525 b43_write32(dev, B43_MMIO_TSF_CFP_START, 0); in b43_validate_chipaccess()
3527 v = b43_read32(dev, B43_MMIO_MACCTL); in b43_validate_chipaccess()
3534 b43err(dev->wl, "Failed to validate the chipaccess\n"); in b43_validate_chipaccess()
3538 static void b43_security_init(struct b43_wldev *dev) in b43_security_init() argument
3540 dev->ktp = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_KTP); in b43_security_init()
3544 dev->ktp *= 2; in b43_security_init()
3546 b43_write16(dev, B43_MMIO_RCMTA_COUNT, B43_NR_PAIRWISE_KEYS); in b43_security_init()
3548 b43_clear_keys(dev); in b43_security_init()
3555 struct b43_wldev *dev; in b43_rng_read() local
3559 dev = wl->current_dev; in b43_rng_read()
3560 if (likely(dev && b43_status(dev) >= B43_STAT_INITIALIZED)) { in b43_rng_read()
3561 *data = b43_read16(dev, B43_MMIO_RNG); in b43_rng_read()
3603 struct b43_wldev *dev; in b43_tx_work() local
3609 dev = wl->current_dev; in b43_tx_work()
3610 if (unlikely(!dev || b43_status(dev) < B43_STAT_STARTED)) { in b43_tx_work()
3618 if (b43_using_pio_transfers(dev)) in b43_tx_work()
3619 err = b43_pio_tx(dev, skb); in b43_tx_work()
3621 err = b43_dma_tx(dev, skb); in b43_tx_work()
3638 dev->tx_count++; in b43_tx_work()
3664 static void b43_qos_params_upload(struct b43_wldev *dev, in b43_qos_params_upload() argument
3672 if (!dev->qos_enabled) in b43_qos_params_upload()
3675 bslots = b43_read16(dev, B43_MMIO_RNG) & p->cw_min; in b43_qos_params_upload()
3689 tmp = b43_shm_read16(dev, B43_SHM_SHARED, in b43_qos_params_upload()
3693 b43_shm_write16(dev, B43_SHM_SHARED, in b43_qos_params_upload()
3697 b43_shm_write16(dev, B43_SHM_SHARED, in b43_qos_params_upload()
3714 static void b43_qos_upload_all(struct b43_wldev *dev) in b43_qos_upload_all() argument
3716 struct b43_wl *wl = dev->wl; in b43_qos_upload_all()
3720 if (!dev->qos_enabled) in b43_qos_upload_all()
3726 b43_mac_suspend(dev); in b43_qos_upload_all()
3729 b43_qos_params_upload(dev, &(params->p), in b43_qos_upload_all()
3732 b43_mac_enable(dev); in b43_qos_upload_all()
3780 static void b43_qos_init(struct b43_wldev *dev) in b43_qos_init() argument
3782 if (!dev->qos_enabled) { in b43_qos_init()
3784 b43_hf_write(dev, b43_hf_read(dev) & ~B43_HF_EDCF); in b43_qos_init()
3785 b43_write16(dev, B43_MMIO_IFSCTL, in b43_qos_init()
3786 b43_read16(dev, B43_MMIO_IFSCTL) in b43_qos_init()
3788 b43dbg(dev->wl, "QoS disabled\n"); in b43_qos_init()
3793 b43_qos_upload_all(dev); in b43_qos_init()
3796 b43_hf_write(dev, b43_hf_read(dev) | B43_HF_EDCF); in b43_qos_init()
3797 b43_write16(dev, B43_MMIO_IFSCTL, in b43_qos_init()
3798 b43_read16(dev, B43_MMIO_IFSCTL) in b43_qos_init()
3800 b43dbg(dev->wl, "QoS enabled\n"); in b43_qos_init()
3808 struct b43_wldev *dev; in b43_op_conf_tx() local
3822 dev = wl->current_dev; in b43_op_conf_tx()
3823 if (unlikely(!dev || (b43_status(dev) < B43_STAT_INITIALIZED))) in b43_op_conf_tx()
3827 b43_mac_suspend(dev); in b43_op_conf_tx()
3828 b43_qos_params_upload(dev, &(wl->qos_params[queue].p), in b43_op_conf_tx()
3830 b43_mac_enable(dev); in b43_op_conf_tx()
3854 struct b43_wldev *dev; in b43_op_get_tsf() local
3858 dev = wl->current_dev; in b43_op_get_tsf()
3860 if (dev && (b43_status(dev) >= B43_STAT_INITIALIZED)) in b43_op_get_tsf()
3861 b43_tsf_read(dev, &tsf); in b43_op_get_tsf()
3874 struct b43_wldev *dev; in b43_op_set_tsf() local
3877 dev = wl->current_dev; in b43_op_set_tsf()
3879 if (dev && (b43_status(dev) >= B43_STAT_INITIALIZED)) in b43_op_set_tsf()
3880 b43_tsf_write(dev, tsf); in b43_op_set_tsf()
3900 static int b43_switch_band(struct b43_wldev *dev, in b43_switch_band() argument
3903 struct b43_phy *phy = &dev->phy; in b43_switch_band()
3921 b43err(dev->wl, "This device doesn't support %s-GHz band\n", in b43_switch_band()
3931 b43dbg(dev->wl, "Switching to %s GHz band\n", in b43_switch_band()
3936 b43_software_rfkill(dev, true); in b43_switch_band()
3939 b43_phy_put_into_reset(dev); in b43_switch_band()
3940 switch (dev->dev->bus_type) { in b43_switch_band()
3943 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); in b43_switch_band()
3948 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); in b43_switch_band()
3953 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); in b43_switch_band()
3958 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); in b43_switch_band()
3962 b43_phy_take_out_of_reset(dev); in b43_switch_band()
3964 b43_upload_initvals_band(dev); in b43_switch_band()
3966 b43_phy_init(dev); in b43_switch_band()
3971 static void b43_set_beacon_listen_interval(struct b43_wldev *dev, u16 interval) in b43_set_beacon_listen_interval() argument
3974 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_BCN_LI, interval); in b43_set_beacon_listen_interval()
3978 static void b43_set_retry_limits(struct b43_wldev *dev, in b43_set_retry_limits() argument
3987 b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_SRLIMIT, in b43_set_retry_limits()
3989 b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_LRLIMIT, in b43_set_retry_limits()
3996 struct b43_wldev *dev = wl->current_dev; in b43_op_config() local
3997 struct b43_phy *phy = &dev->phy; in b43_op_config()
4003 b43_mac_suspend(dev); in b43_op_config()
4006 b43_set_beacon_listen_interval(dev, conf->listen_interval); in b43_op_config()
4013 err = b43_switch_band(dev, conf->chandef.chan); in b43_op_config()
4020 b43_switch_channel(dev, phy->channel); in b43_op_config()
4024 b43_set_retry_limits(dev, conf->short_frame_max_tx_count, in b43_op_config()
4030 dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR); in b43_op_config()
4036 b43_phy_txpower_check(dev, B43_TXPWR_IGNORE_TIME | in b43_op_config()
4043 b43_mgmtframe_txantenna(dev, antenna); in b43_op_config()
4046 phy->ops->set_rx_antenna(dev, antenna); in b43_op_config()
4050 b43_software_rfkill(dev, false); in b43_op_config()
4051 b43info(dev->wl, "Radio turned on by software\n"); in b43_op_config()
4052 if (!dev->radio_hw_enable) { in b43_op_config()
4053 b43info(dev->wl, "The hardware RF-kill button " in b43_op_config()
4058 b43_software_rfkill(dev, true); in b43_op_config()
4059 b43info(dev->wl, "Radio turned off by software\n"); in b43_op_config()
4064 b43_mac_enable(dev); in b43_op_config()
4070 static void b43_update_basic_rates(struct b43_wldev *dev, u32 brates) in b43_update_basic_rates() argument
4073 dev->wl->hw->wiphy->bands[b43_current_band(dev->wl)]; in b43_update_basic_rates()
4107 rateptr = b43_shm_read16(dev, B43_SHM_SHARED, in b43_update_basic_rates()
4110 b43_shm_write16(dev, B43_SHM_SHARED, basic + 2 * offset, in b43_update_basic_rates()
4121 struct b43_wldev *dev; in b43_op_bss_info_changed() local
4125 dev = wl->current_dev; in b43_op_bss_info_changed()
4126 if (!dev || b43_status(dev) < B43_STAT_STARTED) in b43_op_bss_info_changed()
4138 if (b43_status(dev) >= B43_STAT_INITIALIZED) { in b43_op_bss_info_changed()
4146 b43_write_mac_bssid_templates(dev); in b43_op_bss_info_changed()
4149 b43_mac_suspend(dev); in b43_op_bss_info_changed()
4157 b43_set_beacon_int(dev, conf->beacon_int); in b43_op_bss_info_changed()
4160 b43_update_basic_rates(dev, conf->basic_rates); in b43_op_bss_info_changed()
4164 b43_short_slot_timing_enable(dev); in b43_op_bss_info_changed()
4166 b43_short_slot_timing_disable(dev); in b43_op_bss_info_changed()
4169 b43_mac_enable(dev); in b43_op_bss_info_changed()
4179 struct b43_wldev *dev; in b43_op_set_key() local
4204 dev = wl->current_dev; in b43_op_set_key()
4206 if (!dev || b43_status(dev) < B43_STAT_INITIALIZED) in b43_op_set_key()
4209 if (dev->fw.pcm_request_failed || !dev->hwcrypto_enabled) { in b43_op_set_key()
4254 err = b43_key_write(dev, -1, algorithm, in b43_op_set_key()
4259 err = b43_key_write(dev, index, algorithm, in b43_op_set_key()
4267 b43_hf_write(dev, b43_hf_read(dev) | B43_HF_USEDEFKEYS); in b43_op_set_key()
4269 b43_hf_write(dev, in b43_op_set_key()
4270 b43_hf_read(dev) & ~B43_HF_USEDEFKEYS); in b43_op_set_key()
4277 err = b43_key_clear(dev, key->hw_key_idx); in b43_op_set_key()
4292 b43_dump_keymemory(dev); in b43_op_set_key()
4304 struct b43_wldev *dev; in b43_op_configure_filter() local
4307 dev = wl->current_dev; in b43_op_configure_filter()
4308 if (!dev) { in b43_op_configure_filter()
4331 if (changed && b43_status(dev) >= B43_STAT_INITIALIZED) in b43_op_configure_filter()
4332 b43_adjust_opmode(dev); in b43_op_configure_filter()
4341 static struct b43_wldev * b43_wireless_core_stop(struct b43_wldev *dev) in b43_wireless_core_stop() argument
4348 if (!dev) in b43_wireless_core_stop()
4350 wl = dev->wl; in b43_wireless_core_stop()
4352 if (!dev || b43_status(dev) < B43_STAT_STARTED) in b43_wireless_core_stop()
4353 return dev; in b43_wireless_core_stop()
4357 cancel_delayed_work_sync(&dev->periodic_work); in b43_wireless_core_stop()
4359 b43_leds_stop(dev); in b43_wireless_core_stop()
4361 dev = wl->current_dev; in b43_wireless_core_stop()
4362 if (!dev || b43_status(dev) < B43_STAT_STARTED) { in b43_wireless_core_stop()
4364 return dev; in b43_wireless_core_stop()
4368 b43_set_status(dev, B43_STAT_INITIALIZED); in b43_wireless_core_stop()
4369 if (b43_bus_host_is_sdio(dev->dev)) { in b43_wireless_core_stop()
4371 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0); in b43_wireless_core_stop()
4372 b43_read32(dev, B43_MMIO_GEN_IRQ_MASK); /* Flush */ in b43_wireless_core_stop()
4375 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0); in b43_wireless_core_stop()
4376 b43_read32(dev, B43_MMIO_GEN_IRQ_MASK); /* Flush */ in b43_wireless_core_stop()
4380 orig_dev = dev; in b43_wireless_core_stop()
4382 if (b43_bus_host_is_sdio(dev->dev)) { in b43_wireless_core_stop()
4383 b43_sdio_free_irq(dev); in b43_wireless_core_stop()
4385 synchronize_irq(dev->dev->irq); in b43_wireless_core_stop()
4386 free_irq(dev->dev->irq, dev); in b43_wireless_core_stop()
4389 dev = wl->current_dev; in b43_wireless_core_stop()
4390 if (!dev) in b43_wireless_core_stop()
4391 return dev; in b43_wireless_core_stop()
4392 if (dev != orig_dev) { in b43_wireless_core_stop()
4393 if (b43_status(dev) >= B43_STAT_STARTED) in b43_wireless_core_stop()
4395 return dev; in b43_wireless_core_stop()
4397 mask = b43_read32(dev, B43_MMIO_GEN_IRQ_MASK); in b43_wireless_core_stop()
4410 b43_mac_suspend(dev); in b43_wireless_core_stop()
4411 b43_leds_exit(dev); in b43_wireless_core_stop()
4414 return dev; in b43_wireless_core_stop()
4418 static int b43_wireless_core_start(struct b43_wldev *dev) in b43_wireless_core_start() argument
4422 B43_WARN_ON(b43_status(dev) != B43_STAT_INITIALIZED); in b43_wireless_core_start()
4424 drain_txstatus_queue(dev); in b43_wireless_core_start()
4425 if (b43_bus_host_is_sdio(dev->dev)) { in b43_wireless_core_start()
4426 err = b43_sdio_request_irq(dev, b43_sdio_interrupt_handler); in b43_wireless_core_start()
4428 b43err(dev->wl, "Cannot request SDIO IRQ\n"); in b43_wireless_core_start()
4432 err = request_threaded_irq(dev->dev->irq, b43_interrupt_handler, in b43_wireless_core_start()
4434 IRQF_SHARED, KBUILD_MODNAME, dev); in b43_wireless_core_start()
4436 b43err(dev->wl, "Cannot request IRQ-%d\n", in b43_wireless_core_start()
4437 dev->dev->irq); in b43_wireless_core_start()
4443 ieee80211_wake_queues(dev->wl->hw); in b43_wireless_core_start()
4444 b43_set_status(dev, B43_STAT_STARTED); in b43_wireless_core_start()
4447 b43_mac_enable(dev); in b43_wireless_core_start()
4448 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask); in b43_wireless_core_start()
4451 b43_periodic_tasks_setup(dev); in b43_wireless_core_start()
4453 b43_leds_init(dev); in b43_wireless_core_start()
4455 b43dbg(dev->wl, "Wireless interface started\n"); in b43_wireless_core_start()
4460 static char *b43_phy_name(struct b43_wldev *dev, u8 phy_type) in b43_phy_name() argument
4490 static int b43_phy_versioning(struct b43_wldev *dev) in b43_phy_versioning() argument
4492 struct b43_phy *phy = &dev->phy; in b43_phy_versioning()
4493 const u8 core_rev = dev->dev->core_rev; in b43_phy_versioning()
4505 tmp = b43_read16(dev, B43_MMIO_PHY_VER); in b43_phy_versioning()
4557 b43err(dev->wl, "FOUND UNSUPPORTED PHY (Analog %u, Type %d (%s), Revision %u)\n", in b43_phy_versioning()
4558 analog_type, phy_type, b43_phy_name(dev, phy_type), in b43_phy_versioning()
4562 b43info(dev->wl, "Found PHY: Analog %u, Type %d (%s), Revision %u\n", in b43_phy_versioning()
4563 analog_type, phy_type, b43_phy_name(dev, phy_type), phy_rev); in b43_phy_versioning()
4569 b43_write16f(dev, B43_MMIO_RADIO24_CONTROL, 0); in b43_phy_versioning()
4570 radio_rev = b43_read16(dev, B43_MMIO_RADIO24_DATA); in b43_phy_versioning()
4572 b43_write16f(dev, B43_MMIO_RADIO24_CONTROL, 1); in b43_phy_versioning()
4573 radio_id = b43_read16(dev, B43_MMIO_RADIO24_DATA); in b43_phy_versioning()
4580 b43_write16f(dev, B43_MMIO_RADIO24_CONTROL, tmp); in b43_phy_versioning()
4581 radio24[tmp] = b43_read16(dev, B43_MMIO_RADIO24_DATA); in b43_phy_versioning()
4589 if (dev->dev->chip_id == 0x4317) { in b43_phy_versioning()
4590 if (dev->dev->chip_rev == 0) in b43_phy_versioning()
4592 else if (dev->dev->chip_rev == 1) in b43_phy_versioning()
4597 b43_write16f(dev, B43_MMIO_RADIO_CONTROL, in b43_phy_versioning()
4599 tmp = b43_read16(dev, B43_MMIO_RADIO_DATA_LOW); in b43_phy_versioning()
4600 b43_write16f(dev, B43_MMIO_RADIO_CONTROL, in b43_phy_versioning()
4602 tmp |= b43_read16(dev, B43_MMIO_RADIO_DATA_HIGH) << 16; in b43_phy_versioning()
4657 b43err(dev->wl, in b43_phy_versioning()
4662 b43info(dev->wl, in b43_phy_versioning()
4678 static void setup_struct_phy_for_init(struct b43_wldev *dev, in setup_struct_phy_for_init() argument
4692 static void setup_struct_wldev_for_init(struct b43_wldev *dev) in setup_struct_wldev_for_init() argument
4694 dev->dfq_valid = false; in setup_struct_wldev_for_init()
4698 dev->radio_hw_enable = true; in setup_struct_wldev_for_init()
4701 memset(&dev->stats, 0, sizeof(dev->stats)); in setup_struct_wldev_for_init()
4703 setup_struct_phy_for_init(dev, &dev->phy); in setup_struct_wldev_for_init()
4706 dev->irq_reason = 0; in setup_struct_wldev_for_init()
4707 memset(dev->dma_reason, 0, sizeof(dev->dma_reason)); in setup_struct_wldev_for_init()
4708 dev->irq_mask = B43_IRQ_MASKTEMPLATE; in setup_struct_wldev_for_init()
4710 dev->irq_mask &= ~B43_IRQ_PHY_TXERR; in setup_struct_wldev_for_init()
4712 dev->mac_suspended = 1; in setup_struct_wldev_for_init()
4715 memset(&dev->noisecalc, 0, sizeof(dev->noisecalc)); in setup_struct_wldev_for_init()
4718 static void b43_bluetooth_coext_enable(struct b43_wldev *dev) in b43_bluetooth_coext_enable() argument
4720 struct ssb_sprom *sprom = dev->dev->bus_sprom; in b43_bluetooth_coext_enable()
4727 if (dev->phy.type != B43_PHYTYPE_B && !dev->phy.gmode) in b43_bluetooth_coext_enable()
4730 hf = b43_hf_read(dev); in b43_bluetooth_coext_enable()
4735 b43_hf_write(dev, hf); in b43_bluetooth_coext_enable()
4738 static void b43_bluetooth_coext_disable(struct b43_wldev *dev) in b43_bluetooth_coext_disable() argument
4745 static void b43_imcfglo_timeouts_workaround(struct b43_wldev *dev) in b43_imcfglo_timeouts_workaround() argument
4751 if (dev->dev->bus_type != B43_BUS_SSB) in b43_imcfglo_timeouts_workaround()
4757 bus = dev->dev->sdev->bus; in b43_imcfglo_timeouts_workaround()
4761 tmp = ssb_read32(dev->dev->sdev, SSB_IMCFGLO); in b43_imcfglo_timeouts_workaround()
4765 ssb_write32(dev->dev->sdev, SSB_IMCFGLO, tmp); in b43_imcfglo_timeouts_workaround()
4770 static void b43_set_synth_pu_delay(struct b43_wldev *dev, bool idle) in b43_set_synth_pu_delay() argument
4775 if (dev->phy.type == B43_PHYTYPE_A) in b43_set_synth_pu_delay()
4779 if (b43_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle) in b43_set_synth_pu_delay()
4781 if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8)) in b43_set_synth_pu_delay()
4784 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_SPUWKUP, pu_delay); in b43_set_synth_pu_delay()
4788 static void b43_set_pretbtt(struct b43_wldev *dev) in b43_set_pretbtt() argument
4793 if (b43_is_mode(dev->wl, NL80211_IFTYPE_ADHOC)) { in b43_set_pretbtt()
4796 if (dev->phy.type == B43_PHYTYPE_A) in b43_set_pretbtt()
4801 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PRETBTT, pretbtt); in b43_set_pretbtt()
4802 b43_write16(dev, B43_MMIO_TSF_CFP_PRETBTT, pretbtt); in b43_set_pretbtt()
4807 static void b43_wireless_core_exit(struct b43_wldev *dev) in b43_wireless_core_exit() argument
4809 B43_WARN_ON(dev && b43_status(dev) > B43_STAT_INITIALIZED); in b43_wireless_core_exit()
4810 if (!dev || b43_status(dev) != B43_STAT_INITIALIZED) in b43_wireless_core_exit()
4813 b43_set_status(dev, B43_STAT_UNINIT); in b43_wireless_core_exit()
4816 b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_PSM_RUN, in b43_wireless_core_exit()
4819 switch (dev->dev->bus_type) { in b43_wireless_core_exit()
4822 bcma_host_pci_down(dev->dev->bdev->bus); in b43_wireless_core_exit()
4832 b43_dma_free(dev); in b43_wireless_core_exit()
4833 b43_pio_free(dev); in b43_wireless_core_exit()
4834 b43_chip_exit(dev); in b43_wireless_core_exit()
4835 dev->phy.ops->switch_analog(dev, 0); in b43_wireless_core_exit()
4836 if (dev->wl->current_beacon) { in b43_wireless_core_exit()
4837 dev_kfree_skb_any(dev->wl->current_beacon); in b43_wireless_core_exit()
4838 dev->wl->current_beacon = NULL; in b43_wireless_core_exit()
4841 b43_device_disable(dev, 0); in b43_wireless_core_exit()
4842 b43_bus_may_powerdown(dev); in b43_wireless_core_exit()
4846 static int b43_wireless_core_init(struct b43_wldev *dev) in b43_wireless_core_init() argument
4848 struct ssb_sprom *sprom = dev->dev->bus_sprom; in b43_wireless_core_init()
4849 struct b43_phy *phy = &dev->phy; in b43_wireless_core_init()
4853 B43_WARN_ON(b43_status(dev) != B43_STAT_UNINIT); in b43_wireless_core_init()
4855 err = b43_bus_powerup(dev, 0); in b43_wireless_core_init()
4858 if (!b43_device_is_enabled(dev)) in b43_wireless_core_init()
4859 b43_wireless_core_reset(dev, phy->gmode); in b43_wireless_core_init()
4862 setup_struct_wldev_for_init(dev); in b43_wireless_core_init()
4863 phy->ops->prepare_structs(dev); in b43_wireless_core_init()
4866 switch (dev->dev->bus_type) { in b43_wireless_core_init()
4869 bcma_host_pci_irq_ctl(dev->dev->bdev->bus, in b43_wireless_core_init()
4870 dev->dev->bdev, true); in b43_wireless_core_init()
4871 bcma_host_pci_up(dev->dev->bdev->bus); in b43_wireless_core_init()
4876 ssb_pcicore_dev_irqvecs_enable(&dev->dev->sdev->bus->pcicore, in b43_wireless_core_init()
4877 dev->dev->sdev); in b43_wireless_core_init()
4882 b43_imcfglo_timeouts_workaround(dev); in b43_wireless_core_init()
4883 b43_bluetooth_coext_disable(dev); in b43_wireless_core_init()
4885 err = phy->ops->prepare_hardware(dev); in b43_wireless_core_init()
4889 err = b43_chip_init(dev); in b43_wireless_core_init()
4892 b43_shm_write16(dev, B43_SHM_SHARED, in b43_wireless_core_init()
4893 B43_SHM_SH_WLCOREREV, dev->dev->core_rev); in b43_wireless_core_init()
4894 hf = b43_hf_read(dev); in b43_wireless_core_init()
4911 if (dev->dev->bus_type == B43_BUS_SSB && in b43_wireless_core_init()
4912 dev->dev->sdev->bus->bustype == SSB_BUSTYPE_PCI && in b43_wireless_core_init()
4913 dev->dev->sdev->bus->pcicore.dev->id.revision <= 10) in b43_wireless_core_init()
4917 b43_hf_write(dev, hf); in b43_wireless_core_init()
4920 if (dev->dev->core_rev >= 13) { in b43_wireless_core_init()
4921 u32 mac_hw_cap = b43_read32(dev, B43_MMIO_MAC_HW_CAP); in b43_wireless_core_init()
4923 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_MACHW_L, in b43_wireless_core_init()
4925 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_MACHW_H, in b43_wireless_core_init()
4929 b43_set_retry_limits(dev, B43_DEFAULT_SHORT_RETRY_LIMIT, in b43_wireless_core_init()
4931 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_SFFBLIM, 3); in b43_wireless_core_init()
4932 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_LFFBLIM, 2); in b43_wireless_core_init()
4938 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PRMAXTIME, 1); in b43_wireless_core_init()
4940 b43_rate_memory_init(dev); in b43_wireless_core_init()
4941 b43_set_phytxctl_defaults(dev); in b43_wireless_core_init()
4945 b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_MINCONT, 0x1F); in b43_wireless_core_init()
4947 b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_MINCONT, 0xF); in b43_wireless_core_init()
4949 b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_MAXCONT, 0x3FF); in b43_wireless_core_init()
4952 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PHYTYPE, phy->type); in b43_wireless_core_init()
4953 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PHYVER, phy->rev); in b43_wireless_core_init()
4955 if (b43_bus_host_is_pcmcia(dev->dev) || in b43_wireless_core_init()
4956 b43_bus_host_is_sdio(dev->dev)) { in b43_wireless_core_init()
4957 dev->__using_pio_transfers = true; in b43_wireless_core_init()
4958 err = b43_pio_init(dev); in b43_wireless_core_init()
4959 } else if (dev->use_pio) { in b43_wireless_core_init()
4960 b43warn(dev->wl, "Forced PIO by use_pio module parameter. " in b43_wireless_core_init()
4963 dev->__using_pio_transfers = true; in b43_wireless_core_init()
4964 err = b43_pio_init(dev); in b43_wireless_core_init()
4966 dev->__using_pio_transfers = false; in b43_wireless_core_init()
4967 err = b43_dma_init(dev); in b43_wireless_core_init()
4971 b43_qos_init(dev); in b43_wireless_core_init()
4972 b43_set_synth_pu_delay(dev, 1); in b43_wireless_core_init()
4973 b43_bluetooth_coext_enable(dev); in b43_wireless_core_init()
4975 b43_bus_powerup(dev, !(sprom->boardflags_lo & B43_BFL_XTAL_NOSLOW)); in b43_wireless_core_init()
4976 b43_upload_card_macaddress(dev); in b43_wireless_core_init()
4977 b43_security_init(dev); in b43_wireless_core_init()
4979 ieee80211_wake_queues(dev->wl->hw); in b43_wireless_core_init()
4981 b43_set_status(dev, B43_STAT_INITIALIZED); in b43_wireless_core_init()
4987 b43_chip_exit(dev); in b43_wireless_core_init()
4989 b43_bus_may_powerdown(dev); in b43_wireless_core_init()
4990 B43_WARN_ON(b43_status(dev) != B43_STAT_UNINIT); in b43_wireless_core_init()
4998 struct b43_wldev *dev; in b43_op_add_interface() local
5016 dev = wl->current_dev; in b43_op_add_interface()
5022 b43_adjust_opmode(dev); in b43_op_add_interface()
5023 b43_set_pretbtt(dev); in b43_op_add_interface()
5024 b43_set_synth_pu_delay(dev, 0); in b43_op_add_interface()
5025 b43_upload_card_macaddress(dev); in b43_op_add_interface()
5041 struct b43_wldev *dev = wl->current_dev; in b43_op_remove_interface() local
5053 b43_adjust_opmode(dev); in b43_op_remove_interface()
5055 b43_upload_card_macaddress(dev); in b43_op_remove_interface()
5063 struct b43_wldev *dev = wl->current_dev; in b43_op_start() local
5082 if (b43_status(dev) < B43_STAT_INITIALIZED) { in b43_op_start()
5083 err = b43_wireless_core_init(dev); in b43_op_start()
5089 if (b43_status(dev) < B43_STAT_STARTED) { in b43_op_start()
5090 err = b43_wireless_core_start(dev); in b43_op_start()
5093 b43_wireless_core_exit(dev); in b43_op_start()
5119 struct b43_wldev *dev = wl->current_dev; in b43_op_stop() local
5123 if (!dev) in b43_op_stop()
5127 if (b43_status(dev) >= B43_STAT_STARTED) { in b43_op_stop()
5128 dev = b43_wireless_core_stop(dev); in b43_op_stop()
5129 if (!dev) in b43_op_stop()
5132 b43_wireless_core_exit(dev); in b43_op_stop()
5166 struct b43_wldev *dev; in b43_op_sw_scan_start_notifier() local
5169 dev = wl->current_dev; in b43_op_sw_scan_start_notifier()
5170 if (dev && (b43_status(dev) >= B43_STAT_INITIALIZED)) { in b43_op_sw_scan_start_notifier()
5172 b43_hf_write(dev, b43_hf_read(dev) | B43_HF_SKCFPUP); in b43_op_sw_scan_start_notifier()
5181 struct b43_wldev *dev; in b43_op_sw_scan_complete_notifier() local
5184 dev = wl->current_dev; in b43_op_sw_scan_complete_notifier()
5185 if (dev && (b43_status(dev) >= B43_STAT_INITIALIZED)) { in b43_op_sw_scan_complete_notifier()
5187 b43_hf_write(dev, b43_hf_read(dev) & ~B43_HF_SKCFPUP); in b43_op_sw_scan_complete_notifier()
5196 struct b43_wldev *dev = wl->current_dev; in b43_op_get_survey() local
5204 survey->noise = dev->stats.link_noise; in b43_op_get_survey()
5237 struct b43_wldev *dev = in b43_chip_reset() local
5239 struct b43_wl *wl = dev->wl; in b43_chip_reset()
5245 prev_status = b43_status(dev); in b43_chip_reset()
5248 dev = b43_wireless_core_stop(dev); in b43_chip_reset()
5249 if (!dev) { in b43_chip_reset()
5255 b43_wireless_core_exit(dev); in b43_chip_reset()
5259 err = b43_wireless_core_init(dev); in b43_chip_reset()
5264 err = b43_wireless_core_start(dev); in b43_chip_reset()
5266 b43_wireless_core_exit(dev); in b43_chip_reset()
5288 static int b43_setup_bands(struct b43_wldev *dev, in b43_setup_bands() argument
5291 struct ieee80211_hw *hw = dev->wl->hw; in b43_setup_bands()
5292 struct b43_phy *phy = &dev->phy; in b43_setup_bands()
5305 if (dev->phy.type == B43_PHYTYPE_N) { in b43_setup_bands()
5315 dev->phy.supports_2ghz = have_2ghz_phy; in b43_setup_bands()
5316 dev->phy.supports_5ghz = have_5ghz_phy; in b43_setup_bands()
5321 static void b43_wireless_core_detach(struct b43_wldev *dev) in b43_wireless_core_detach() argument
5325 b43_release_firmware(dev); in b43_wireless_core_detach()
5326 b43_phy_free(dev); in b43_wireless_core_detach()
5329 static void b43_supported_bands(struct b43_wldev *dev, bool *have_2ghz_phy, in b43_supported_bands() argument
5335 if (dev->dev->bus_type == B43_BUS_BCMA && in b43_supported_bands()
5336 dev->dev->bdev->bus->hosttype == BCMA_HOSTTYPE_PCI) in b43_supported_bands()
5337 dev_id = dev->dev->bdev->bus->host_pci->device; in b43_supported_bands()
5340 if (dev->dev->bus_type == B43_BUS_SSB && in b43_supported_bands()
5341 dev->dev->sdev->bus->bustype == SSB_BUSTYPE_PCI) in b43_supported_bands()
5342 dev_id = dev->dev->sdev->bus->host_pci->device; in b43_supported_bands()
5345 if (dev->dev->bus_sprom->dev_id) in b43_supported_bands()
5346 dev_id = dev->dev->bus_sprom->dev_id; in b43_supported_bands()
5369 if (dev->phy.type != B43_PHYTYPE_G) in b43_supported_bands()
5388 switch (dev->phy.type) { in b43_supported_bands()
5406 static int b43_wireless_core_attach(struct b43_wldev *dev) in b43_wireless_core_attach() argument
5408 struct b43_wl *wl = dev->wl; in b43_wireless_core_attach()
5409 struct b43_phy *phy = &dev->phy; in b43_wireless_core_attach()
5421 err = b43_bus_powerup(dev, 0); in b43_wireless_core_attach()
5430 switch (dev->dev->bus_type) { in b43_wireless_core_attach()
5433 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOST); in b43_wireless_core_attach()
5440 if (dev->dev->core_rev >= 5) { in b43_wireless_core_attach()
5441 tmp = ssb_read32(dev->dev->sdev, SSB_TMSHIGH); in b43_wireless_core_attach()
5450 dev->phy.gmode = have_2ghz_phy; in b43_wireless_core_attach()
5451 b43_wireless_core_reset(dev, dev->phy.gmode); in b43_wireless_core_attach()
5454 err = b43_phy_versioning(dev); in b43_wireless_core_attach()
5459 b43_supported_bands(dev, &have_2ghz_phy, &have_5ghz_phy); in b43_wireless_core_attach()
5463 switch (dev->phy.type) { in b43_wireless_core_attach()
5479 err = b43_phy_allocate(dev); in b43_wireless_core_attach()
5483 dev->phy.gmode = have_2ghz_phy; in b43_wireless_core_attach()
5484 b43_wireless_core_reset(dev, dev->phy.gmode); in b43_wireless_core_attach()
5486 err = b43_validate_chipaccess(dev); in b43_wireless_core_attach()
5489 err = b43_setup_bands(dev, have_2ghz_phy, have_5ghz_phy); in b43_wireless_core_attach()
5495 wl->current_dev = dev; in b43_wireless_core_attach()
5496 INIT_WORK(&dev->restart_work, b43_chip_reset); in b43_wireless_core_attach()
5498 dev->phy.ops->switch_analog(dev, 0); in b43_wireless_core_attach()
5499 b43_device_disable(dev, 0); in b43_wireless_core_attach()
5500 b43_bus_may_powerdown(dev); in b43_wireless_core_attach()
5506 b43_phy_free(dev); in b43_wireless_core_attach()
5508 b43_bus_may_powerdown(dev); in b43_wireless_core_attach()
5512 static void b43_one_core_detach(struct b43_bus_dev *dev) in b43_one_core_detach() argument
5520 wldev = b43_bus_get_wldev(dev); in b43_one_core_detach()
5525 b43_bus_set_wldev(dev, NULL); in b43_one_core_detach()
5529 static int b43_one_core_attach(struct b43_bus_dev *dev, struct b43_wl *wl) in b43_one_core_attach() argument
5539 wldev->dev = dev; in b43_one_core_attach()
5549 b43_bus_set_wldev(dev, wldev); in b43_one_core_attach()
5591 static void b43_wireless_exit(struct b43_bus_dev *dev, struct b43_wl *wl) in b43_wireless_exit() argument
5595 ssb_set_devtypedata(dev->sdev, NULL); in b43_wireless_exit()
5600 static struct b43_wl *b43_wireless_init(struct b43_bus_dev *dev) in b43_wireless_init() argument
5602 struct ssb_sprom *sprom = dev->bus_sprom; in b43_wireless_init()
5630 SET_IEEE80211_DEV(hw, dev->dev); in b43_wireless_init()
5652 (dev->chip_id > 0x9999) ? "%d" : "%04X", dev->chip_id); in b43_wireless_init()
5654 dev->core_rev); in b43_wireless_init()
5661 struct b43_bus_dev *dev; in b43_bcma_probe() local
5671 dev = b43_bus_dev_bcma_init(core); in b43_bcma_probe()
5672 if (!dev) in b43_bcma_probe()
5675 wl = b43_wireless_init(dev); in b43_bcma_probe()
5681 err = b43_one_core_attach(dev, wl); in b43_bcma_probe()
5715 b43_one_core_detach(wldev->dev); in b43_bcma_remove()
5737 struct b43_bus_dev *dev; in b43_ssb_probe() local
5741 dev = b43_bus_dev_ssb_init(sdev); in b43_ssb_probe()
5742 if (!dev) in b43_ssb_probe()
5754 wl = b43_wireless_init(dev); in b43_ssb_probe()
5762 err = b43_one_core_attach(dev, wl); in b43_ssb_probe()
5773 b43_wireless_exit(dev, wl); in b43_ssb_probe()
5775 kfree(dev); in b43_ssb_probe()
5783 struct b43_bus_dev *dev = wldev->dev; in b43_ssb_remove() local
5798 b43_one_core_detach(dev); in b43_ssb_remove()
5804 b43_wireless_exit(dev, wl); in b43_ssb_remove()
5816 void b43_controller_restart(struct b43_wldev *dev, const char *reason) in b43_controller_restart() argument
5819 if (b43_status(dev) < B43_STAT_INITIALIZED) in b43_controller_restart()
5821 b43info(dev->wl, "Controller RESET (%s) ...\n", reason); in b43_controller_restart()
5822 ieee80211_queue_work(dev->wl->hw, &dev->restart_work); in b43_controller_restart()