195 			b43_phy_mask(dev, en_addr, ~en_mask);  in b43_nphy_rf_ctl_override_rev7()
197 				b43_phy_mask(dev, val_addr, ~e->val_mask);  in b43_nphy_rf_ctl_override_rev7()
278 				b43_phy_mask(dev, en_addr, ~(field));  in b43_nphy_rf_ctl_override()
279 				b43_phy_mask(dev, val_addr,  in b43_nphy_rf_ctl_override()
293 			b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~(field));  in b43_nphy_rf_ctl_override()
323 			b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, 0xFFFE);  in b43_nphy_rf_ctl_override()
347 			b43_phy_mask(dev, 0x2ff, ~0x2000);  in b43_nphy_rf_ctl_intc_override_rev7()
354 			b43_phy_mask(dev, 0x2ff, ~0xC000 & 0xFFFF);  in b43_nphy_rf_ctl_intc_override_rev7()
378 			b43_phy_mask(dev, reg, ~tmp2);  in b43_nphy_rf_ctl_intc_override_rev7()
391 			b43_phy_mask(dev, reg, ~tmp2);  in b43_nphy_rf_ctl_intc_override_rev7()
444 				b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S1,  in b43_nphy_rf_ctl_intc_override()
463 				b43_phy_mask(dev, B43_NPHY_RFCTL_OVER,  in b43_nphy_rf_ctl_intc_override()
862 		b43_phy_mask(dev, B43_NPHY_REV7_RF_CTL_OVER3, ~0x2);  in b43_radio_2057_rcal()
1018 	b43_phy_mask(dev, B43_NPHY_RFCTL_CMD, ~B43_NPHY_RFCTL_CMD_CHIP0PU);  in b43_radio_2057_init_pre()
1020 	b43_phy_mask(dev, B43_NPHY_RFCTL_CMD, B43_NPHY_RFCTL_CMD_OEPORFORCE);  in b43_radio_2057_init_pre()
1345 	b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,  in b43_radio_init2056_pre()
1348 	b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,  in b43_radio_init2056_pre()
1438 	b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,  in b43_radio_init2055_pre()
1640 		b43_phy_mask(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x7FFF);  in b43_nphy_run_samples()
1757 		b43_phy_mask(dev, B43_NPHY_AFECTL_OVER1, 0xFDFF);  in b43_nphy_rev3_rssi_select()
1758 		b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, 0xFDFF);  in b43_nphy_rev3_rssi_select()
1759 		b43_phy_mask(dev, B43_NPHY_AFECTL_C1, 0xFCFF);  in b43_nphy_rev3_rssi_select()
1760 		b43_phy_mask(dev, B43_NPHY_AFECTL_C2, 0xFCFF);  in b43_nphy_rev3_rssi_select()
1761 		b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S0, 0xFFDF);  in b43_nphy_rev3_rssi_select()
1762 		b43_phy_mask(dev, B43_NPHY_TXF_40CO_B32S1, 0xFFDF);  in b43_nphy_rev3_rssi_select()
1763 		b43_phy_mask(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0xFFC3);  in b43_nphy_rev3_rssi_select()
1764 		b43_phy_mask(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0xFFC3);  in b43_nphy_rev3_rssi_select()
1874 		b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, ~0x3000);  in b43_nphy_rev2_rssi_select()
1876 			b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,  in b43_nphy_rev2_rssi_select()
1879 			b43_phy_mask(dev, B43_NPHY_RFCTL_OVER,  in b43_nphy_rev2_rssi_select()
1884 			b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,  in b43_nphy_rev2_rssi_select()
1887 			b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~0x1);  in b43_nphy_rev2_rssi_select()
1905 			b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~0x1);  in b43_nphy_rev2_rssi_select()
2250 	b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S1, ~0x1);  in b43_nphy_rev3_rssi_cal()
2254 	b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~0x1);  in b43_nphy_rev3_rssi_cal()
3108 		b43_phy_mask(dev, B43_NPHY_AFECTL_C1, ~0x1);  in b43_nphy_workarounds_rev7plus()
3110 		b43_phy_mask(dev, B43_NPHY_AFECTL_C2, ~0x1);  in b43_nphy_workarounds_rev7plus()
3115 		b43_phy_mask(dev, B43_NPHY_AFECTL_C1, ~0x4);  in b43_nphy_workarounds_rev7plus()
3116 		b43_phy_mask(dev, B43_NPHY_AFECTL_OVER1, ~0x4);  in b43_nphy_workarounds_rev7plus()
3117 		b43_phy_mask(dev, B43_NPHY_AFECTL_C2, ~0x4);  in b43_nphy_workarounds_rev7plus()
3118 		b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, ~0x4);  in b43_nphy_workarounds_rev7plus()
3424 		b43_phy_mask(dev, B43_NPHY_SCRAM_SIGCTL,  in b43_nphy_workarounds_rev1_2()
3436 		b43_phy_mask(dev, B43_NPHY_PIL_DW1,  in b43_nphy_workarounds_rev1_2()
3520 		b43_phy_mask(dev, B43_NPHY_RFSEQMODE,  in b43_nphy_update_txrx_chain()
3538 		b43_phy_mask(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x7FFF);  in b43_nphy_stop_playback()
3540 	b43_phy_mask(dev, B43_NPHY_SAMP_CMD, ~0x0004);  in b43_nphy_stop_playback()
3647 		b43_phy_mask(dev, B43_NPHY_TXPCTL_CMD, ~tmp);  in b43_nphy_tx_power_ctrl()
3723 			b43_phy_mask(dev, B43_NPHY_AFECTL_OVER1, ~0x100);  in b43_nphy_tx_power_ctrl()
3724 			b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, ~0x100);  in b43_nphy_tx_power_ctrl()
3726 			b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, ~0x4000);  in b43_nphy_tx_power_ctrl()
3738 			b43_phy_mask(dev, B43_NPHY_PAPD_EN0, ~0x4);  in b43_nphy_tx_power_ctrl()
3739 			b43_phy_mask(dev, B43_NPHY_PAPD_EN1, ~0x4);  in b43_nphy_tx_power_ctrl()
3853 	b43_phy_mask(dev, B43_NPHY_BPHY_CTL2, ~B43_NPHY_BPHY_CTL2_LUT);  in b43_nphy_tx_power_fix()
4084 		b43_phy_mask(dev, B43_NPHY_TXPCTL_CMD,  in b43_nphy_tx_power_ctl_setup()
4360 		b43_phy_mask(dev, B43_NPHY_IQEST_CMD, ~B43_NPHY_IQEST_CMD_MODE);  in b43_nphy_rx_iq_est()
4452 	b43_phy_mask(dev, B43_NPHY_PAPD_EN0, ~0x0001);
4453 	b43_phy_mask(dev, B43_NPHY_PAPD_EN1, ~0x0001);
4466 		b43_phy_mask(dev, B43_NPHY_AFECTL_C1, ~0x0007);
4469 		b43_phy_mask(dev, B43_NPHY_AFECTL_C2, ~0x0007);
5144 		b43_phy_mask(dev, B43_NPHY_BBCFG,  in b43_nphy_tx_cal_phy_setup()
5168 		b43_phy_mask(dev, B43_NPHY_PAPD_EN0, ~0x0001);  in b43_nphy_tx_cal_phy_setup()
5169 		b43_phy_mask(dev, B43_NPHY_PAPD_EN1, ~0x0001);  in b43_nphy_tx_cal_phy_setup()
6104 	b43_phy_mask(dev, B43_NPHY_RFSEQMODE,  in b43_phy_initn()
6296 		b43_phy_mask(dev, B43_NPHY_BANDCTL, ~B43_NPHY_BANDCTL_5GHZ);  in b43_nphy_channel_setup()
6306 		b43_phy_mask(dev, B43_NPHY_BANDCTL, ~B43_NPHY_BANDCTL_5GHZ);  in b43_nphy_channel_setup()
6310 		b43_phy_mask(dev, B43_PHY_B_BBCFG,  in b43_nphy_channel_setup()
6323 			b43_phy_mask(dev, B43_PHY_B_TEST, ~0x840);  in b43_nphy_channel_setup()
6377 			b43_phy_mask(dev, B43_NPHY_BBCFG,  in b43_nphy_channel_setup()
6440 		b43_phy_mask(dev, B43_NPHY_RXCTL, ~B43_NPHY_RXCTL_BSELU20);  in b43_nphy_set_channel()
6442 			b43_phy_mask(dev, 0x310, (u16)~0x8000);  in b43_nphy_set_channel()
6621 			b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,  in b43_nphy_op_software_rfkill()
6626 			b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,  in b43_nphy_op_software_rfkill()