Lines Matching refs:ci
244 static void brcmf_chip_sb_corerev(struct brcmf_chip_priv *ci, in brcmf_chip_sb_corerev() argument
249 regdata = ci->ops->read32(ci->ctx, CORE_SB(core->base, sbidhigh)); in brcmf_chip_sb_corerev()
255 struct brcmf_chip_priv *ci; in brcmf_chip_sb_iscoreup() local
259 ci = core->chip; in brcmf_chip_sb_iscoreup()
261 regdata = ci->ops->read32(ci->ctx, address); in brcmf_chip_sb_iscoreup()
269 struct brcmf_chip_priv *ci; in brcmf_chip_ai_iscoreup() local
273 ci = core->chip; in brcmf_chip_ai_iscoreup()
274 regdata = ci->ops->read32(ci->ctx, core->wrapbase + BCMA_IOCTL); in brcmf_chip_ai_iscoreup()
277 regdata = ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL); in brcmf_chip_ai_iscoreup()
286 struct brcmf_chip_priv *ci; in brcmf_chip_sb_coredisable() local
289 ci = core->chip; in brcmf_chip_sb_coredisable()
291 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_coredisable()
295 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_coredisable()
301 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_coredisable()
302 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), in brcmf_chip_sb_coredisable()
305 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_coredisable()
307 SPINWAIT((ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatehigh)) in brcmf_chip_sb_coredisable()
310 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatehigh)); in brcmf_chip_sb_coredisable()
314 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbidlow)); in brcmf_chip_sb_coredisable()
316 val = ci->ops->read32(ci->ctx, in brcmf_chip_sb_coredisable()
319 ci->ops->write32(ci->ctx, in brcmf_chip_sb_coredisable()
321 val = ci->ops->read32(ci->ctx, in brcmf_chip_sb_coredisable()
324 SPINWAIT((ci->ops->read32(ci->ctx, in brcmf_chip_sb_coredisable()
332 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), val); in brcmf_chip_sb_coredisable()
333 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_coredisable()
337 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbidlow)); in brcmf_chip_sb_coredisable()
339 val = ci->ops->read32(ci->ctx, in brcmf_chip_sb_coredisable()
342 ci->ops->write32(ci->ctx, in brcmf_chip_sb_coredisable()
348 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), in brcmf_chip_sb_coredisable()
356 struct brcmf_chip_priv *ci; in brcmf_chip_ai_coredisable() local
359 ci = core->chip; in brcmf_chip_ai_coredisable()
362 regdata = ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL); in brcmf_chip_ai_coredisable()
367 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_IOCTL, in brcmf_chip_ai_coredisable()
369 ci->ops->read32(ci->ctx, core->wrapbase + BCMA_IOCTL); in brcmf_chip_ai_coredisable()
372 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_RESET_CTL, in brcmf_chip_ai_coredisable()
377 SPINWAIT(ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL) != in brcmf_chip_ai_coredisable()
382 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_IOCTL, in brcmf_chip_ai_coredisable()
384 ci->ops->read32(ci->ctx, core->wrapbase + BCMA_IOCTL); in brcmf_chip_ai_coredisable()
390 struct brcmf_chip_priv *ci; in brcmf_chip_sb_resetcore() local
394 ci = core->chip; in brcmf_chip_sb_resetcore()
407 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), in brcmf_chip_sb_resetcore()
410 regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_resetcore()
414 regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatehigh)); in brcmf_chip_sb_resetcore()
416 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatehigh), 0); in brcmf_chip_sb_resetcore()
418 regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbimstate)); in brcmf_chip_sb_resetcore()
421 ci->ops->write32(ci->ctx, CORE_SB(base, sbimstate), regdata); in brcmf_chip_sb_resetcore()
425 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), in brcmf_chip_sb_resetcore()
427 regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_resetcore()
431 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), in brcmf_chip_sb_resetcore()
433 regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_resetcore()
440 struct brcmf_chip_priv *ci; in brcmf_chip_ai_resetcore() local
443 ci = core->chip; in brcmf_chip_ai_resetcore()
449 while (ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL) & in brcmf_chip_ai_resetcore()
451 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_RESET_CTL, 0); in brcmf_chip_ai_resetcore()
458 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_IOCTL, in brcmf_chip_ai_resetcore()
460 ci->ops->read32(ci->ctx, core->wrapbase + BCMA_IOCTL); in brcmf_chip_ai_resetcore()
472 static struct brcmf_core *brcmf_chip_add_core(struct brcmf_chip_priv *ci, in brcmf_chip_add_core() argument
484 core->chip = ci; in brcmf_chip_add_core()
487 list_add_tail(&core->list, &ci->cores); in brcmf_chip_add_core()
492 static int brcmf_chip_cores_check(struct brcmf_chip_priv *ci) in brcmf_chip_cores_check() argument
500 list_for_each_entry(core, &ci->cores, list) { in brcmf_chip_cores_check()
640 static u32 brcmf_chip_tcm_rambase(struct brcmf_chip_priv *ci) in brcmf_chip_tcm_rambase() argument
642 switch (ci->pub.chip) { in brcmf_chip_tcm_rambase()
655 brcmf_err("unknown chip: %s\n", ci->pub.name); in brcmf_chip_tcm_rambase()
661 static int brcmf_chip_get_raminfo(struct brcmf_chip_priv *ci) in brcmf_chip_get_raminfo() argument
666 mem = brcmf_chip_get_core(&ci->pub, BCMA_CORE_ARM_CR4); in brcmf_chip_get_raminfo()
669 ci->pub.ramsize = brcmf_chip_tcm_ramsize(mem_core); in brcmf_chip_get_raminfo()
670 ci->pub.rambase = brcmf_chip_tcm_rambase(ci); in brcmf_chip_get_raminfo()
671 if (!ci->pub.rambase) { in brcmf_chip_get_raminfo()
676 mem = brcmf_chip_get_core(&ci->pub, BCMA_CORE_INTERNAL_MEM); in brcmf_chip_get_raminfo()
678 brcmf_chip_socram_ramsize(mem_core, &ci->pub.ramsize, in brcmf_chip_get_raminfo()
679 &ci->pub.srsize); in brcmf_chip_get_raminfo()
682 ci->pub.rambase, ci->pub.ramsize, ci->pub.ramsize, in brcmf_chip_get_raminfo()
683 ci->pub.srsize, ci->pub.srsize); in brcmf_chip_get_raminfo()
685 if (!ci->pub.ramsize) { in brcmf_chip_get_raminfo()
692 static u32 brcmf_chip_dmp_get_desc(struct brcmf_chip_priv *ci, u32 *eromaddr, in brcmf_chip_dmp_get_desc() argument
698 val = ci->ops->read32(ci->ctx, *eromaddr); in brcmf_chip_dmp_get_desc()
712 static int brcmf_chip_dmp_get_regaddr(struct brcmf_chip_priv *ci, u32 *eromaddr, in brcmf_chip_dmp_get_regaddr() argument
723 val = brcmf_chip_dmp_get_desc(ci, eromaddr, &desc); in brcmf_chip_dmp_get_regaddr()
739 val = brcmf_chip_dmp_get_desc(ci, eromaddr, &desc); in brcmf_chip_dmp_get_regaddr()
749 brcmf_chip_dmp_get_desc(ci, eromaddr, NULL); in brcmf_chip_dmp_get_regaddr()
755 val = brcmf_chip_dmp_get_desc(ci, eromaddr, NULL); in brcmf_chip_dmp_get_regaddr()
758 brcmf_chip_dmp_get_desc(ci, eromaddr, NULL); in brcmf_chip_dmp_get_regaddr()
778 int brcmf_chip_dmp_erom_scan(struct brcmf_chip_priv *ci) in brcmf_chip_dmp_erom_scan() argument
789 eromaddr = ci->ops->read32(ci->ctx, CORE_CC_REG(SI_ENUM_BASE, eromptr)); in brcmf_chip_dmp_erom_scan()
792 val = brcmf_chip_dmp_get_desc(ci, &eromaddr, &desc_type); in brcmf_chip_dmp_erom_scan()
806 val = brcmf_chip_dmp_get_desc(ci, &eromaddr, &desc_type); in brcmf_chip_dmp_erom_scan()
822 err = brcmf_chip_dmp_get_regaddr(ci, &eromaddr, &base, &wrap); in brcmf_chip_dmp_erom_scan()
827 core = brcmf_chip_add_core(ci, id, base, wrap); in brcmf_chip_dmp_erom_scan()
837 static int brcmf_chip_recognition(struct brcmf_chip_priv *ci) in brcmf_chip_recognition() argument
849 regdata = ci->ops->read32(ci->ctx, CORE_CC_REG(SI_ENUM_BASE, chipid)); in brcmf_chip_recognition()
850 ci->pub.chip = regdata & CID_ID_MASK; in brcmf_chip_recognition()
851 ci->pub.chiprev = (regdata & CID_REV_MASK) >> CID_REV_SHIFT; in brcmf_chip_recognition()
854 brcmf_chip_name(ci->pub.chip, ci->pub.name, sizeof(ci->pub.name)); in brcmf_chip_recognition()
856 socitype == SOCI_SB ? "SB" : "AXI", ci->pub.name, in brcmf_chip_recognition()
857 ci->pub.chiprev); in brcmf_chip_recognition()
860 if (ci->pub.chip != BRCM_CC_4329_CHIP_ID) { in brcmf_chip_recognition()
864 ci->iscoreup = brcmf_chip_sb_iscoreup; in brcmf_chip_recognition()
865 ci->coredisable = brcmf_chip_sb_coredisable; in brcmf_chip_recognition()
866 ci->resetcore = brcmf_chip_sb_resetcore; in brcmf_chip_recognition()
868 core = brcmf_chip_add_core(ci, BCMA_CORE_CHIPCOMMON, in brcmf_chip_recognition()
870 brcmf_chip_sb_corerev(ci, core); in brcmf_chip_recognition()
871 core = brcmf_chip_add_core(ci, BCMA_CORE_SDIO_DEV, in brcmf_chip_recognition()
873 brcmf_chip_sb_corerev(ci, core); in brcmf_chip_recognition()
874 core = brcmf_chip_add_core(ci, BCMA_CORE_INTERNAL_MEM, in brcmf_chip_recognition()
876 brcmf_chip_sb_corerev(ci, core); in brcmf_chip_recognition()
877 core = brcmf_chip_add_core(ci, BCMA_CORE_ARM_CM3, in brcmf_chip_recognition()
879 brcmf_chip_sb_corerev(ci, core); in brcmf_chip_recognition()
881 core = brcmf_chip_add_core(ci, BCMA_CORE_80211, 0x18001000, 0); in brcmf_chip_recognition()
882 brcmf_chip_sb_corerev(ci, core); in brcmf_chip_recognition()
884 ci->iscoreup = brcmf_chip_ai_iscoreup; in brcmf_chip_recognition()
885 ci->coredisable = brcmf_chip_ai_coredisable; in brcmf_chip_recognition()
886 ci->resetcore = brcmf_chip_ai_resetcore; in brcmf_chip_recognition()
888 brcmf_chip_dmp_erom_scan(ci); in brcmf_chip_recognition()
895 ret = brcmf_chip_cores_check(ci); in brcmf_chip_recognition()
900 brcmf_chip_set_passive(&ci->pub); in brcmf_chip_recognition()
901 return brcmf_chip_get_raminfo(ci); in brcmf_chip_recognition()