Lines Matching refs:rt2x00mmio_register_read

141 	rt2x00mmio_register_read(rt2x00dev, CSR21, &reg);  in rt2400pci_eepromregister_read()
170 		.read		= rt2x00mmio_register_read,
205 	rt2x00mmio_register_read(rt2x00dev, GPIOCSR, &reg);  in rt2400pci_rfkill_poll()
218 	rt2x00mmio_register_read(led->rt2x00dev, LEDCSR, &reg);  in rt2400pci_brightness_set()
236 	rt2x00mmio_register_read(led->rt2x00dev, LEDCSR, &reg);  in rt2400pci_blink_set()
269 	rt2x00mmio_register_read(rt2x00dev, RXCSR0, &reg);  in rt2400pci_config_filter()
298 		rt2x00mmio_register_read(rt2x00dev, BCNCSR1, &reg);  in rt2400pci_config_intf()
305 		rt2x00mmio_register_read(rt2x00dev, CSR14, &reg);  in rt2400pci_config_intf()
333 		rt2x00mmio_register_read(rt2x00dev, TXCSR1, &reg);  in rt2400pci_config_erp()
340 		rt2x00mmio_register_read(rt2x00dev, ARCSR2, &reg);  in rt2400pci_config_erp()
347 		rt2x00mmio_register_read(rt2x00dev, ARCSR3, &reg);  in rt2400pci_config_erp()
354 		rt2x00mmio_register_read(rt2x00dev, ARCSR4, &reg);  in rt2400pci_config_erp()
361 		rt2x00mmio_register_read(rt2x00dev, ARCSR5, &reg);  in rt2400pci_config_erp()
373 		rt2x00mmio_register_read(rt2x00dev, CSR11, &reg);  in rt2400pci_config_erp()
377 		rt2x00mmio_register_read(rt2x00dev, CSR18, &reg);  in rt2400pci_config_erp()
382 		rt2x00mmio_register_read(rt2x00dev, CSR19, &reg);  in rt2400pci_config_erp()
389 		rt2x00mmio_register_read(rt2x00dev, CSR12, &reg);  in rt2400pci_config_erp()
498 	rt2x00mmio_register_read(rt2x00dev, CNT0, &rf->rf1);  in rt2400pci_config_channel()
511 	rt2x00mmio_register_read(rt2x00dev, CSR11, &reg);  in rt2400pci_config_retry_limit()
528 		rt2x00mmio_register_read(rt2x00dev, CSR20, &reg);  in rt2400pci_config_ps()
541 		rt2x00mmio_register_read(rt2x00dev, CSR20, &reg);  in rt2400pci_config_ps()
569 	rt2x00mmio_register_read(rt2x00dev, CSR11, &reg);  in rt2400pci_config_cw()
587 	rt2x00mmio_register_read(rt2x00dev, CNT0, &reg);  in rt2400pci_link_stats()
642 		rt2x00mmio_register_read(rt2x00dev, RXCSR0, &reg);  in rt2400pci_start_queue()
647 		rt2x00mmio_register_read(rt2x00dev, CSR14, &reg);  in rt2400pci_start_queue()
665 		rt2x00mmio_register_read(rt2x00dev, TXCSR0, &reg);  in rt2400pci_kick_queue()
670 		rt2x00mmio_register_read(rt2x00dev, TXCSR0, &reg);  in rt2400pci_kick_queue()
675 		rt2x00mmio_register_read(rt2x00dev, TXCSR0, &reg);  in rt2400pci_kick_queue()
693 		rt2x00mmio_register_read(rt2x00dev, TXCSR0, &reg);  in rt2400pci_stop_queue()
698 		rt2x00mmio_register_read(rt2x00dev, RXCSR0, &reg);  in rt2400pci_stop_queue()
703 		rt2x00mmio_register_read(rt2x00dev, CSR14, &reg);  in rt2400pci_stop_queue()
773 	rt2x00mmio_register_read(rt2x00dev, TXCSR2, &reg);  in rt2400pci_init_queues()
781 	rt2x00mmio_register_read(rt2x00dev, TXCSR3, &reg);  in rt2400pci_init_queues()
787 	rt2x00mmio_register_read(rt2x00dev, TXCSR5, &reg);  in rt2400pci_init_queues()
793 	rt2x00mmio_register_read(rt2x00dev, TXCSR4, &reg);  in rt2400pci_init_queues()
799 	rt2x00mmio_register_read(rt2x00dev, TXCSR6, &reg);  in rt2400pci_init_queues()
804 	rt2x00mmio_register_read(rt2x00dev, RXCSR1, &reg);  in rt2400pci_init_queues()
810 	rt2x00mmio_register_read(rt2x00dev, RXCSR2, &reg);  in rt2400pci_init_queues()
827 	rt2x00mmio_register_read(rt2x00dev, TIMECSR, &reg);  in rt2400pci_init_registers()
833 	rt2x00mmio_register_read(rt2x00dev, CSR9, &reg);  in rt2400pci_init_registers()
838 	rt2x00mmio_register_read(rt2x00dev, CSR14, &reg);  in rt2400pci_init_registers()
851 	rt2x00mmio_register_read(rt2x00dev, ARCSR0, &reg);  in rt2400pci_init_registers()
858 	rt2x00mmio_register_read(rt2x00dev, RXCSR3, &reg);  in rt2400pci_init_registers()
875 	rt2x00mmio_register_read(rt2x00dev, MACCSR2, &reg);  in rt2400pci_init_registers()
879 	rt2x00mmio_register_read(rt2x00dev, RALINKCSR, &reg);  in rt2400pci_init_registers()
886 	rt2x00mmio_register_read(rt2x00dev, CSR1, &reg);  in rt2400pci_init_registers()
892 	rt2x00mmio_register_read(rt2x00dev, CSR1, &reg);  in rt2400pci_init_registers()
902 	rt2x00mmio_register_read(rt2x00dev, CNT0, &reg);  in rt2400pci_init_registers()
903 	rt2x00mmio_register_read(rt2x00dev, CNT4, &reg);  in rt2400pci_init_registers()
977 		rt2x00mmio_register_read(rt2x00dev, CSR7, &reg);  in rt2400pci_toggle_irq()
987 	rt2x00mmio_register_read(rt2x00dev, CSR8, &reg);  in rt2400pci_toggle_irq()
1040 	rt2x00mmio_register_read(rt2x00dev, PWRCSR1, &reg);  in rt2400pci_set_state()
1053 		rt2x00mmio_register_read(rt2x00dev, PWRCSR1, &reg2);  in rt2400pci_set_state()
1183 	rt2x00mmio_register_read(rt2x00dev, CSR14, &reg);  in rt2400pci_write_beacon()
1323 	rt2x00mmio_register_read(rt2x00dev, CSR8, &reg);  in rt2400pci_enable_interrupt()
1348 		rt2x00mmio_register_read(rt2x00dev, CSR8, &reg);  in rt2400pci_txstatus_tasklet()
1384 	rt2x00mmio_register_read(rt2x00dev, CSR7, &reg);  in rt2400pci_interrupt()
1422 	rt2x00mmio_register_read(rt2x00dev, CSR8, &reg);  in rt2400pci_interrupt()
1443 	rt2x00mmio_register_read(rt2x00dev, CSR21, &reg);  in rt2400pci_validate_eeprom()
1491 	rt2x00mmio_register_read(rt2x00dev, CSR0, &reg);  in rt2400pci_init_eeprom()
1636 	rt2x00mmio_register_read(rt2x00dev, GPIOCSR, &reg);  in rt2400pci_probe_hw()
1698 	rt2x00mmio_register_read(rt2x00dev, CSR17, &reg);  in rt2400pci_get_tsf()
1700 	rt2x00mmio_register_read(rt2x00dev, CSR16, &reg);  in rt2400pci_get_tsf()
1711 	rt2x00mmio_register_read(rt2x00dev, CSR15, &reg);  in rt2400pci_tx_last_beacon()