Lines Matching refs:rt2x00mmio_register_write
74 rt2x00mmio_register_write(rt2x00dev, BBPCSR, reg); in rt2400pci_bbp_write()
101 rt2x00mmio_register_write(rt2x00dev, BBPCSR, reg); in rt2400pci_bbp_read()
129 rt2x00mmio_register_write(rt2x00dev, RFCSR, reg); in rt2400pci_rf_write()
163 rt2x00mmio_register_write(rt2x00dev, CSR21, reg); in rt2400pci_eepromregister_write()
171 .write = rt2x00mmio_register_write,
225 rt2x00mmio_register_write(led->rt2x00dev, LEDCSR, reg); in rt2400pci_brightness_set()
239 rt2x00mmio_register_write(led->rt2x00dev, LEDCSR, reg); in rt2400pci_blink_set()
282 rt2x00mmio_register_write(rt2x00dev, RXCSR0, reg); in rt2400pci_config_filter()
300 rt2x00mmio_register_write(rt2x00dev, BCNCSR1, reg); in rt2400pci_config_intf()
307 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2400pci_config_intf()
338 rt2x00mmio_register_write(rt2x00dev, TXCSR1, reg); in rt2400pci_config_erp()
345 rt2x00mmio_register_write(rt2x00dev, ARCSR2, reg); in rt2400pci_config_erp()
352 rt2x00mmio_register_write(rt2x00dev, ARCSR3, reg); in rt2400pci_config_erp()
359 rt2x00mmio_register_write(rt2x00dev, ARCSR4, reg); in rt2400pci_config_erp()
366 rt2x00mmio_register_write(rt2x00dev, ARCSR5, reg); in rt2400pci_config_erp()
370 rt2x00mmio_register_write(rt2x00dev, ARCSR1, erp->basic_rates); in rt2400pci_config_erp()
375 rt2x00mmio_register_write(rt2x00dev, CSR11, reg); in rt2400pci_config_erp()
380 rt2x00mmio_register_write(rt2x00dev, CSR18, reg); in rt2400pci_config_erp()
385 rt2x00mmio_register_write(rt2x00dev, CSR19, reg); in rt2400pci_config_erp()
394 rt2x00mmio_register_write(rt2x00dev, CSR12, reg); in rt2400pci_config_erp()
516 rt2x00mmio_register_write(rt2x00dev, CSR11, reg); in rt2400pci_config_retry_limit()
536 rt2x00mmio_register_write(rt2x00dev, CSR20, reg); in rt2400pci_config_ps()
539 rt2x00mmio_register_write(rt2x00dev, CSR20, reg); in rt2400pci_config_ps()
543 rt2x00mmio_register_write(rt2x00dev, CSR20, reg); in rt2400pci_config_ps()
572 rt2x00mmio_register_write(rt2x00dev, CSR11, reg); in rt2400pci_config_cw()
644 rt2x00mmio_register_write(rt2x00dev, RXCSR0, reg); in rt2400pci_start_queue()
651 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2400pci_start_queue()
667 rt2x00mmio_register_write(rt2x00dev, TXCSR0, reg); in rt2400pci_kick_queue()
672 rt2x00mmio_register_write(rt2x00dev, TXCSR0, reg); in rt2400pci_kick_queue()
677 rt2x00mmio_register_write(rt2x00dev, TXCSR0, reg); in rt2400pci_kick_queue()
695 rt2x00mmio_register_write(rt2x00dev, TXCSR0, reg); in rt2400pci_stop_queue()
700 rt2x00mmio_register_write(rt2x00dev, RXCSR0, reg); in rt2400pci_stop_queue()
707 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2400pci_stop_queue()
778 rt2x00mmio_register_write(rt2x00dev, TXCSR2, reg); in rt2400pci_init_queues()
784 rt2x00mmio_register_write(rt2x00dev, TXCSR3, reg); in rt2400pci_init_queues()
790 rt2x00mmio_register_write(rt2x00dev, TXCSR5, reg); in rt2400pci_init_queues()
796 rt2x00mmio_register_write(rt2x00dev, TXCSR4, reg); in rt2400pci_init_queues()
802 rt2x00mmio_register_write(rt2x00dev, TXCSR6, reg); in rt2400pci_init_queues()
807 rt2x00mmio_register_write(rt2x00dev, RXCSR1, reg); in rt2400pci_init_queues()
813 rt2x00mmio_register_write(rt2x00dev, RXCSR2, reg); in rt2400pci_init_queues()
822 rt2x00mmio_register_write(rt2x00dev, PSCSR0, 0x00020002); in rt2400pci_init_registers()
823 rt2x00mmio_register_write(rt2x00dev, PSCSR1, 0x00000002); in rt2400pci_init_registers()
824 rt2x00mmio_register_write(rt2x00dev, PSCSR2, 0x00023f20); in rt2400pci_init_registers()
825 rt2x00mmio_register_write(rt2x00dev, PSCSR3, 0x00000002); in rt2400pci_init_registers()
831 rt2x00mmio_register_write(rt2x00dev, TIMECSR, reg); in rt2400pci_init_registers()
836 rt2x00mmio_register_write(rt2x00dev, CSR9, reg); in rt2400pci_init_registers()
847 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2400pci_init_registers()
849 rt2x00mmio_register_write(rt2x00dev, CNT3, 0x3f080000); in rt2400pci_init_registers()
856 rt2x00mmio_register_write(rt2x00dev, ARCSR0, reg); in rt2400pci_init_registers()
865 rt2x00mmio_register_write(rt2x00dev, RXCSR3, reg); in rt2400pci_init_registers()
867 rt2x00mmio_register_write(rt2x00dev, PWRCSR0, 0x3f3b3100); in rt2400pci_init_registers()
872 rt2x00mmio_register_write(rt2x00dev, MACCSR0, 0x00217223); in rt2400pci_init_registers()
873 rt2x00mmio_register_write(rt2x00dev, MACCSR1, 0x00235518); in rt2400pci_init_registers()
877 rt2x00mmio_register_write(rt2x00dev, MACCSR2, reg); in rt2400pci_init_registers()
884 rt2x00mmio_register_write(rt2x00dev, RALINKCSR, reg); in rt2400pci_init_registers()
890 rt2x00mmio_register_write(rt2x00dev, CSR1, reg); in rt2400pci_init_registers()
895 rt2x00mmio_register_write(rt2x00dev, CSR1, reg); in rt2400pci_init_registers()
978 rt2x00mmio_register_write(rt2x00dev, CSR7, reg); in rt2400pci_toggle_irq()
993 rt2x00mmio_register_write(rt2x00dev, CSR8, reg); in rt2400pci_toggle_irq()
1026 rt2x00mmio_register_write(rt2x00dev, PWRCSR0, 0); in rt2400pci_disable_radio()
1045 rt2x00mmio_register_write(rt2x00dev, PWRCSR1, reg); in rt2400pci_set_state()
1058 rt2x00mmio_register_write(rt2x00dev, PWRCSR1, reg); in rt2400pci_set_state()
1185 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2400pci_write_beacon()
1209 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2400pci_write_beacon()
1325 rt2x00mmio_register_write(rt2x00dev, CSR8, reg); in rt2400pci_enable_interrupt()
1352 rt2x00mmio_register_write(rt2x00dev, CSR8, reg); in rt2400pci_txstatus_tasklet()
1385 rt2x00mmio_register_write(rt2x00dev, CSR7, reg); in rt2400pci_interrupt()
1424 rt2x00mmio_register_write(rt2x00dev, CSR8, reg); in rt2400pci_interrupt()
1638 rt2x00mmio_register_write(rt2x00dev, GPIOCSR, reg); in rt2400pci_probe_hw()