Lines Matching refs:word
57 const unsigned int word, const u8 value) in rt2500pci_bbp_write() argument
70 rt2x00_set_field32(®, BBPCSR_REGNUM, word); in rt2500pci_bbp_write()
81 const unsigned int word, u8 *value) in rt2500pci_bbp_read() argument
97 rt2x00_set_field32(®, BBPCSR_REGNUM, word); in rt2500pci_bbp_read()
112 const unsigned int word, const u32 value) in rt2500pci_rf_write() argument
130 rt2x00_rf_write(rt2x00dev, word, value); in rt2500pci_rf_write()
814 u32 word; in rt2500pci_get_entry_state() local
817 rt2x00_desc_read(entry_priv->desc, 0, &word); in rt2500pci_get_entry_state()
819 return rt2x00_get_field32(word, RXD_W0_OWNER_NIC); in rt2500pci_get_entry_state()
821 rt2x00_desc_read(entry_priv->desc, 0, &word); in rt2500pci_get_entry_state()
823 return (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) || in rt2500pci_get_entry_state()
824 rt2x00_get_field32(word, TXD_W0_VALID)); in rt2500pci_get_entry_state()
832 u32 word; in rt2500pci_clear_entry() local
835 rt2x00_desc_read(entry_priv->desc, 1, &word); in rt2500pci_clear_entry()
836 rt2x00_set_field32(&word, RXD_W1_BUFFER_ADDRESS, skbdesc->skb_dma); in rt2500pci_clear_entry()
837 rt2x00_desc_write(entry_priv->desc, 1, word); in rt2500pci_clear_entry()
839 rt2x00_desc_read(entry_priv->desc, 0, &word); in rt2500pci_clear_entry()
840 rt2x00_set_field32(&word, RXD_W0_OWNER_NIC, 1); in rt2500pci_clear_entry()
841 rt2x00_desc_write(entry_priv->desc, 0, word); in rt2500pci_clear_entry()
843 rt2x00_desc_read(entry_priv->desc, 0, &word); in rt2500pci_clear_entry()
844 rt2x00_set_field32(&word, TXD_W0_VALID, 0); in rt2500pci_clear_entry()
845 rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0); in rt2500pci_clear_entry()
846 rt2x00_desc_write(entry_priv->desc, 0, word); in rt2500pci_clear_entry()
1261 u32 word; in rt2500pci_write_tx_desc() local
1266 rt2x00_desc_read(txd, 1, &word); in rt2500pci_write_tx_desc()
1267 rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, skbdesc->skb_dma); in rt2500pci_write_tx_desc()
1268 rt2x00_desc_write(txd, 1, word); in rt2500pci_write_tx_desc()
1270 rt2x00_desc_read(txd, 2, &word); in rt2500pci_write_tx_desc()
1271 rt2x00_set_field32(&word, TXD_W2_IV_OFFSET, IEEE80211_HEADER); in rt2500pci_write_tx_desc()
1272 rt2x00_set_field32(&word, TXD_W2_AIFS, entry->queue->aifs); in rt2500pci_write_tx_desc()
1273 rt2x00_set_field32(&word, TXD_W2_CWMIN, entry->queue->cw_min); in rt2500pci_write_tx_desc()
1274 rt2x00_set_field32(&word, TXD_W2_CWMAX, entry->queue->cw_max); in rt2500pci_write_tx_desc()
1275 rt2x00_desc_write(txd, 2, word); in rt2500pci_write_tx_desc()
1277 rt2x00_desc_read(txd, 3, &word); in rt2500pci_write_tx_desc()
1278 rt2x00_set_field32(&word, TXD_W3_PLCP_SIGNAL, txdesc->u.plcp.signal); in rt2500pci_write_tx_desc()
1279 rt2x00_set_field32(&word, TXD_W3_PLCP_SERVICE, txdesc->u.plcp.service); in rt2500pci_write_tx_desc()
1280 rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_LOW, in rt2500pci_write_tx_desc()
1282 rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_HIGH, in rt2500pci_write_tx_desc()
1284 rt2x00_desc_write(txd, 3, word); in rt2500pci_write_tx_desc()
1286 rt2x00_desc_read(txd, 10, &word); in rt2500pci_write_tx_desc()
1287 rt2x00_set_field32(&word, TXD_W10_RTS, in rt2500pci_write_tx_desc()
1289 rt2x00_desc_write(txd, 10, word); in rt2500pci_write_tx_desc()
1296 rt2x00_desc_read(txd, 0, &word); in rt2500pci_write_tx_desc()
1297 rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 1); in rt2500pci_write_tx_desc()
1298 rt2x00_set_field32(&word, TXD_W0_VALID, 1); in rt2500pci_write_tx_desc()
1299 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, in rt2500pci_write_tx_desc()
1301 rt2x00_set_field32(&word, TXD_W0_ACK, in rt2500pci_write_tx_desc()
1303 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, in rt2500pci_write_tx_desc()
1305 rt2x00_set_field32(&word, TXD_W0_OFDM, in rt2500pci_write_tx_desc()
1307 rt2x00_set_field32(&word, TXD_W0_CIPHER_OWNER, 1); in rt2500pci_write_tx_desc()
1308 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->u.plcp.ifs); in rt2500pci_write_tx_desc()
1309 rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, in rt2500pci_write_tx_desc()
1311 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length); in rt2500pci_write_tx_desc()
1312 rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE); in rt2500pci_write_tx_desc()
1313 rt2x00_desc_write(txd, 0, word); in rt2500pci_write_tx_desc()
1408 u32 word; in rt2500pci_txdone() local
1413 rt2x00_desc_read(entry_priv->desc, 0, &word); in rt2500pci_txdone()
1415 if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) || in rt2500pci_txdone()
1416 !rt2x00_get_field32(word, TXD_W0_VALID)) in rt2500pci_txdone()
1423 switch (rt2x00_get_field32(word, TXD_W0_RESULT)) { in rt2500pci_txdone()
1434 txdesc.retry = rt2x00_get_field32(word, TXD_W0_RETRY_COUNT); in rt2500pci_txdone()
1566 u16 word; in rt2500pci_validate_eeprom() local
1593 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word); in rt2500pci_validate_eeprom()
1594 if (word == 0xffff) { in rt2500pci_validate_eeprom()
1595 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2); in rt2500pci_validate_eeprom()
1596 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT, in rt2500pci_validate_eeprom()
1598 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT, in rt2500pci_validate_eeprom()
1600 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE, in rt2500pci_validate_eeprom()
1602 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0); in rt2500pci_validate_eeprom()
1603 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0); in rt2500pci_validate_eeprom()
1604 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522); in rt2500pci_validate_eeprom()
1605 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word); in rt2500pci_validate_eeprom()
1606 rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word); in rt2500pci_validate_eeprom()
1609 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word); in rt2500pci_validate_eeprom()
1610 if (word == 0xffff) { in rt2500pci_validate_eeprom()
1611 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0); in rt2500pci_validate_eeprom()
1612 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0); in rt2500pci_validate_eeprom()
1613 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0); in rt2500pci_validate_eeprom()
1614 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word); in rt2500pci_validate_eeprom()
1615 rt2x00_eeprom_dbg(rt2x00dev, "NIC: 0x%04x\n", word); in rt2500pci_validate_eeprom()
1618 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word); in rt2500pci_validate_eeprom()
1619 if (word == 0xffff) { in rt2500pci_validate_eeprom()
1620 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI, in rt2500pci_validate_eeprom()
1622 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word); in rt2500pci_validate_eeprom()
1624 word); in rt2500pci_validate_eeprom()