Lines Matching refs:RFPGA0_XAB_RFINTERFACESW
415 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl92d_phy_init_bb_rf_register_definition()
417 rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl92d_phy_init_bb_rf_register_definition()
1523 rtl_set_bbreg(hw, RFPGA0_XAB_RFINTERFACESW, MASKDWORD, 0x07000f60); in _rtl92d_phy_patha_iqk_5g_normal()
1565 rtl_set_bbreg(hw, RFPGA0_XAB_RFINTERFACESW, MASKDWORD, in _rtl92d_phy_patha_iqk_5g_normal()
1641 rtl_set_bbreg(hw, RFPGA0_XAB_RFINTERFACESW, MASKDWORD, 0x0f600700); in _rtl92d_phy_pathb_iqk_5g_normal()
1683 rtl_set_bbreg(hw, RFPGA0_XAB_RFINTERFACESW, MASKDWORD, in _rtl92d_phy_pathb_iqk_5g_normal()
1809 RFPGA0_XAB_RFINTERFACESW, RFPGA0_XA_RFINTERFACEOE, in _rtl92d_phy_iq_calibrate()
1972 RFPGA0_XAB_RFINTERFACESW, RFPGA0_XA_RFINTERFACEOE, in _rtl92d_phy_iq_calibrate_5g_normal()
3418 rtl_set_bbreg(hw, RFPGA0_XAB_RFINTERFACESW, in rtl92d_update_bbrf_configuration()
3430 rtl_set_bbreg(hw, RFPGA0_XAB_RFINTERFACESW, in rtl92d_update_bbrf_configuration()
3481 rtl_set_bbreg(hw, RFPGA0_XAB_RFINTERFACESW, in rtl92d_update_bbrf_configuration()
3489 rtl_set_bbreg(hw, RFPGA0_XAB_RFINTERFACESW, in rtl92d_update_bbrf_configuration()