Lines Matching refs:reg_e94

1524 	u32 reg_eac, reg_e94, reg_e9c, tmp;  in _rtl8723be_phy_path_a_iqk()  local
1568 reg_e94 = rtl_get_bbreg(hw, 0xe94, MASKDWORD); in _rtl8723be_phy_path_a_iqk()
1572 (((reg_e94 & 0x03FF0000) >> 16) != 0x142) && in _rtl8723be_phy_path_a_iqk()
1584 (((reg_e94 & 0x03FF0000) >> 16) < 0x110) && in _rtl8723be_phy_path_a_iqk()
1585 (((reg_e94 & 0x03FF0000) >> 16) > 0xf0) && in _rtl8723be_phy_path_a_iqk()
1597 u32 reg_eac, reg_e94, reg_e9c, reg_ea4, u32tmp, tmp; in _rtl8723be_phy_path_a_rx_iqk() local
1647 reg_e94 = rtl_get_bbreg(hw, RTX_POWER_BEFORE_IQK_A, MASKDWORD); in _rtl8723be_phy_path_a_rx_iqk()
1651 (((reg_e94 & 0x03FF0000) >> 16) != 0x142) && in _rtl8723be_phy_path_a_rx_iqk()
1663 (((reg_e94 & 0x03FF0000) >> 16) < 0x110) && in _rtl8723be_phy_path_a_rx_iqk()
1664 (((reg_e94 & 0x03FF0000) >> 16) > 0xf0) && in _rtl8723be_phy_path_a_rx_iqk()
1670 u32tmp = 0x80007C00 | (reg_e94 & 0x3FF0000) | in _rtl8723be_phy_path_a_rx_iqk()
1744 u32 reg_eac, reg_e94, reg_e9c, tmp; in _rtl8723be_phy_path_b_iqk() local
1788 reg_e94 = rtl_get_bbreg(hw, RTX_POWER_BEFORE_IQK_A, MASKDWORD); in _rtl8723be_phy_path_b_iqk()
1792 (((reg_e94 & 0x03FF0000) >> 16) != 0x142) && in _rtl8723be_phy_path_b_iqk()
1804 (((reg_e94 & 0x03FF0000) >> 16) < 0x110) && in _rtl8723be_phy_path_b_iqk()
1805 (((reg_e94 & 0x03FF0000) >> 16) > 0xf0) && in _rtl8723be_phy_path_b_iqk()
1817 u32 reg_e94, reg_e9c, reg_ea4, reg_eac, u32tmp, tmp; in _rtl8723be_phy_path_b_rx_iqk() local
1866 reg_e94 = rtl_get_bbreg(hw, RTX_POWER_BEFORE_IQK_A, MASKDWORD); in _rtl8723be_phy_path_b_rx_iqk()
1870 (((reg_e94 & 0x03FF0000) >> 16) != 0x142) && in _rtl8723be_phy_path_b_rx_iqk()
1882 (((reg_e94 & 0x03FF0000) >> 16) < 0x110) && in _rtl8723be_phy_path_b_rx_iqk()
1883 (((reg_e94 & 0x03FF0000) >> 16) > 0xf0) && in _rtl8723be_phy_path_b_rx_iqk()
1889 u32tmp = 0x80007C00 | (reg_e94 & 0x3FF0000) | in _rtl8723be_phy_path_b_rx_iqk()
2330 long reg_e94, reg_e9c, reg_ea4, reg_eac, reg_eb4, reg_ebc, reg_ec4; in rtl8723be_phy_iq_calibrate() local
2410 reg_e94 = result[i][0]; in rtl8723be_phy_iq_calibrate()
2420 reg_e94 = result[final_candidate][0]; in rtl8723be_phy_iq_calibrate()
2421 rtlphy->reg_e94 = reg_e94; in rtl8723be_phy_iq_calibrate()
2435 rtlphy->reg_e94 = 0x100; in rtl8723be_phy_iq_calibrate()
2440 if (reg_e94 != 0) in rtl8723be_phy_iq_calibrate()