31 void wl1251_boot_target_enable_interrupts(struct wl1251 *wl)  in wl1251_boot_target_enable_interrupts()  argument
33 	wl1251_reg_write32(wl, ACX_REG_INTERRUPT_MASK, ~(wl->intr_mask));  in wl1251_boot_target_enable_interrupts()
34 	wl1251_reg_write32(wl, HI_CFG, HI_CFG_DEF_VAL);  in wl1251_boot_target_enable_interrupts()
37 int wl1251_boot_soft_reset(struct wl1251 *wl)  in wl1251_boot_soft_reset()  argument
43 	wl1251_reg_write32(wl, ACX_REG_SLV_SOFT_RESET, ACX_SLV_SOFT_RESET_BIT);  in wl1251_boot_soft_reset()
48 		boot_data = wl1251_reg_read32(wl, ACX_REG_SLV_SOFT_RESET);  in wl1251_boot_soft_reset()
64 	wl1251_reg_write32(wl, ENABLE, 0x0);  in wl1251_boot_soft_reset()
67 	wl1251_reg_write32(wl, SPARE_A2, 0xffff);  in wl1251_boot_soft_reset()
72 int wl1251_boot_init_seq(struct wl1251 *wl)  in wl1251_boot_init_seq()  argument
94 	scr_pad6 = wl1251_reg_read32(wl, SCR_PAD6);  in wl1251_boot_init_seq()
98 	elp_cmd = wl1251_reg_read32(wl, ELP_CMD);  in wl1251_boot_init_seq()
105 	wl1251_reg_write32(wl, PLL_CAL_TIME, 0x9);  in wl1251_boot_init_seq()
110 	wl1251_reg_write32(wl, CLK_BUF_TIME, 0x6);  in wl1251_boot_init_seq()
118 	wl1251_reg_write32(wl, ELP_CFG_MODE, tmp);  in wl1251_boot_init_seq()
122 	wl1251_reg_write32(wl, ELP_CMD, elp_cmd);  in wl1251_boot_init_seq()
126 	wl1251_reg_write32(wl, CFG_PLL_SYNC_CNT, 0x20);  in wl1251_boot_init_seq()
129 	init_data = wl1251_reg_read32(wl, CLK_REQ_TIME);  in wl1251_boot_init_seq()
139 	wl1251_reg_write32(wl, CLK_REQ_TIME, tmp);  in wl1251_boot_init_seq()
142 	wl1251_reg_write32(wl, 0x003058cc, 0x4B5);  in wl1251_boot_init_seq()
145 	wl1251_reg_write32(wl, 0x003058d4, 0x50);  in wl1251_boot_init_seq()
148 	wl1251_reg_write32(wl, 0x00305948, 0x11c001);  in wl1251_boot_init_seq()
154 	wl1251_reg_write32(wl, 0x003058f4, 0x1e);  in wl1251_boot_init_seq()
158 	wl1251_reg_write32(wl, 0x00305840, tmp);  in wl1251_boot_init_seq()
164 	wl1251_reg_write32(wl, 0x00305844, tmp);  in wl1251_boot_init_seq()
167 	wl1251_reg_write32(wl, 0x00305848, 0x3039);  in wl1251_boot_init_seq()
176 	wl1251_reg_write32(wl, 0x00305854, tmp);  in wl1251_boot_init_seq()
183 	wl1251_reg_write32(wl, 0x00305858, tmp);  in wl1251_boot_init_seq()
191 	wl1251_reg_write32(wl, 0x003058f8, tmp);  in wl1251_boot_init_seq()
199 	wl1251_reg_write32(wl, 0x003058f0, 0x29);  in wl1251_boot_init_seq()
202 	wl1251_reg_write32(wl, ELP_CMD, elp_cmd | 0x1);  in wl1251_boot_init_seq()
210 static void wl1251_boot_set_ecpu_ctrl(struct wl1251 *wl, u32 flag)  in wl1251_boot_set_ecpu_ctrl()  argument
215 	cpu_ctrl = wl1251_reg_read32(wl, ACX_REG_ECPU_CONTROL);  in wl1251_boot_set_ecpu_ctrl()
219 	wl1251_reg_write32(wl, ACX_REG_ECPU_CONTROL, cpu_ctrl);  in wl1251_boot_set_ecpu_ctrl()
222 int wl1251_boot_run_firmware(struct wl1251 *wl)  in wl1251_boot_run_firmware()  argument
227 	wl1251_boot_set_ecpu_ctrl(wl, ECPU_CONTROL_HALT);  in wl1251_boot_run_firmware()
229 	chip_id = wl1251_reg_read32(wl, CHIP_ID_B);  in wl1251_boot_run_firmware()
233 	if (chip_id != wl->chip_id) {  in wl1251_boot_run_firmware()
242 		acx_intr = wl1251_reg_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);  in wl1251_boot_run_firmware()
251 			wl1251_reg_write32(wl, ACX_REG_INTERRUPT_ACK,  in wl1251_boot_run_firmware()
264 	wl->cmd_box_addr = wl1251_reg_read32(wl, REG_COMMAND_MAILBOX_PTR);  in wl1251_boot_run_firmware()
267 	wl->event_box_addr = wl1251_reg_read32(wl, REG_EVENT_MAILBOX_PTR);  in wl1251_boot_run_firmware()
270 	wl1251_set_partition(wl, WL1251_PART_WORK_MEM_START,  in wl1251_boot_run_firmware()
276 		     wl->cmd_box_addr, wl->event_box_addr);  in wl1251_boot_run_firmware()
278 	wl1251_acx_fw_version(wl, wl->fw_ver, sizeof(wl->fw_ver));  in wl1251_boot_run_firmware()
286 	wl1251_enable_interrupts(wl);  in wl1251_boot_run_firmware()
289 	wl->intr_mask = WL1251_ACX_INTR_RX0_DATA |  in wl1251_boot_run_firmware()
295 	wl1251_boot_target_enable_interrupts(wl);  in wl1251_boot_run_firmware()
297 	wl->event_mask = SCAN_COMPLETE_EVENT_ID | BSS_LOSE_EVENT_ID |  in wl1251_boot_run_firmware()
305 	ret = wl1251_event_unmask(wl);  in wl1251_boot_run_firmware()
311 	wl1251_event_mbox_config(wl);  in wl1251_boot_run_firmware()
317 static int wl1251_boot_upload_firmware(struct wl1251 *wl)  in wl1251_boot_upload_firmware()  argument
326 		     wl1251_reg_read32(wl, CHIP_ID_B));  in wl1251_boot_upload_firmware()
329 	fw_data_len =  (wl->fw[4] << 24) | (wl->fw[5] << 16) |  in wl1251_boot_upload_firmware()
330 		(wl->fw[6] << 8) | (wl->fw[7]);  in wl1251_boot_upload_firmware()
346 	wl1251_set_partition(wl, WL1251_PART_DOWN_MEM_START,  in wl1251_boot_upload_firmware()
364 			wl1251_set_partition(wl,  in wl1251_boot_upload_firmware()
373 		p = wl->fw + FW_HDR_SIZE + chunk_num * CHUNK_SIZE;  in wl1251_boot_upload_firmware()
380 		wl1251_mem_write(wl, addr, buf, len);  in wl1251_boot_upload_firmware()
387 	p = wl->fw + FW_HDR_SIZE + chunk_num * CHUNK_SIZE;  in wl1251_boot_upload_firmware()
395 	wl1251_mem_write(wl, addr, buf, len);  in wl1251_boot_upload_firmware()
402 static int wl1251_boot_upload_nvs(struct wl1251 *wl)  in wl1251_boot_upload_nvs()  argument
409 	nvs = wl->nvs;  in wl1251_boot_upload_nvs()
415 	nvs_len = wl->nvs_len;  in wl1251_boot_upload_nvs()
416 	nvs_start = wl->fw_len;  in wl1251_boot_upload_nvs()
441 			wl1251_mem_write32(wl, dest_addr, val);  in wl1251_boot_upload_nvs()
457 	wl1251_set_partition(wl, nvs_start,  in wl1251_boot_upload_nvs()
471 		wl1251_mem_write32(wl, nvs_start, val);  in wl1251_boot_upload_nvs()
481 int wl1251_boot(struct wl1251 *wl)  in wl1251_boot()  argument
487 	wl1251_reg_write32(wl, ACX_REG_ECPU_CONTROL, ECPU_CONTROL_HALT);  in wl1251_boot()
489 	ret = wl1251_boot_soft_reset(wl);  in wl1251_boot()
494 	if (wl->use_eeprom) {  in wl1251_boot()
495 		wl1251_reg_write32(wl, ACX_REG_EE_START, START_EEPROM_MGR);  in wl1251_boot()
498 		wl1251_reg_write32(wl, ACX_EEPROMLESS_IND_REG, USE_EEPROM);  in wl1251_boot()
500 		ret = wl1251_boot_upload_nvs(wl);  in wl1251_boot()
506 		wl1251_reg_write32(wl, ACX_EEPROMLESS_IND_REG, wl->fw_len);  in wl1251_boot()
510 	tmp = wl1251_reg_read32(wl, SCR_PAD2);  in wl1251_boot()
513 	wl->boot_attr.radio_type = (tmp & 0x0000FF00) >> 8;  in wl1251_boot()
514 	wl->boot_attr.major = (tmp & 0x00FF0000) >> 16;  in wl1251_boot()
515 	tmp = wl1251_reg_read32(wl, SCR_PAD3);  in wl1251_boot()
518 	wl->boot_attr.minor = (tmp & 0x00FF0000) >> 16;  in wl1251_boot()
523 		     wl->boot_attr.radio_type, wl->boot_attr.major,  in wl1251_boot()
524 		     wl->boot_attr.minor, minor_minor_e2_ver);  in wl1251_boot()
526 	ret = wl1251_boot_init_seq(wl);  in wl1251_boot()
531 	boot_data = wl1251_reg_read32(wl, ACX_REG_ECPU_CONTROL);  in wl1251_boot()
544 	ret = wl1251_boot_upload_firmware(wl);  in wl1251_boot()
549 	ret = wl1251_boot_run_firmware(wl);  in wl1251_boot()