212 		mask = readw(ndev->reg_ofs.ldb_mask);  in ntb_irq_work()
214 		writew(mask, ndev->reg_ofs.ldb_mask);  in ntb_irq_work()
249 	mask = readw(ndev->reg_ofs.ldb_mask);  in ntb_register_db_callback()
251 	writew(mask, ndev->reg_ofs.ldb_mask);  in ntb_register_db_callback()
271 	mask = readw(ndev->reg_ofs.ldb_mask);  in ntb_unregister_db_callback()
273 	writew(mask, ndev->reg_ofs.ldb_mask);  in ntb_unregister_db_callback()
355 	writel(val, ndev->reg_ofs.spad_read + idx * 4);  in ntb_write_local_spad()
377 	*val = readl(ndev->reg_ofs.spad_write + idx * 4);  in ntb_read_local_spad()
404 	writel(val, ndev->reg_ofs.spad_write + idx * 4);  in ntb_write_remote_spad()
426 	*val = readl(ndev->reg_ofs.spad_read + idx * 4);  in ntb_read_remote_spad()
507 		writeq(addr, ndev->reg_ofs.bar2_xlat);  in ntb_set_mw_addr()
511 			writel(addr, ndev->reg_ofs.bar4_xlat);  in ntb_set_mw_addr()
513 			writeq(addr, ndev->reg_ofs.bar4_xlat);  in ntb_set_mw_addr()
516 		writel(addr, ndev->reg_ofs.bar5_xlat);  in ntb_set_mw_addr()
536 		writeq((u64) 1 << db, ndev->reg_ofs.rdb);  in ntb_ring_doorbell()
539 		       (db * ndev->bits_per_vector), ndev->reg_ofs.rdb);  in ntb_ring_doorbell()
601 			status = readw(ndev->reg_ofs.lnk_stat);  in ntb_link_event()
633 		ntb_cntl = readl(ndev->reg_ofs.lnk_cntl);  in ntb_link_status()
680 	status32 = readl(ndev->reg_ofs.lnk_cntl);  in bwd_link_recovery()
685 		status16 = readw(ndev->reg_ofs.lnk_stat);  in bwd_link_recovery()
733 		ndev->reg_ofs.ldb = ndev->reg_base + SNB_PDOORBELL_OFFSET;  in ntb_xeon_setup()
734 		ndev->reg_ofs.ldb_mask = ndev->reg_base + SNB_PDBMSK_OFFSET;  in ntb_xeon_setup()
735 		ndev->reg_ofs.spad_read = ndev->reg_base + SNB_SPAD_OFFSET;  in ntb_xeon_setup()
736 		ndev->reg_ofs.bar2_xlat = ndev->reg_base + SNB_SBAR2XLAT_OFFSET;  in ntb_xeon_setup()
737 		ndev->reg_ofs.bar4_xlat = ndev->reg_base + SNB_SBAR4XLAT_OFFSET;  in ntb_xeon_setup()
739 			ndev->reg_ofs.bar5_xlat =  in ntb_xeon_setup()
754 			ndev->reg_ofs.spad_write =  in ntb_xeon_setup()
757 			ndev->reg_ofs.rdb =  in ntb_xeon_setup()
781 			ndev->reg_ofs.spad_write = ndev->reg_base +  in ntb_xeon_setup()
783 			ndev->reg_ofs.rdb = ndev->reg_base +  in ntb_xeon_setup()
906 		ndev->reg_ofs.rdb = ndev->reg_base + SNB_SDOORBELL_OFFSET;  in ntb_xeon_setup()
907 		ndev->reg_ofs.ldb = ndev->reg_base + SNB_PDOORBELL_OFFSET;  in ntb_xeon_setup()
908 		ndev->reg_ofs.ldb_mask = ndev->reg_base + SNB_PDBMSK_OFFSET;  in ntb_xeon_setup()
912 		ndev->reg_ofs.spad_write = ndev->reg_base + SNB_SPAD_OFFSET +  in ntb_xeon_setup()
914 		ndev->reg_ofs.spad_read = ndev->reg_base + SNB_SPAD_OFFSET;  in ntb_xeon_setup()
915 		ndev->reg_ofs.bar2_xlat = ndev->reg_base + SNB_SBAR2XLAT_OFFSET;  in ntb_xeon_setup()
916 		ndev->reg_ofs.bar4_xlat = ndev->reg_base + SNB_SBAR4XLAT_OFFSET;  in ntb_xeon_setup()
918 			ndev->reg_ofs.bar5_xlat =  in ntb_xeon_setup()
937 		ndev->reg_ofs.rdb = ndev->reg_base + SNB_PDOORBELL_OFFSET;  in ntb_xeon_setup()
938 		ndev->reg_ofs.ldb = ndev->reg_base + SNB_SDOORBELL_OFFSET;  in ntb_xeon_setup()
939 		ndev->reg_ofs.ldb_mask = ndev->reg_base + SNB_SDBMSK_OFFSET;  in ntb_xeon_setup()
940 		ndev->reg_ofs.spad_write = ndev->reg_base + SNB_SPAD_OFFSET;  in ntb_xeon_setup()
944 		ndev->reg_ofs.spad_read = ndev->reg_base + SNB_SPAD_OFFSET +  in ntb_xeon_setup()
946 		ndev->reg_ofs.bar2_xlat = ndev->reg_base + SNB_PBAR2XLAT_OFFSET;  in ntb_xeon_setup()
947 		ndev->reg_ofs.bar4_xlat = ndev->reg_base + SNB_PBAR4XLAT_OFFSET;  in ntb_xeon_setup()
950 			ndev->reg_ofs.bar5_xlat =  in ntb_xeon_setup()
964 	ndev->reg_ofs.lnk_cntl = ndev->reg_base + SNB_NTBCNTL_OFFSET;  in ntb_xeon_setup()
965 	ndev->reg_ofs.lnk_stat = ndev->reg_base + SNB_SLINK_STATUS_OFFSET;  in ntb_xeon_setup()
966 	ndev->reg_ofs.spci_cmd = ndev->reg_base + SNB_PCICMD_OFFSET;  in ntb_xeon_setup()
1006 	ndev->reg_ofs.ldb = ndev->reg_base + BWD_PDOORBELL_OFFSET;  in ntb_bwd_setup()
1007 	ndev->reg_ofs.ldb_mask = ndev->reg_base + BWD_PDBMSK_OFFSET;  in ntb_bwd_setup()
1008 	ndev->reg_ofs.rdb = ndev->reg_base + BWD_B2B_DOORBELL_OFFSET;  in ntb_bwd_setup()
1009 	ndev->reg_ofs.bar2_xlat = ndev->reg_base + BWD_SBAR2XLAT_OFFSET;  in ntb_bwd_setup()
1010 	ndev->reg_ofs.bar4_xlat = ndev->reg_base + BWD_SBAR4XLAT_OFFSET;  in ntb_bwd_setup()
1011 	ndev->reg_ofs.lnk_cntl = ndev->reg_base + BWD_NTBCNTL_OFFSET;  in ntb_bwd_setup()
1012 	ndev->reg_ofs.lnk_stat = ndev->reg_base + BWD_LINK_STATUS_OFFSET;  in ntb_bwd_setup()
1013 	ndev->reg_ofs.spad_read = ndev->reg_base + BWD_SPAD_OFFSET;  in ntb_bwd_setup()
1014 	ndev->reg_ofs.spad_write = ndev->reg_base + BWD_B2B_SPAD_OFFSET;  in ntb_bwd_setup()
1015 	ndev->reg_ofs.spci_cmd = ndev->reg_base + BWD_PCICMD_OFFSET;  in ntb_bwd_setup()
1047 		       ndev->reg_ofs.spci_cmd);  in ntb_device_setup()
1069 	mask = readw(ndev->reg_ofs.ldb_mask);  in bwd_callback_msix_irq()
1071 	writew(mask, ndev->reg_ofs.ldb_mask);  in bwd_callback_msix_irq()
1080 	writeq((u64) 1 << db_cb->db_num, ndev->reg_ofs.ldb);  in bwd_callback_msix_irq()
1094 	mask = readw(ndev->reg_ofs.ldb_mask);  in xeon_callback_msix_irq()
1096 	writew(mask, ndev->reg_ofs.ldb_mask);  in xeon_callback_msix_irq()
1106 	       (db_cb->db_num * ndev->bits_per_vector), ndev->reg_ofs.ldb);  in xeon_callback_msix_irq()
1124 	writew(1 << SNB_LINK_DB, ndev->reg_ofs.ldb);  in xeon_event_msix_irq()
1135 		u64 ldb = readq(ndev->reg_ofs.ldb);  in ntb_interrupt()
1145 		u16 ldb = readw(ndev->reg_ofs.ldb);  in ntb_interrupt()
1337 		writeq(~0, ndev->reg_ofs.ldb_mask);  in ntb_setup_interrupts()
1340 		writew(~var, ndev->reg_ofs.ldb_mask);  in ntb_setup_interrupts()
1370 		writeq(~0, ndev->reg_ofs.ldb_mask);  in ntb_free_interrupts()
1372 		writew(~0, ndev->reg_ofs.ldb_mask);  in ntb_free_interrupts()
1558 		ntb_cntl = readl(ndev->reg_ofs.lnk_cntl);  in ntb_hw_link_up()
1566 		writel(ntb_cntl, ndev->reg_ofs.lnk_cntl);  in ntb_hw_link_up()
1580 	ntb_cntl = readl(ndev->reg_ofs.lnk_cntl);  in ntb_hw_link_down()
1587 	writel(ntb_cntl, ndev->reg_ofs.lnk_cntl);  in ntb_hw_link_down()