213 	struct resource *res;  in xgene_pcie_map_reg()  local
215 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "csr");  in xgene_pcie_map_reg()
216 	port->csr_base = devm_ioremap_resource(port->dev, res);  in xgene_pcie_map_reg()
220 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg");  in xgene_pcie_map_reg()
221 	port->cfg_base = devm_ioremap_resource(port->dev, res);  in xgene_pcie_map_reg()
224 	port->cfg_addr = res->start;  in xgene_pcie_map_reg()
230 				    struct resource *res, u32 offset,  in xgene_pcie_setup_ob_reg()  argument
234 	resource_size_t size = resource_size(res);  in xgene_pcie_setup_ob_reg()
235 	u64 restype = resource_type(res);  in xgene_pcie_setup_ob_reg()
269 				 struct list_head *res,  in xgene_pcie_map_ranges()  argument
276 	resource_list_for_each_entry(window, res) {  in xgene_pcie_map_ranges()
277 		struct resource *res = window->res;  in xgene_pcie_map_ranges()  local
278 		u64 restype = resource_type(res);  in xgene_pcie_map_ranges()
280 		dev_dbg(port->dev, "%pR\n", res);  in xgene_pcie_map_ranges()
284 			xgene_pcie_setup_ob_reg(port, res, OMR3BARL, io_base,  in xgene_pcie_map_ranges()
285 						res->start - window->offset);  in xgene_pcie_map_ranges()
286 			ret = pci_remap_iospace(res, io_base);  in xgene_pcie_map_ranges()
291 			xgene_pcie_setup_ob_reg(port, res, OMR1BARL, res->start,  in xgene_pcie_map_ranges()
292 						res->start - window->offset);  in xgene_pcie_map_ranges()
297 			dev_err(dev, "invalid resource %pR\n", res);  in xgene_pcie_map_ranges()
442 			    struct list_head *res,  in xgene_pcie_setup()  argument
454 	ret = xgene_pcie_map_ranges(port, res, io_base);  in xgene_pcie_setup()
478 	LIST_HEAD(res);  in xgene_pcie_probe_bridge()
494 	ret = of_pci_get_host_bridge_resources(dn, 0, 0xff, &res, &iobase);  in xgene_pcie_probe_bridge()
498 	ret = xgene_pcie_setup(port, &res, iobase);  in xgene_pcie_probe_bridge()
503 					&xgene_pcie_ops, port, &res);  in xgene_pcie_probe_bridge()