Lines Matching refs:dev
53 struct pci_dev *dev; member
58 static void pci_dev_d3_sleep(struct pci_dev *dev) in pci_dev_d3_sleep() argument
60 unsigned int delay = dev->d3_delay; in pci_dev_d3_sleep()
135 dev_warn(&pdev->dev, "can't ioremap BAR %d: %pR\n", bar, res); in pci_ioremap_bar()
177 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap) in pci_find_next_capability() argument
179 return __pci_find_next_cap(dev->bus, dev->devfn, in pci_find_next_capability()
225 int pci_find_capability(struct pci_dev *dev, int cap) in pci_find_capability() argument
229 pos = __pci_bus_find_cap_start(dev->bus, dev->devfn, dev->hdr_type); in pci_find_capability()
231 pos = __pci_find_next_cap(dev->bus, dev->devfn, pos, cap); in pci_find_capability()
276 int pci_find_next_ext_capability(struct pci_dev *dev, int start, int cap) in pci_find_next_ext_capability() argument
285 if (dev->cfg_size <= PCI_CFG_SPACE_SIZE) in pci_find_next_ext_capability()
291 if (pci_read_config_dword(dev, pos, &header) != PCIBIOS_SUCCESSFUL) in pci_find_next_ext_capability()
309 if (pci_read_config_dword(dev, pos, &header) != PCIBIOS_SUCCESSFUL) in pci_find_next_ext_capability()
331 int pci_find_ext_capability(struct pci_dev *dev, int cap) in pci_find_ext_capability() argument
333 return pci_find_next_ext_capability(dev, 0, cap); in pci_find_ext_capability()
337 static int __pci_find_next_ht_cap(struct pci_dev *dev, int pos, int ht_cap) in __pci_find_next_ht_cap() argument
347 pos = __pci_find_next_cap_ttl(dev->bus, dev->devfn, pos, in __pci_find_next_ht_cap()
350 rc = pci_read_config_byte(dev, pos + 3, &cap); in __pci_find_next_ht_cap()
357 pos = __pci_find_next_cap_ttl(dev->bus, dev->devfn, in __pci_find_next_ht_cap()
377 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap) in pci_find_next_ht_capability() argument
379 return __pci_find_next_ht_cap(dev, pos + PCI_CAP_LIST_NEXT, ht_cap); in pci_find_next_ht_capability()
394 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap) in pci_find_ht_capability() argument
398 pos = __pci_bus_find_cap_start(dev->bus, dev->devfn, dev->hdr_type); in pci_find_ht_capability()
400 pos = __pci_find_next_ht_cap(dev, pos, ht_cap); in pci_find_ht_capability()
414 struct resource *pci_find_parent_resource(const struct pci_dev *dev, in pci_find_parent_resource() argument
417 const struct pci_bus *bus = dev->bus; in pci_find_parent_resource()
457 int pci_wait_for_pending(struct pci_dev *dev, int pos, u16 mask) in pci_wait_for_pending() argument
467 pci_read_config_word(dev, pos, &status); in pci_wait_for_pending()
482 static void pci_restore_bars(struct pci_dev *dev) in pci_restore_bars() argument
487 pci_update_resource(dev, i); in pci_restore_bars()
501 static inline bool platform_pci_power_manageable(struct pci_dev *dev) in platform_pci_power_manageable() argument
503 return pci_platform_pm ? pci_platform_pm->is_manageable(dev) : false; in platform_pci_power_manageable()
506 static inline int platform_pci_set_power_state(struct pci_dev *dev, in platform_pci_set_power_state() argument
509 return pci_platform_pm ? pci_platform_pm->set_state(dev, t) : -ENOSYS; in platform_pci_set_power_state()
512 static inline pci_power_t platform_pci_choose_state(struct pci_dev *dev) in platform_pci_choose_state() argument
515 pci_platform_pm->choose_state(dev) : PCI_POWER_ERROR; in platform_pci_choose_state()
518 static inline int platform_pci_sleep_wake(struct pci_dev *dev, bool enable) in platform_pci_sleep_wake() argument
521 pci_platform_pm->sleep_wake(dev, enable) : -ENODEV; in platform_pci_sleep_wake()
524 static inline int platform_pci_run_wake(struct pci_dev *dev, bool enable) in platform_pci_run_wake() argument
527 pci_platform_pm->run_wake(dev, enable) : -ENODEV; in platform_pci_run_wake()
530 static inline bool platform_pci_need_resume(struct pci_dev *dev) in platform_pci_need_resume() argument
532 return pci_platform_pm ? pci_platform_pm->need_resume(dev) : false; in platform_pci_need_resume()
548 static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state) in pci_raw_set_power_state() argument
554 if (dev->current_state == state) in pci_raw_set_power_state()
557 if (!dev->pm_cap) in pci_raw_set_power_state()
567 if (state != PCI_D0 && dev->current_state <= PCI_D3cold in pci_raw_set_power_state()
568 && dev->current_state > state) { in pci_raw_set_power_state()
569 dev_err(&dev->dev, "invalid power transition (from state %d to %d)\n", in pci_raw_set_power_state()
570 dev->current_state, state); in pci_raw_set_power_state()
575 if ((state == PCI_D1 && !dev->d1_support) in pci_raw_set_power_state()
576 || (state == PCI_D2 && !dev->d2_support)) in pci_raw_set_power_state()
579 pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr); in pci_raw_set_power_state()
585 switch (dev->current_state) { in pci_raw_set_power_state()
605 pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr); in pci_raw_set_power_state()
609 if (state == PCI_D3hot || dev->current_state == PCI_D3hot) in pci_raw_set_power_state()
610 pci_dev_d3_sleep(dev); in pci_raw_set_power_state()
611 else if (state == PCI_D2 || dev->current_state == PCI_D2) in pci_raw_set_power_state()
614 pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr); in pci_raw_set_power_state()
615 dev->current_state = (pmcsr & PCI_PM_CTRL_STATE_MASK); in pci_raw_set_power_state()
616 if (dev->current_state != state && printk_ratelimit()) in pci_raw_set_power_state()
617 dev_info(&dev->dev, "Refused to change power state, currently in D%d\n", in pci_raw_set_power_state()
618 dev->current_state); in pci_raw_set_power_state()
634 pci_restore_bars(dev); in pci_raw_set_power_state()
636 if (dev->bus->self) in pci_raw_set_power_state()
637 pcie_aspm_pm_state_change(dev->bus->self); in pci_raw_set_power_state()
648 void pci_update_current_state(struct pci_dev *dev, pci_power_t state) in pci_update_current_state() argument
650 if (dev->pm_cap) { in pci_update_current_state()
657 if (dev->current_state == PCI_D3cold) in pci_update_current_state()
660 dev->current_state = PCI_D3cold; in pci_update_current_state()
663 pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr); in pci_update_current_state()
664 dev->current_state = (pmcsr & PCI_PM_CTRL_STATE_MASK); in pci_update_current_state()
666 dev->current_state = state; in pci_update_current_state()
674 void pci_power_up(struct pci_dev *dev) in pci_power_up() argument
676 if (platform_pci_power_manageable(dev)) in pci_power_up()
677 platform_pci_set_power_state(dev, PCI_D0); in pci_power_up()
679 pci_raw_set_power_state(dev, PCI_D0); in pci_power_up()
680 pci_update_current_state(dev, PCI_D0); in pci_power_up()
688 static int pci_platform_power_transition(struct pci_dev *dev, pci_power_t state) in pci_platform_power_transition() argument
692 if (platform_pci_power_manageable(dev)) { in pci_platform_power_transition()
693 error = platform_pci_set_power_state(dev, state); in pci_platform_power_transition()
695 pci_update_current_state(dev, state); in pci_platform_power_transition()
699 if (error && !dev->pm_cap) /* Fall back to PCI_D0 */ in pci_platform_power_transition()
700 dev->current_state = PCI_D0; in pci_platform_power_transition()
713 pm_request_resume(&pci_dev->dev); in pci_wakeup()
732 static void __pci_start_power_transition(struct pci_dev *dev, pci_power_t state) in __pci_start_power_transition() argument
735 pci_platform_power_transition(dev, PCI_D0); in __pci_start_power_transition()
743 if (dev->runtime_d3cold) { in __pci_start_power_transition()
744 msleep(dev->d3cold_delay); in __pci_start_power_transition()
751 pci_wakeup_bus(dev->subordinate); in __pci_start_power_transition()
761 static int __pci_dev_set_current_state(struct pci_dev *dev, void *data) in __pci_dev_set_current_state() argument
765 dev->current_state = state; in __pci_dev_set_current_state()
787 int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state) in __pci_complete_power_transition() argument
793 ret = pci_platform_power_transition(dev, state); in __pci_complete_power_transition()
796 __pci_bus_set_current_state(dev->subordinate, PCI_D3cold); in __pci_complete_power_transition()
816 int pci_set_power_state(struct pci_dev *dev, pci_power_t state) in pci_set_power_state() argument
825 else if ((state == PCI_D1 || state == PCI_D2) && pci_no_d1d2(dev)) in pci_set_power_state()
834 if (dev->current_state == state) in pci_set_power_state()
837 __pci_start_power_transition(dev, state); in pci_set_power_state()
841 if (state >= PCI_D3hot && (dev->dev_flags & PCI_DEV_FLAGS_NO_D3)) in pci_set_power_state()
848 error = pci_raw_set_power_state(dev, state > PCI_D3hot ? in pci_set_power_state()
851 if (!__pci_complete_power_transition(dev, state)) in pci_set_power_state()
868 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) in pci_choose_state() argument
872 if (!dev->pm_cap) in pci_choose_state()
875 ret = platform_pci_choose_state(dev); in pci_choose_state()
889 dev_info(&dev->dev, "unrecognized suspend event %d\n", in pci_choose_state()
911 struct pci_cap_saved_state *pci_find_saved_cap(struct pci_dev *dev, char cap) in pci_find_saved_cap() argument
913 return _pci_find_saved_cap(dev, cap, false); in pci_find_saved_cap()
916 struct pci_cap_saved_state *pci_find_saved_ext_cap(struct pci_dev *dev, u16 cap) in pci_find_saved_ext_cap() argument
918 return _pci_find_saved_cap(dev, cap, true); in pci_find_saved_ext_cap()
921 static int pci_save_pcie_state(struct pci_dev *dev) in pci_save_pcie_state() argument
927 if (!pci_is_pcie(dev)) in pci_save_pcie_state()
930 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_EXP); in pci_save_pcie_state()
932 dev_err(&dev->dev, "buffer not found in %s\n", __func__); in pci_save_pcie_state()
937 pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &cap[i++]); in pci_save_pcie_state()
938 pcie_capability_read_word(dev, PCI_EXP_LNKCTL, &cap[i++]); in pci_save_pcie_state()
939 pcie_capability_read_word(dev, PCI_EXP_SLTCTL, &cap[i++]); in pci_save_pcie_state()
940 pcie_capability_read_word(dev, PCI_EXP_RTCTL, &cap[i++]); in pci_save_pcie_state()
941 pcie_capability_read_word(dev, PCI_EXP_DEVCTL2, &cap[i++]); in pci_save_pcie_state()
942 pcie_capability_read_word(dev, PCI_EXP_LNKCTL2, &cap[i++]); in pci_save_pcie_state()
943 pcie_capability_read_word(dev, PCI_EXP_SLTCTL2, &cap[i++]); in pci_save_pcie_state()
948 static void pci_restore_pcie_state(struct pci_dev *dev) in pci_restore_pcie_state() argument
954 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_EXP); in pci_restore_pcie_state()
959 pcie_capability_write_word(dev, PCI_EXP_DEVCTL, cap[i++]); in pci_restore_pcie_state()
960 pcie_capability_write_word(dev, PCI_EXP_LNKCTL, cap[i++]); in pci_restore_pcie_state()
961 pcie_capability_write_word(dev, PCI_EXP_SLTCTL, cap[i++]); in pci_restore_pcie_state()
962 pcie_capability_write_word(dev, PCI_EXP_RTCTL, cap[i++]); in pci_restore_pcie_state()
963 pcie_capability_write_word(dev, PCI_EXP_DEVCTL2, cap[i++]); in pci_restore_pcie_state()
964 pcie_capability_write_word(dev, PCI_EXP_LNKCTL2, cap[i++]); in pci_restore_pcie_state()
965 pcie_capability_write_word(dev, PCI_EXP_SLTCTL2, cap[i++]); in pci_restore_pcie_state()
969 static int pci_save_pcix_state(struct pci_dev *dev) in pci_save_pcix_state() argument
974 pos = pci_find_capability(dev, PCI_CAP_ID_PCIX); in pci_save_pcix_state()
978 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_PCIX); in pci_save_pcix_state()
980 dev_err(&dev->dev, "buffer not found in %s\n", __func__); in pci_save_pcix_state()
984 pci_read_config_word(dev, pos + PCI_X_CMD, in pci_save_pcix_state()
990 static void pci_restore_pcix_state(struct pci_dev *dev) in pci_restore_pcix_state() argument
996 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_PCIX); in pci_restore_pcix_state()
997 pos = pci_find_capability(dev, PCI_CAP_ID_PCIX); in pci_restore_pcix_state()
1002 pci_write_config_word(dev, pos + PCI_X_CMD, cap[i++]); in pci_restore_pcix_state()
1010 int pci_save_state(struct pci_dev *dev) in pci_save_state() argument
1015 pci_read_config_dword(dev, i * 4, &dev->saved_config_space[i]); in pci_save_state()
1016 dev->state_saved = true; in pci_save_state()
1018 i = pci_save_pcie_state(dev); in pci_save_state()
1022 i = pci_save_pcix_state(dev); in pci_save_state()
1026 return pci_save_vc_state(dev); in pci_save_state()
1040 dev_dbg(&pdev->dev, "restoring config space at offset %#x (was %#x, writing %#x)\n", in pci_restore_config_dword()
1081 void pci_restore_state(struct pci_dev *dev) in pci_restore_state() argument
1083 if (!dev->state_saved) in pci_restore_state()
1087 pci_restore_pcie_state(dev); in pci_restore_state()
1088 pci_restore_ats_state(dev); in pci_restore_state()
1089 pci_restore_vc_state(dev); in pci_restore_state()
1091 pci_restore_config_space(dev); in pci_restore_state()
1093 pci_restore_pcix_state(dev); in pci_restore_state()
1094 pci_restore_msi_state(dev); in pci_restore_state()
1095 pci_restore_iov_state(dev); in pci_restore_state()
1097 dev->state_saved = false; in pci_restore_state()
1113 struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev) in pci_store_saved_state() argument
1120 if (!dev->state_saved) in pci_store_saved_state()
1125 hlist_for_each_entry(tmp, &dev->saved_cap_space, next) in pci_store_saved_state()
1132 memcpy(state->config_space, dev->saved_config_space, in pci_store_saved_state()
1136 hlist_for_each_entry(tmp, &dev->saved_cap_space, next) { in pci_store_saved_state()
1152 int pci_load_saved_state(struct pci_dev *dev, in pci_load_saved_state() argument
1157 dev->state_saved = false; in pci_load_saved_state()
1162 memcpy(dev->saved_config_space, state->config_space, in pci_load_saved_state()
1169 tmp = _pci_find_saved_cap(dev, cap->cap_nr, cap->cap_extended); in pci_load_saved_state()
1178 dev->state_saved = true; in pci_load_saved_state()
1189 int pci_load_and_free_saved_state(struct pci_dev *dev, in pci_load_and_free_saved_state() argument
1192 int ret = pci_load_saved_state(dev, *state); in pci_load_and_free_saved_state()
1199 int __weak pcibios_enable_device(struct pci_dev *dev, int bars) in pcibios_enable_device() argument
1201 return pci_enable_resources(dev, bars); in pcibios_enable_device()
1204 static int do_pci_enable_device(struct pci_dev *dev, int bars) in do_pci_enable_device() argument
1211 err = pci_set_power_state(dev, PCI_D0); in do_pci_enable_device()
1215 bridge = pci_upstream_bridge(dev); in do_pci_enable_device()
1219 err = pcibios_enable_device(dev, bars); in do_pci_enable_device()
1222 pci_fixup_device(pci_fixup_enable, dev); in do_pci_enable_device()
1224 if (dev->msi_enabled || dev->msix_enabled) in do_pci_enable_device()
1227 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); in do_pci_enable_device()
1229 pci_read_config_word(dev, PCI_COMMAND, &cmd); in do_pci_enable_device()
1231 pci_write_config_word(dev, PCI_COMMAND, in do_pci_enable_device()
1245 int pci_reenable_device(struct pci_dev *dev) in pci_reenable_device() argument
1247 if (pci_is_enabled(dev)) in pci_reenable_device()
1248 return do_pci_enable_device(dev, (1 << PCI_NUM_RESOURCES) - 1); in pci_reenable_device()
1253 static void pci_enable_bridge(struct pci_dev *dev) in pci_enable_bridge() argument
1258 bridge = pci_upstream_bridge(dev); in pci_enable_bridge()
1262 if (pci_is_enabled(dev)) { in pci_enable_bridge()
1263 if (!dev->is_busmaster) in pci_enable_bridge()
1264 pci_set_master(dev); in pci_enable_bridge()
1268 retval = pci_enable_device(dev); in pci_enable_bridge()
1270 dev_err(&dev->dev, "Error enabling bridge (%d), continuing\n", in pci_enable_bridge()
1272 pci_set_master(dev); in pci_enable_bridge()
1275 static int pci_enable_device_flags(struct pci_dev *dev, unsigned long flags) in pci_enable_device_flags() argument
1287 if (dev->pm_cap) { in pci_enable_device_flags()
1289 pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr); in pci_enable_device_flags()
1290 dev->current_state = (pmcsr & PCI_PM_CTRL_STATE_MASK); in pci_enable_device_flags()
1293 if (atomic_inc_return(&dev->enable_cnt) > 1) in pci_enable_device_flags()
1296 bridge = pci_upstream_bridge(dev); in pci_enable_device_flags()
1302 if (dev->resource[i].flags & flags) in pci_enable_device_flags()
1305 if (dev->resource[i].flags & flags) in pci_enable_device_flags()
1308 err = do_pci_enable_device(dev, bars); in pci_enable_device_flags()
1310 atomic_dec(&dev->enable_cnt); in pci_enable_device_flags()
1322 int pci_enable_device_io(struct pci_dev *dev) in pci_enable_device_io() argument
1324 return pci_enable_device_flags(dev, IORESOURCE_IO); in pci_enable_device_io()
1336 int pci_enable_device_mem(struct pci_dev *dev) in pci_enable_device_mem() argument
1338 return pci_enable_device_flags(dev, IORESOURCE_MEM); in pci_enable_device_mem()
1353 int pci_enable_device(struct pci_dev *dev) in pci_enable_device() argument
1355 return pci_enable_device_flags(dev, IORESOURCE_MEM | IORESOURCE_IO); in pci_enable_device()
1375 struct pci_dev *dev = container_of(gendev, struct pci_dev, dev); in pcim_release() local
1379 if (dev->msi_enabled) in pcim_release()
1380 pci_disable_msi(dev); in pcim_release()
1381 if (dev->msix_enabled) in pcim_release()
1382 pci_disable_msix(dev); in pcim_release()
1386 pci_release_region(dev, i); in pcim_release()
1389 pci_intx(dev, this->orig_intx); in pcim_release()
1392 pci_disable_device(dev); in pcim_release()
1399 dr = devres_find(&pdev->dev, pcim_release, NULL, NULL); in get_pci_dr()
1406 return devres_get(&pdev->dev, new_dr, NULL, NULL); in get_pci_dr()
1412 return devres_find(&pdev->dev, pcim_release, NULL, NULL); in find_pci_dr()
1469 int __weak pcibios_add_device(struct pci_dev *dev) in pcibios_add_device() argument
1482 void __weak pcibios_release_device(struct pci_dev *dev) {} in pcibios_release_device() argument
1492 void __weak pcibios_disable_device (struct pci_dev *dev) {} in pcibios_disable_device() argument
1505 static void do_pci_disable_device(struct pci_dev *dev) in do_pci_disable_device() argument
1509 pci_read_config_word(dev, PCI_COMMAND, &pci_command); in do_pci_disable_device()
1512 pci_write_config_word(dev, PCI_COMMAND, pci_command); in do_pci_disable_device()
1515 pcibios_disable_device(dev); in do_pci_disable_device()
1525 void pci_disable_enabled_device(struct pci_dev *dev) in pci_disable_enabled_device() argument
1527 if (pci_is_enabled(dev)) in pci_disable_enabled_device()
1528 do_pci_disable_device(dev); in pci_disable_enabled_device()
1541 void pci_disable_device(struct pci_dev *dev) in pci_disable_device() argument
1545 dr = find_pci_dr(dev); in pci_disable_device()
1549 dev_WARN_ONCE(&dev->dev, atomic_read(&dev->enable_cnt) <= 0, in pci_disable_device()
1552 if (atomic_dec_return(&dev->enable_cnt) != 0) in pci_disable_device()
1555 do_pci_disable_device(dev); in pci_disable_device()
1557 dev->is_busmaster = 0; in pci_disable_device()
1570 int __weak pcibios_set_pcie_reset_state(struct pci_dev *dev, in pcibios_set_pcie_reset_state() argument
1584 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state) in pci_set_pcie_reset_state() argument
1586 return pcibios_set_pcie_reset_state(dev, state); in pci_set_pcie_reset_state()
1598 bool pci_check_pme_status(struct pci_dev *dev) in pci_check_pme_status() argument
1604 if (!dev->pm_cap) in pci_check_pme_status()
1607 pmcsr_pos = dev->pm_cap + PCI_PM_CTRL; in pci_check_pme_status()
1608 pci_read_config_word(dev, pmcsr_pos, &pmcsr); in pci_check_pme_status()
1620 pci_write_config_word(dev, pmcsr_pos, pmcsr); in pci_check_pme_status()
1633 static int pci_pme_wakeup(struct pci_dev *dev, void *pme_poll_reset) in pci_pme_wakeup() argument
1635 if (pme_poll_reset && dev->pme_poll) in pci_pme_wakeup()
1636 dev->pme_poll = false; in pci_pme_wakeup()
1638 if (pci_check_pme_status(dev)) { in pci_pme_wakeup()
1639 pci_wakeup_event(dev); in pci_pme_wakeup()
1640 pm_request_resume(&dev->dev); in pci_pme_wakeup()
1661 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state) in pci_pme_capable() argument
1663 if (!dev->pm_cap) in pci_pme_capable()
1666 return !!(dev->pme_support & (1 << state)); in pci_pme_capable()
1676 if (pme_dev->dev->pme_poll) { in pci_pme_list_scan()
1679 bridge = pme_dev->dev->bus->self; in pci_pme_list_scan()
1687 pci_pme_wakeup(pme_dev->dev, NULL); in pci_pme_list_scan()
1707 void pci_pme_active(struct pci_dev *dev, bool enable) in pci_pme_active() argument
1711 if (!dev->pme_support) in pci_pme_active()
1714 pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr); in pci_pme_active()
1720 pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr); in pci_pme_active()
1742 if (dev->pme_poll) { in pci_pme_active()
1748 dev_warn(&dev->dev, "can't enable PME#\n"); in pci_pme_active()
1751 pme_dev->dev = dev; in pci_pme_active()
1761 if (pme_dev->dev == dev) { in pci_pme_active()
1771 dev_dbg(&dev->dev, "PME# %s\n", enable ? "enabled" : "disabled"); in pci_pme_active()
1795 int __pci_enable_wake(struct pci_dev *dev, pci_power_t state, in __pci_enable_wake() argument
1800 if (enable && !runtime && !device_may_wakeup(&dev->dev)) in __pci_enable_wake()
1804 if (!!enable == !!dev->wakeup_prepared) in __pci_enable_wake()
1816 if (pci_pme_capable(dev, state)) in __pci_enable_wake()
1817 pci_pme_active(dev, true); in __pci_enable_wake()
1820 error = runtime ? platform_pci_run_wake(dev, true) : in __pci_enable_wake()
1821 platform_pci_sleep_wake(dev, true); in __pci_enable_wake()
1825 dev->wakeup_prepared = true; in __pci_enable_wake()
1828 platform_pci_run_wake(dev, false); in __pci_enable_wake()
1830 platform_pci_sleep_wake(dev, false); in __pci_enable_wake()
1831 pci_pme_active(dev, false); in __pci_enable_wake()
1832 dev->wakeup_prepared = false; in __pci_enable_wake()
1853 int pci_wake_from_d3(struct pci_dev *dev, bool enable) in pci_wake_from_d3() argument
1855 return pci_pme_capable(dev, PCI_D3cold) ? in pci_wake_from_d3()
1856 pci_enable_wake(dev, PCI_D3cold, enable) : in pci_wake_from_d3()
1857 pci_enable_wake(dev, PCI_D3hot, enable); in pci_wake_from_d3()
1869 static pci_power_t pci_target_state(struct pci_dev *dev) in pci_target_state() argument
1873 if (platform_pci_power_manageable(dev)) { in pci_target_state()
1878 pci_power_t state = platform_pci_choose_state(dev); in pci_target_state()
1886 if (pci_no_d1d2(dev)) in pci_target_state()
1891 } else if (!dev->pm_cap) { in pci_target_state()
1893 } else if (device_may_wakeup(&dev->dev)) { in pci_target_state()
1899 if (dev->pme_support) { in pci_target_state()
1901 && !(dev->pme_support & (1 << target_state))) in pci_target_state()
1917 int pci_prepare_to_sleep(struct pci_dev *dev) in pci_prepare_to_sleep() argument
1919 pci_power_t target_state = pci_target_state(dev); in pci_prepare_to_sleep()
1925 pci_enable_wake(dev, target_state, device_may_wakeup(&dev->dev)); in pci_prepare_to_sleep()
1927 error = pci_set_power_state(dev, target_state); in pci_prepare_to_sleep()
1930 pci_enable_wake(dev, target_state, false); in pci_prepare_to_sleep()
1942 int pci_back_from_sleep(struct pci_dev *dev) in pci_back_from_sleep() argument
1944 pci_enable_wake(dev, PCI_D0, false); in pci_back_from_sleep()
1945 return pci_set_power_state(dev, PCI_D0); in pci_back_from_sleep()
1956 int pci_finish_runtime_suspend(struct pci_dev *dev) in pci_finish_runtime_suspend() argument
1958 pci_power_t target_state = pci_target_state(dev); in pci_finish_runtime_suspend()
1964 dev->runtime_d3cold = target_state == PCI_D3cold; in pci_finish_runtime_suspend()
1966 __pci_enable_wake(dev, target_state, true, pci_dev_run_wake(dev)); in pci_finish_runtime_suspend()
1968 error = pci_set_power_state(dev, target_state); in pci_finish_runtime_suspend()
1971 __pci_enable_wake(dev, target_state, true, false); in pci_finish_runtime_suspend()
1972 dev->runtime_d3cold = false; in pci_finish_runtime_suspend()
1986 bool pci_dev_run_wake(struct pci_dev *dev) in pci_dev_run_wake() argument
1988 struct pci_bus *bus = dev->bus; in pci_dev_run_wake()
1990 if (device_run_wake(&dev->dev)) in pci_dev_run_wake()
1993 if (!dev->pme_support) in pci_dev_run_wake()
1999 if (device_run_wake(&bridge->dev)) in pci_dev_run_wake()
2024 struct device *dev = &pci_dev->dev; in pci_dev_keep_suspended() local
2026 if (!pm_runtime_suspended(dev) in pci_dev_keep_suspended()
2027 || (device_can_wakeup(dev) && !device_may_wakeup(dev)) in pci_dev_keep_suspended()
2036 struct device *dev = &pdev->dev; in pci_config_pm_runtime_get() local
2037 struct device *parent = dev->parent; in pci_config_pm_runtime_get()
2041 pm_runtime_get_noresume(dev); in pci_config_pm_runtime_get()
2046 pm_runtime_barrier(dev); in pci_config_pm_runtime_get()
2053 pm_runtime_resume(dev); in pci_config_pm_runtime_get()
2058 struct device *dev = &pdev->dev; in pci_config_pm_runtime_put() local
2059 struct device *parent = dev->parent; in pci_config_pm_runtime_put()
2061 pm_runtime_put(dev); in pci_config_pm_runtime_put()
2070 void pci_pm_init(struct pci_dev *dev) in pci_pm_init() argument
2075 pm_runtime_forbid(&dev->dev); in pci_pm_init()
2076 pm_runtime_set_active(&dev->dev); in pci_pm_init()
2077 pm_runtime_enable(&dev->dev); in pci_pm_init()
2078 device_enable_async_suspend(&dev->dev); in pci_pm_init()
2079 dev->wakeup_prepared = false; in pci_pm_init()
2081 dev->pm_cap = 0; in pci_pm_init()
2082 dev->pme_support = 0; in pci_pm_init()
2085 pm = pci_find_capability(dev, PCI_CAP_ID_PM); in pci_pm_init()
2089 pci_read_config_word(dev, pm + PCI_PM_PMC, &pmc); in pci_pm_init()
2092 dev_err(&dev->dev, "unsupported PM cap regs version (%u)\n", in pci_pm_init()
2097 dev->pm_cap = pm; in pci_pm_init()
2098 dev->d3_delay = PCI_PM_D3_WAIT; in pci_pm_init()
2099 dev->d3cold_delay = PCI_PM_D3COLD_WAIT; in pci_pm_init()
2100 dev->d3cold_allowed = true; in pci_pm_init()
2102 dev->d1_support = false; in pci_pm_init()
2103 dev->d2_support = false; in pci_pm_init()
2104 if (!pci_no_d1d2(dev)) { in pci_pm_init()
2106 dev->d1_support = true; in pci_pm_init()
2108 dev->d2_support = true; in pci_pm_init()
2110 if (dev->d1_support || dev->d2_support) in pci_pm_init()
2111 dev_printk(KERN_DEBUG, &dev->dev, "supports%s%s\n", in pci_pm_init()
2112 dev->d1_support ? " D1" : "", in pci_pm_init()
2113 dev->d2_support ? " D2" : ""); in pci_pm_init()
2118 dev_printk(KERN_DEBUG, &dev->dev, in pci_pm_init()
2125 dev->pme_support = pmc >> PCI_PM_CAP_PME_SHIFT; in pci_pm_init()
2126 dev->pme_poll = true; in pci_pm_init()
2131 device_set_wakeup_capable(&dev->dev, true); in pci_pm_init()
2133 pci_pme_active(dev, false); in pci_pm_init()
2151 static int _pci_add_cap_save_buffer(struct pci_dev *dev, u16 cap, in _pci_add_cap_save_buffer() argument
2158 pos = pci_find_ext_capability(dev, cap); in _pci_add_cap_save_buffer()
2160 pos = pci_find_capability(dev, cap); in _pci_add_cap_save_buffer()
2172 pci_add_saved_cap(dev, save_state); in _pci_add_cap_save_buffer()
2177 int pci_add_cap_save_buffer(struct pci_dev *dev, char cap, unsigned int size) in pci_add_cap_save_buffer() argument
2179 return _pci_add_cap_save_buffer(dev, cap, false, size); in pci_add_cap_save_buffer()
2182 int pci_add_ext_cap_save_buffer(struct pci_dev *dev, u16 cap, unsigned int size) in pci_add_ext_cap_save_buffer() argument
2184 return _pci_add_cap_save_buffer(dev, cap, true, size); in pci_add_ext_cap_save_buffer()
2191 void pci_allocate_cap_save_buffers(struct pci_dev *dev) in pci_allocate_cap_save_buffers() argument
2195 error = pci_add_cap_save_buffer(dev, PCI_CAP_ID_EXP, in pci_allocate_cap_save_buffers()
2198 dev_err(&dev->dev, in pci_allocate_cap_save_buffers()
2201 error = pci_add_cap_save_buffer(dev, PCI_CAP_ID_PCIX, sizeof(u16)); in pci_allocate_cap_save_buffers()
2203 dev_err(&dev->dev, in pci_allocate_cap_save_buffers()
2206 pci_allocate_vc_save_buffers(dev); in pci_allocate_cap_save_buffers()
2209 void pci_free_cap_save_buffers(struct pci_dev *dev) in pci_free_cap_save_buffers() argument
2214 hlist_for_each_entry_safe(tmp, n, &dev->saved_cap_space, next) in pci_free_cap_save_buffers()
2225 void pci_configure_ari(struct pci_dev *dev) in pci_configure_ari() argument
2230 if (pcie_ari_disabled || !pci_is_pcie(dev) || dev->devfn) in pci_configure_ari()
2233 bridge = dev->bus->self; in pci_configure_ari()
2241 if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ARI)) { in pci_configure_ari()
2266 static int pci_std_enable_acs(struct pci_dev *dev) in pci_std_enable_acs() argument
2272 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ACS); in pci_std_enable_acs()
2276 pci_read_config_word(dev, pos + PCI_ACS_CAP, &cap); in pci_std_enable_acs()
2277 pci_read_config_word(dev, pos + PCI_ACS_CTRL, &ctrl); in pci_std_enable_acs()
2291 pci_write_config_word(dev, pos + PCI_ACS_CTRL, ctrl); in pci_std_enable_acs()
2300 void pci_enable_acs(struct pci_dev *dev) in pci_enable_acs() argument
2305 if (!pci_std_enable_acs(dev)) in pci_enable_acs()
2308 pci_dev_specific_enable_acs(dev); in pci_enable_acs()
2452 u8 pci_swizzle_interrupt_pin(const struct pci_dev *dev, u8 pin) in pci_swizzle_interrupt_pin() argument
2456 if (pci_ari_enabled(dev->bus)) in pci_swizzle_interrupt_pin()
2459 slot = PCI_SLOT(dev->devfn); in pci_swizzle_interrupt_pin()
2464 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge) in pci_get_interrupt_pin() argument
2468 pin = dev->pin; in pci_get_interrupt_pin()
2472 while (!pci_is_root_bus(dev->bus)) { in pci_get_interrupt_pin()
2473 pin = pci_swizzle_interrupt_pin(dev, pin); in pci_get_interrupt_pin()
2474 dev = dev->bus->self; in pci_get_interrupt_pin()
2476 *bridge = dev; in pci_get_interrupt_pin()
2488 u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp) in pci_common_swizzle() argument
2492 while (!pci_is_root_bus(dev->bus)) { in pci_common_swizzle()
2493 pin = pci_swizzle_interrupt_pin(dev, pin); in pci_common_swizzle()
2494 dev = dev->bus->self; in pci_common_swizzle()
2497 return PCI_SLOT(dev->devfn); in pci_common_swizzle()
2574 dev_warn(&pdev->dev, "BAR %d: can't reserve %pR\n", bar, in __pci_request_region()
2771 static void __pci_set_master(struct pci_dev *dev, bool enable) in __pci_set_master() argument
2775 pci_read_config_word(dev, PCI_COMMAND, &old_cmd); in __pci_set_master()
2781 dev_dbg(&dev->dev, "%s bus mastering\n", in __pci_set_master()
2783 pci_write_config_word(dev, PCI_COMMAND, cmd); in __pci_set_master()
2785 dev->is_busmaster = enable; in __pci_set_master()
2808 void __weak pcibios_set_master(struct pci_dev *dev) in pcibios_set_master() argument
2813 if (pci_is_pcie(dev)) in pcibios_set_master()
2816 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat); in pcibios_set_master()
2824 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); in pcibios_set_master()
2834 void pci_set_master(struct pci_dev *dev) in pci_set_master() argument
2836 __pci_set_master(dev, true); in pci_set_master()
2837 pcibios_set_master(dev); in pci_set_master()
2845 void pci_clear_master(struct pci_dev *dev) in pci_clear_master() argument
2847 __pci_set_master(dev, false); in pci_clear_master()
2861 int pci_set_cacheline_size(struct pci_dev *dev) in pci_set_cacheline_size() argument
2870 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size()
2876 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, pci_cache_line_size); in pci_set_cacheline_size()
2878 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size()
2882 dev_printk(KERN_DEBUG, &dev->dev, "cache line size of %d is not supported\n", in pci_set_cacheline_size()
2897 int pci_set_mwi(struct pci_dev *dev) in pci_set_mwi() argument
2905 rc = pci_set_cacheline_size(dev); in pci_set_mwi()
2909 pci_read_config_word(dev, PCI_COMMAND, &cmd); in pci_set_mwi()
2911 dev_dbg(&dev->dev, "enabling Mem-Wr-Inval\n"); in pci_set_mwi()
2913 pci_write_config_word(dev, PCI_COMMAND, cmd); in pci_set_mwi()
2929 int pci_try_set_mwi(struct pci_dev *dev) in pci_try_set_mwi() argument
2934 return pci_set_mwi(dev); in pci_try_set_mwi()
2945 void pci_clear_mwi(struct pci_dev *dev) in pci_clear_mwi() argument
2950 pci_read_config_word(dev, PCI_COMMAND, &cmd); in pci_clear_mwi()
2953 pci_write_config_word(dev, PCI_COMMAND, cmd); in pci_clear_mwi()
2998 bool pci_intx_mask_supported(struct pci_dev *dev) in pci_intx_mask_supported() argument
3003 if (dev->broken_intx_masking) in pci_intx_mask_supported()
3006 pci_cfg_access_lock(dev); in pci_intx_mask_supported()
3008 pci_read_config_word(dev, PCI_COMMAND, &orig); in pci_intx_mask_supported()
3009 pci_write_config_word(dev, PCI_COMMAND, in pci_intx_mask_supported()
3011 pci_read_config_word(dev, PCI_COMMAND, &new); in pci_intx_mask_supported()
3019 dev_err(&dev->dev, "Command register changed from 0x%x to 0x%x: driver or hardware bug?\n", in pci_intx_mask_supported()
3023 pci_write_config_word(dev, PCI_COMMAND, orig); in pci_intx_mask_supported()
3026 pci_cfg_access_unlock(dev); in pci_intx_mask_supported()
3031 static bool pci_check_and_set_intx_mask(struct pci_dev *dev, bool mask) in pci_check_and_set_intx_mask() argument
3033 struct pci_bus *bus = dev->bus; in pci_check_and_set_intx_mask()
3049 bus->ops->read(bus, dev->devfn, PCI_COMMAND, 4, &cmd_status_dword); in pci_check_and_set_intx_mask()
3068 bus->ops->write(bus, dev->devfn, PCI_COMMAND, 2, newcmd); in pci_check_and_set_intx_mask()
3084 bool pci_check_and_mask_intx(struct pci_dev *dev) in pci_check_and_mask_intx() argument
3086 return pci_check_and_set_intx_mask(dev, true); in pci_check_and_mask_intx()
3098 bool pci_check_and_unmask_intx(struct pci_dev *dev) in pci_check_and_unmask_intx() argument
3100 return pci_check_and_set_intx_mask(dev, false); in pci_check_and_unmask_intx()
3112 void pci_msi_off(struct pci_dev *dev) in pci_msi_off() argument
3122 pos = pci_find_capability(dev, PCI_CAP_ID_MSI); in pci_msi_off()
3124 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control); in pci_msi_off()
3126 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control); in pci_msi_off()
3128 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); in pci_msi_off()
3130 pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control); in pci_msi_off()
3132 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); in pci_msi_off()
3137 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size) in pci_set_dma_max_seg_size() argument
3139 return dma_set_max_seg_size(&dev->dev, size); in pci_set_dma_max_seg_size()
3143 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask) in pci_set_dma_seg_boundary() argument
3145 return dma_set_seg_boundary(&dev->dev, mask); in pci_set_dma_seg_boundary()
3155 int pci_wait_for_pending_transaction(struct pci_dev *dev) in pci_wait_for_pending_transaction() argument
3157 if (!pci_is_pcie(dev)) in pci_wait_for_pending_transaction()
3160 return pci_wait_for_pending(dev, pci_pcie_cap(dev) + PCI_EXP_DEVSTA, in pci_wait_for_pending_transaction()
3165 static int pcie_flr(struct pci_dev *dev, int probe) in pcie_flr() argument
3169 pcie_capability_read_dword(dev, PCI_EXP_DEVCAP, &cap); in pcie_flr()
3176 if (!pci_wait_for_pending_transaction(dev)) in pcie_flr()
3177 …dev_err(&dev->dev, "timed out waiting for pending transaction; performing function level reset any… in pcie_flr()
3179 pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR); in pcie_flr()
3184 static int pci_af_flr(struct pci_dev *dev, int probe) in pci_af_flr() argument
3189 pos = pci_find_capability(dev, PCI_CAP_ID_AF); in pci_af_flr()
3193 pci_read_config_byte(dev, pos + PCI_AF_CAP, &cap); in pci_af_flr()
3205 if (!pci_wait_for_pending(dev, pos + PCI_AF_CTRL, in pci_af_flr()
3207 …dev_err(&dev->dev, "timed out waiting for pending transaction; performing AF function level reset … in pci_af_flr()
3209 pci_write_config_byte(dev, pos + PCI_AF_CTRL, PCI_AF_CTRL_FLR); in pci_af_flr()
3229 static int pci_pm_reset(struct pci_dev *dev, int probe) in pci_pm_reset() argument
3233 if (!dev->pm_cap || dev->dev_flags & PCI_DEV_FLAGS_NO_PM_RESET) in pci_pm_reset()
3236 pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &csr); in pci_pm_reset()
3243 if (dev->current_state != PCI_D0) in pci_pm_reset()
3248 pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr); in pci_pm_reset()
3249 pci_dev_d3_sleep(dev); in pci_pm_reset()
3253 pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr); in pci_pm_reset()
3254 pci_dev_d3_sleep(dev); in pci_pm_reset()
3259 void pci_reset_secondary_bus(struct pci_dev *dev) in pci_reset_secondary_bus() argument
3263 pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &ctrl); in pci_reset_secondary_bus()
3265 pci_write_config_word(dev, PCI_BRIDGE_CONTROL, ctrl); in pci_reset_secondary_bus()
3273 pci_write_config_word(dev, PCI_BRIDGE_CONTROL, ctrl); in pci_reset_secondary_bus()
3285 void __weak pcibios_reset_secondary_bus(struct pci_dev *dev) in pcibios_reset_secondary_bus() argument
3287 pci_reset_secondary_bus(dev); in pcibios_reset_secondary_bus()
3297 void pci_reset_bridge_secondary_bus(struct pci_dev *dev) in pci_reset_bridge_secondary_bus() argument
3299 pcibios_reset_secondary_bus(dev); in pci_reset_bridge_secondary_bus()
3303 static int pci_parent_bus_reset(struct pci_dev *dev, int probe) in pci_parent_bus_reset() argument
3307 if (pci_is_root_bus(dev->bus) || dev->subordinate || in pci_parent_bus_reset()
3308 !dev->bus->self || dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET) in pci_parent_bus_reset()
3311 list_for_each_entry(pdev, &dev->bus->devices, bus_list) in pci_parent_bus_reset()
3312 if (pdev != dev) in pci_parent_bus_reset()
3318 pci_reset_bridge_secondary_bus(dev->bus->self); in pci_parent_bus_reset()
3338 static int pci_dev_reset_slot_function(struct pci_dev *dev, int probe) in pci_dev_reset_slot_function() argument
3342 if (dev->subordinate || !dev->slot || in pci_dev_reset_slot_function()
3343 dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET) in pci_dev_reset_slot_function()
3346 list_for_each_entry(pdev, &dev->bus->devices, bus_list) in pci_dev_reset_slot_function()
3347 if (pdev != dev && pdev->slot == dev->slot) in pci_dev_reset_slot_function()
3350 return pci_reset_hotplug_slot(dev->slot->hotplug, probe); in pci_dev_reset_slot_function()
3353 static int __pci_dev_reset(struct pci_dev *dev, int probe) in __pci_dev_reset() argument
3359 rc = pci_dev_specific_reset(dev, probe); in __pci_dev_reset()
3363 rc = pcie_flr(dev, probe); in __pci_dev_reset()
3367 rc = pci_af_flr(dev, probe); in __pci_dev_reset()
3371 rc = pci_pm_reset(dev, probe); in __pci_dev_reset()
3375 rc = pci_dev_reset_slot_function(dev, probe); in __pci_dev_reset()
3379 rc = pci_parent_bus_reset(dev, probe); in __pci_dev_reset()
3384 static void pci_dev_lock(struct pci_dev *dev) in pci_dev_lock() argument
3386 pci_cfg_access_lock(dev); in pci_dev_lock()
3388 device_lock(&dev->dev); in pci_dev_lock()
3392 static int pci_dev_trylock(struct pci_dev *dev) in pci_dev_trylock() argument
3394 if (pci_cfg_access_trylock(dev)) { in pci_dev_trylock()
3395 if (device_trylock(&dev->dev)) in pci_dev_trylock()
3397 pci_cfg_access_unlock(dev); in pci_dev_trylock()
3403 static void pci_dev_unlock(struct pci_dev *dev) in pci_dev_unlock() argument
3405 device_unlock(&dev->dev); in pci_dev_unlock()
3406 pci_cfg_access_unlock(dev); in pci_dev_unlock()
3418 static void pci_reset_notify(struct pci_dev *dev, bool prepare) in pci_reset_notify() argument
3421 dev->driver ? dev->driver->err_handler : NULL; in pci_reset_notify()
3423 err_handler->reset_notify(dev, prepare); in pci_reset_notify()
3426 static void pci_dev_save_and_disable(struct pci_dev *dev) in pci_dev_save_and_disable() argument
3428 pci_reset_notify(dev, true); in pci_dev_save_and_disable()
3435 pci_set_power_state(dev, PCI_D0); in pci_dev_save_and_disable()
3437 pci_save_state(dev); in pci_dev_save_and_disable()
3445 pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE); in pci_dev_save_and_disable()
3448 static void pci_dev_restore(struct pci_dev *dev) in pci_dev_restore() argument
3450 pci_restore_state(dev); in pci_dev_restore()
3451 pci_reset_notify(dev, false); in pci_dev_restore()
3454 static int pci_dev_reset(struct pci_dev *dev, int probe) in pci_dev_reset() argument
3459 pci_dev_lock(dev); in pci_dev_reset()
3461 rc = __pci_dev_reset(dev, probe); in pci_dev_reset()
3464 pci_dev_unlock(dev); in pci_dev_reset()
3486 int __pci_reset_function(struct pci_dev *dev) in __pci_reset_function() argument
3488 return pci_dev_reset(dev, 0); in __pci_reset_function()
3511 int __pci_reset_function_locked(struct pci_dev *dev) in __pci_reset_function_locked() argument
3513 return __pci_dev_reset(dev, 0); in __pci_reset_function_locked()
3528 int pci_probe_reset_function(struct pci_dev *dev) in pci_probe_reset_function() argument
3530 return pci_dev_reset(dev, 1); in pci_probe_reset_function()
3549 int pci_reset_function(struct pci_dev *dev) in pci_reset_function() argument
3553 rc = pci_dev_reset(dev, 1); in pci_reset_function()
3557 pci_dev_save_and_disable(dev); in pci_reset_function()
3559 rc = pci_dev_reset(dev, 0); in pci_reset_function()
3561 pci_dev_restore(dev); in pci_reset_function()
3573 int pci_try_reset_function(struct pci_dev *dev) in pci_try_reset_function() argument
3577 rc = pci_dev_reset(dev, 1); in pci_try_reset_function()
3581 pci_dev_save_and_disable(dev); in pci_try_reset_function()
3583 if (pci_dev_trylock(dev)) { in pci_try_reset_function()
3584 rc = __pci_dev_reset(dev, 0); in pci_try_reset_function()
3585 pci_dev_unlock(dev); in pci_try_reset_function()
3589 pci_dev_restore(dev); in pci_try_reset_function()
3598 struct pci_dev *dev; in pci_bus_resetable() local
3600 list_for_each_entry(dev, &bus->devices, bus_list) { in pci_bus_resetable()
3601 if (dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET || in pci_bus_resetable()
3602 (dev->subordinate && !pci_bus_resetable(dev->subordinate))) in pci_bus_resetable()
3612 struct pci_dev *dev; in pci_bus_lock() local
3614 list_for_each_entry(dev, &bus->devices, bus_list) { in pci_bus_lock()
3615 pci_dev_lock(dev); in pci_bus_lock()
3616 if (dev->subordinate) in pci_bus_lock()
3617 pci_bus_lock(dev->subordinate); in pci_bus_lock()
3624 struct pci_dev *dev; in pci_bus_unlock() local
3626 list_for_each_entry(dev, &bus->devices, bus_list) { in pci_bus_unlock()
3627 if (dev->subordinate) in pci_bus_unlock()
3628 pci_bus_unlock(dev->subordinate); in pci_bus_unlock()
3629 pci_dev_unlock(dev); in pci_bus_unlock()
3636 struct pci_dev *dev; in pci_bus_trylock() local
3638 list_for_each_entry(dev, &bus->devices, bus_list) { in pci_bus_trylock()
3639 if (!pci_dev_trylock(dev)) in pci_bus_trylock()
3641 if (dev->subordinate) { in pci_bus_trylock()
3642 if (!pci_bus_trylock(dev->subordinate)) { in pci_bus_trylock()
3643 pci_dev_unlock(dev); in pci_bus_trylock()
3651 list_for_each_entry_continue_reverse(dev, &bus->devices, bus_list) { in pci_bus_trylock()
3652 if (dev->subordinate) in pci_bus_trylock()
3653 pci_bus_unlock(dev->subordinate); in pci_bus_trylock()
3654 pci_dev_unlock(dev); in pci_bus_trylock()
3662 struct pci_dev *dev; in pci_slot_resetable() local
3664 list_for_each_entry(dev, &slot->bus->devices, bus_list) { in pci_slot_resetable()
3665 if (!dev->slot || dev->slot != slot) in pci_slot_resetable()
3667 if (dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET || in pci_slot_resetable()
3668 (dev->subordinate && !pci_bus_resetable(dev->subordinate))) in pci_slot_resetable()
3678 struct pci_dev *dev; in pci_slot_lock() local
3680 list_for_each_entry(dev, &slot->bus->devices, bus_list) { in pci_slot_lock()
3681 if (!dev->slot || dev->slot != slot) in pci_slot_lock()
3683 pci_dev_lock(dev); in pci_slot_lock()
3684 if (dev->subordinate) in pci_slot_lock()
3685 pci_bus_lock(dev->subordinate); in pci_slot_lock()
3692 struct pci_dev *dev; in pci_slot_unlock() local
3694 list_for_each_entry(dev, &slot->bus->devices, bus_list) { in pci_slot_unlock()
3695 if (!dev->slot || dev->slot != slot) in pci_slot_unlock()
3697 if (dev->subordinate) in pci_slot_unlock()
3698 pci_bus_unlock(dev->subordinate); in pci_slot_unlock()
3699 pci_dev_unlock(dev); in pci_slot_unlock()
3706 struct pci_dev *dev; in pci_slot_trylock() local
3708 list_for_each_entry(dev, &slot->bus->devices, bus_list) { in pci_slot_trylock()
3709 if (!dev->slot || dev->slot != slot) in pci_slot_trylock()
3711 if (!pci_dev_trylock(dev)) in pci_slot_trylock()
3713 if (dev->subordinate) { in pci_slot_trylock()
3714 if (!pci_bus_trylock(dev->subordinate)) { in pci_slot_trylock()
3715 pci_dev_unlock(dev); in pci_slot_trylock()
3723 list_for_each_entry_continue_reverse(dev, in pci_slot_trylock()
3725 if (!dev->slot || dev->slot != slot) in pci_slot_trylock()
3727 if (dev->subordinate) in pci_slot_trylock()
3728 pci_bus_unlock(dev->subordinate); in pci_slot_trylock()
3729 pci_dev_unlock(dev); in pci_slot_trylock()
3737 struct pci_dev *dev; in pci_bus_save_and_disable() local
3739 list_for_each_entry(dev, &bus->devices, bus_list) { in pci_bus_save_and_disable()
3740 pci_dev_save_and_disable(dev); in pci_bus_save_and_disable()
3741 if (dev->subordinate) in pci_bus_save_and_disable()
3742 pci_bus_save_and_disable(dev->subordinate); in pci_bus_save_and_disable()
3752 struct pci_dev *dev; in pci_bus_restore() local
3754 list_for_each_entry(dev, &bus->devices, bus_list) { in pci_bus_restore()
3755 pci_dev_restore(dev); in pci_bus_restore()
3756 if (dev->subordinate) in pci_bus_restore()
3757 pci_bus_restore(dev->subordinate); in pci_bus_restore()
3764 struct pci_dev *dev; in pci_slot_save_and_disable() local
3766 list_for_each_entry(dev, &slot->bus->devices, bus_list) { in pci_slot_save_and_disable()
3767 if (!dev->slot || dev->slot != slot) in pci_slot_save_and_disable()
3769 pci_dev_save_and_disable(dev); in pci_slot_save_and_disable()
3770 if (dev->subordinate) in pci_slot_save_and_disable()
3771 pci_bus_save_and_disable(dev->subordinate); in pci_slot_save_and_disable()
3781 struct pci_dev *dev; in pci_slot_restore() local
3783 list_for_each_entry(dev, &slot->bus->devices, bus_list) { in pci_slot_restore()
3784 if (!dev->slot || dev->slot != slot) in pci_slot_restore()
3786 pci_dev_restore(dev); in pci_slot_restore()
3787 if (dev->subordinate) in pci_slot_restore()
3788 pci_bus_restore(dev->subordinate); in pci_slot_restore()
3980 int pcix_get_max_mmrbc(struct pci_dev *dev) in pcix_get_max_mmrbc() argument
3985 cap = pci_find_capability(dev, PCI_CAP_ID_PCIX); in pcix_get_max_mmrbc()
3989 if (pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat)) in pcix_get_max_mmrbc()
4003 int pcix_get_mmrbc(struct pci_dev *dev) in pcix_get_mmrbc() argument
4008 cap = pci_find_capability(dev, PCI_CAP_ID_PCIX); in pcix_get_mmrbc()
4012 if (pci_read_config_word(dev, cap + PCI_X_CMD, &cmd)) in pcix_get_mmrbc()
4028 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc) in pcix_set_mmrbc() argument
4039 cap = pci_find_capability(dev, PCI_CAP_ID_PCIX); in pcix_set_mmrbc()
4043 if (pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat)) in pcix_set_mmrbc()
4049 if (pci_read_config_word(dev, cap + PCI_X_CMD, &cmd)) in pcix_set_mmrbc()
4054 if (v > o && (dev->bus->bus_flags & PCI_BUS_FLAGS_NO_MMRBC)) in pcix_set_mmrbc()
4059 if (pci_write_config_word(dev, cap + PCI_X_CMD, cmd)) in pcix_set_mmrbc()
4073 int pcie_get_readrq(struct pci_dev *dev) in pcie_get_readrq() argument
4077 pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &ctl); in pcie_get_readrq()
4091 int pcie_set_readrq(struct pci_dev *dev, int rq) in pcie_set_readrq() argument
4105 int mps = pcie_get_mps(dev); in pcie_set_readrq()
4113 return pcie_capability_clear_and_set_word(dev, PCI_EXP_DEVCTL, in pcie_set_readrq()
4124 int pcie_get_mps(struct pci_dev *dev) in pcie_get_mps() argument
4128 pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &ctl); in pcie_get_mps()
4142 int pcie_set_mps(struct pci_dev *dev, int mps) in pcie_set_mps() argument
4150 if (v > dev->pcie_mpss) in pcie_set_mps()
4154 return pcie_capability_clear_and_set_word(dev, PCI_EXP_DEVCTL, in pcie_set_mps()
4168 int pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed, in pcie_get_minimum_link() argument
4176 while (dev) { in pcie_get_minimum_link()
4181 ret = pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &lnksta); in pcie_get_minimum_link()
4195 dev = dev->bus->self; in pcie_get_minimum_link()
4209 int pci_select_bars(struct pci_dev *dev, unsigned long flags) in pci_select_bars() argument
4213 if (pci_resource_flags(dev, i) & flags) in pci_select_bars()
4227 int pci_resource_bar(struct pci_dev *dev, int resno, enum pci_bar_type *type) in pci_resource_bar() argument
4236 return dev->rom_base_reg; in pci_resource_bar()
4240 reg = pci_iov_resource_bar(dev, resno); in pci_resource_bar()
4245 dev_err(&dev->dev, "BAR %d: invalid resource\n", resno); in pci_resource_bar()
4257 static int pci_set_vga_state_arch(struct pci_dev *dev, bool decode, in pci_set_vga_state_arch() argument
4261 return arch_set_vga_state(dev, decode, command_bits, in pci_set_vga_state_arch()
4274 int pci_set_vga_state(struct pci_dev *dev, bool decode, in pci_set_vga_state() argument
4285 rc = pci_set_vga_state_arch(dev, decode, command_bits, flags); in pci_set_vga_state()
4290 pci_read_config_word(dev, PCI_COMMAND, &cmd); in pci_set_vga_state()
4295 pci_write_config_word(dev, PCI_COMMAND, cmd); in pci_set_vga_state()
4301 bus = dev->bus; in pci_set_vga_state()
4327 void pci_ignore_hotplug(struct pci_dev *dev) in pci_ignore_hotplug() argument
4329 struct pci_dev *bridge = dev->bus->self; in pci_ignore_hotplug()
4331 dev->ignore_hotplug = 1; in pci_ignore_hotplug()
4349 static resource_size_t pci_specified_resource_alignment(struct pci_dev *dev) in pci_specified_resource_alignment() argument
4377 if (seg == pci_domain_nr(dev->bus) && in pci_specified_resource_alignment()
4378 bus == dev->bus->number && in pci_specified_resource_alignment()
4379 slot == PCI_SLOT(dev->devfn) && in pci_specified_resource_alignment()
4380 func == PCI_FUNC(dev->devfn)) { in pci_specified_resource_alignment()
4405 void pci_reassigndev_resource_alignment(struct pci_dev *dev) in pci_reassigndev_resource_alignment() argument
4413 align = pci_specified_resource_alignment(dev); in pci_reassigndev_resource_alignment()
4417 if (dev->hdr_type == PCI_HEADER_TYPE_NORMAL && in pci_reassigndev_resource_alignment()
4418 (dev->class >> 8) == PCI_CLASS_BRIDGE_HOST) { in pci_reassigndev_resource_alignment()
4419 dev_warn(&dev->dev, in pci_reassigndev_resource_alignment()
4424 dev_info(&dev->dev, in pci_reassigndev_resource_alignment()
4426 pci_read_config_word(dev, PCI_COMMAND, &command); in pci_reassigndev_resource_alignment()
4428 pci_write_config_word(dev, PCI_COMMAND, command); in pci_reassigndev_resource_alignment()
4431 r = &dev->resource[i]; in pci_reassigndev_resource_alignment()
4437 dev_info(&dev->dev, in pci_reassigndev_resource_alignment()
4449 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE && in pci_reassigndev_resource_alignment()
4450 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { in pci_reassigndev_resource_alignment()
4452 r = &dev->resource[i]; in pci_reassigndev_resource_alignment()
4459 pci_disable_bridge_window(dev); in pci_reassigndev_resource_alignment()