1010 	u32 reg32;  in set_pcie_hotplug_bridge()  local
1012 	pcie_capability_read_dword(pdev, PCI_EXP_SLTCAP, &reg32);  in set_pcie_hotplug_bridge()
1013 	if (reg32 & PCI_EXP_SLTCAP_HPC)  in set_pcie_hotplug_bridge()
1327 	u32 reg32;  in program_hpp_type2()  local
1363 	pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, &reg32);  in program_hpp_type2()
1364 	reg32 = (reg32 & hpp->unc_err_mask_and) | hpp->unc_err_mask_or;  in program_hpp_type2()
1365 	pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, reg32);  in program_hpp_type2()
1368 	pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &reg32);  in program_hpp_type2()
1369 	reg32 = (reg32 & hpp->unc_err_sever_and) | hpp->unc_err_sever_or;  in program_hpp_type2()
1370 	pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, reg32);  in program_hpp_type2()
1373 	pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK, &reg32);  in program_hpp_type2()
1374 	reg32 = (reg32 & hpp->cor_err_mask_and) | hpp->cor_err_mask_or;  in program_hpp_type2()
1375 	pci_write_config_dword(dev, pos + PCI_ERR_COR_MASK, reg32);  in program_hpp_type2()
1378 	pci_read_config_dword(dev, pos + PCI_ERR_CAP, &reg32);  in program_hpp_type2()
1379 	reg32 = (reg32 & hpp->adv_err_cap_and) | hpp->adv_err_cap_or;  in program_hpp_type2()
1380 	pci_write_config_dword(dev, pos + PCI_ERR_CAP, reg32);  in program_hpp_type2()