92 	u32 val = 0;  in exynos_sata_phy_init()  local
102 	writel(val, sata_phy->regs + EXYNOS5_SATA_RESET);  in exynos_sata_phy_init()
104 	val = readl(sata_phy->regs + EXYNOS5_SATA_RESET);  in exynos_sata_phy_init()
105 	val |= RESET_GLOBAL_RST_N | RESET_CMN_RST_N | RESET_CMN_BLOCK_RST_N  in exynos_sata_phy_init()
108 	writel(val, sata_phy->regs + EXYNOS5_SATA_RESET);  in exynos_sata_phy_init()
110 	val = readl(sata_phy->regs + EXYNOS5_SATA_RESET);  in exynos_sata_phy_init()
111 	val |= LINK_RESET;  in exynos_sata_phy_init()
112 	writel(val, sata_phy->regs + EXYNOS5_SATA_RESET);  in exynos_sata_phy_init()
114 	val = readl(sata_phy->regs + EXYNOS5_SATA_RESET);  in exynos_sata_phy_init()
115 	val |= RESET_CMN_RST_N;  in exynos_sata_phy_init()
116 	writel(val, sata_phy->regs + EXYNOS5_SATA_RESET);  in exynos_sata_phy_init()
118 	val = readl(sata_phy->regs + EXYNOS5_SATA_PHSATA_CTRLM);  in exynos_sata_phy_init()
119 	val &= ~PHCTRLM_REF_RATE;  in exynos_sata_phy_init()
120 	writel(val, sata_phy->regs + EXYNOS5_SATA_PHSATA_CTRLM);  in exynos_sata_phy_init()
123 	val = readl(sata_phy->regs + EXYNOS5_SATA_PHSATA_CTRLM);  in exynos_sata_phy_init()
124 	val |= PHCTRLM_HIGH_SPEED;  in exynos_sata_phy_init()
125 	writel(val, sata_phy->regs + EXYNOS5_SATA_PHSATA_CTRLM);  in exynos_sata_phy_init()
127 	val = readl(sata_phy->regs + EXYNOS5_SATA_CTRL0);  in exynos_sata_phy_init()
128 	val |= CTRL0_P0_PHY_CALIBRATED_SEL | CTRL0_P0_PHY_CALIBRATED;  in exynos_sata_phy_init()
129 	writel(val, sata_phy->regs + EXYNOS5_SATA_CTRL0);  in exynos_sata_phy_init()
131 	val = readl(sata_phy->regs + EXYNOS5_SATA_MODE0);  in exynos_sata_phy_init()
132 	val |= SATA_SPD_GEN3;  in exynos_sata_phy_init()
133 	writel(val, sata_phy->regs + EXYNOS5_SATA_MODE0);  in exynos_sata_phy_init()
140 	val = readl(sata_phy->regs + EXYNOS5_SATA_RESET);  in exynos_sata_phy_init()
141 	val &= ~RESET_CMN_RST_N;  in exynos_sata_phy_init()
142 	writel(val, sata_phy->regs + EXYNOS5_SATA_RESET);  in exynos_sata_phy_init()
144 	val = readl(sata_phy->regs + EXYNOS5_SATA_RESET);  in exynos_sata_phy_init()
145 	val |= RESET_CMN_RST_N;  in exynos_sata_phy_init()
146 	writel(val, sata_phy->regs + EXYNOS5_SATA_RESET);  in exynos_sata_phy_init()