368 static inline void miphy28lp_set_reset(struct miphy28lp_phy *miphy_phy)  in miphy28lp_set_reset()  argument
370 	void *base = miphy_phy->base;  in miphy28lp_set_reset()
382 	if (miphy_phy->type == PHY_TYPE_PCIE) {  in miphy28lp_set_reset()
391 static inline void miphy28lp_pll_calibration(struct miphy28lp_phy *miphy_phy,  in miphy28lp_pll_calibration()  argument
394 	void *base = miphy_phy->base;  in miphy28lp_pll_calibration()
415 	if (miphy_phy->type != PHY_TYPE_SATA)  in miphy28lp_pll_calibration()
420 	if (miphy_phy->type == PHY_TYPE_USB3) {  in miphy28lp_pll_calibration()
433 static inline void miphy28lp_sata_config_gen(struct miphy28lp_phy *miphy_phy)  in miphy28lp_sata_config_gen()  argument
435 	void __iomem *base = miphy_phy->base;  in miphy28lp_sata_config_gen()
460 static inline void miphy28lp_pcie_config_gen(struct miphy28lp_phy *miphy_phy)  in miphy28lp_pcie_config_gen()  argument
462 	void __iomem *base = miphy_phy->base;  in miphy28lp_pcie_config_gen()
489 static inline int miphy28lp_wait_compensation(struct miphy28lp_phy *miphy_phy)  in miphy28lp_wait_compensation()  argument
496 		val = readb_relaxed(miphy_phy->base + MIPHY_COMP_FSM_6);  in miphy28lp_wait_compensation()
507 static inline int miphy28lp_compensation(struct miphy28lp_phy *miphy_phy,  in miphy28lp_compensation()  argument
510 	void __iomem *base = miphy_phy->base;  in miphy28lp_compensation()
520 	if (miphy_phy->type == PHY_TYPE_PCIE)  in miphy28lp_compensation()
530 	if (miphy_phy->type == PHY_TYPE_PCIE)  in miphy28lp_compensation()
531 		return miphy28lp_wait_compensation(miphy_phy);  in miphy28lp_compensation()
536 static inline void miphy28_usb3_miphy_reset(struct miphy28lp_phy *miphy_phy)  in miphy28_usb3_miphy_reset()  argument
538 	void __iomem *base = miphy_phy->base;  in miphy28_usb3_miphy_reset()
564 static void miphy_sata_tune_ssc(struct miphy28lp_phy *miphy_phy)  in miphy_sata_tune_ssc()  argument
566 	void __iomem *base = miphy_phy->base;  in miphy_sata_tune_ssc()
602 static void miphy_pcie_tune_ssc(struct miphy28lp_phy *miphy_phy)  in miphy_pcie_tune_ssc()  argument
604 	void __iomem *base = miphy_phy->base;  in miphy_pcie_tune_ssc()
642 static inline void miphy_tune_tx_impedance(struct miphy28lp_phy *miphy_phy)  in miphy_tune_tx_impedance()  argument
645 	writeb_relaxed(0x02, miphy_phy->base + MIPHY_COMP_POSTP);  in miphy_tune_tx_impedance()
648 static inline int miphy28lp_configure_sata(struct miphy28lp_phy *miphy_phy)  in miphy28lp_configure_sata()  argument
650 	void __iomem *base = miphy_phy->base;  in miphy28lp_configure_sata()
655 	miphy28lp_set_reset(miphy_phy);  in miphy28lp_configure_sata()
658 	miphy28lp_pll_calibration(miphy_phy, &sata_pll_ratio);  in miphy28lp_configure_sata()
661 	miphy28lp_sata_config_gen(miphy_phy);  in miphy28lp_configure_sata()
672 	err = miphy28lp_compensation(miphy_phy, &sata_pll_ratio);  in miphy28lp_configure_sata()
676 	if (miphy_phy->px_rx_pol_inv) {  in miphy28lp_configure_sata()
678 		val = readb_relaxed(miphy_phy->base + MIPHY_CONTROL);  in miphy28lp_configure_sata()
680 		writeb_relaxed(val, miphy_phy->base + MIPHY_CONTROL);  in miphy28lp_configure_sata()
683 	if (miphy_phy->ssc)  in miphy28lp_configure_sata()
684 		miphy_sata_tune_ssc(miphy_phy);  in miphy28lp_configure_sata()
686 	if (miphy_phy->tx_impedance)  in miphy28lp_configure_sata()
687 		miphy_tune_tx_impedance(miphy_phy);  in miphy28lp_configure_sata()
692 static inline int miphy28lp_configure_pcie(struct miphy28lp_phy *miphy_phy)  in miphy28lp_configure_pcie()  argument
694 	void __iomem *base = miphy_phy->base;  in miphy28lp_configure_pcie()
698 	miphy28lp_set_reset(miphy_phy);  in miphy28lp_configure_pcie()
701 	miphy28lp_pll_calibration(miphy_phy, &pcie_pll_ratio);  in miphy28lp_configure_pcie()
704 	miphy28lp_pcie_config_gen(miphy_phy);  in miphy28lp_configure_pcie()
715 	err = miphy28lp_compensation(miphy_phy, &pcie_pll_ratio);  in miphy28lp_configure_pcie()
719 	if (miphy_phy->ssc)  in miphy28lp_configure_pcie()
720 		miphy_pcie_tune_ssc(miphy_phy);  in miphy28lp_configure_pcie()
722 	if (miphy_phy->tx_impedance)  in miphy28lp_configure_pcie()
723 		miphy_tune_tx_impedance(miphy_phy);  in miphy28lp_configure_pcie()
729 static inline void miphy28lp_configure_usb3(struct miphy28lp_phy *miphy_phy)  in miphy28lp_configure_usb3()  argument
731 	void __iomem *base = miphy_phy->base;  in miphy28lp_configure_usb3()
735 	miphy28lp_set_reset(miphy_phy);  in miphy28lp_configure_usb3()
738 	miphy28lp_pll_calibration(miphy_phy, &usb3_pll_ratio);  in miphy28lp_configure_usb3()
807 	miphy28_usb3_miphy_reset(miphy_phy);  in miphy28lp_configure_usb3()
810 static inline int miphy_is_ready(struct miphy28lp_phy *miphy_phy)  in miphy_is_ready()  argument
820 	if (miphy_phy->type == PHY_TYPE_SATA)  in miphy_is_ready()
824 		val = readb_relaxed(miphy_phy->base + MIPHY_STATUS_1);  in miphy_is_ready()
834 static int miphy_osc_is_ready(struct miphy28lp_phy *miphy_phy)  in miphy_osc_is_ready()  argument
836 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy_osc_is_ready()
840 	if (!miphy_phy->osc_rdy)  in miphy_osc_is_ready()
843 	if (!miphy_phy->syscfg_reg[SYSCFG_STATUS])  in miphy_osc_is_ready()
848 				miphy_phy->syscfg_reg[SYSCFG_STATUS], &val);  in miphy_osc_is_ready()
892 static int miphy28lp_setup(struct miphy28lp_phy *miphy_phy, u32 miphy_val)  in miphy28lp_setup()  argument
895 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_setup()
897 	if (!miphy_phy->syscfg_reg[SYSCFG_CTRL])  in miphy28lp_setup()
900 	err = reset_control_assert(miphy_phy->miphy_rst);  in miphy28lp_setup()
906 	if (miphy_phy->osc_force_ext)  in miphy28lp_setup()
910 			   miphy_phy->syscfg_reg[SYSCFG_CTRL],  in miphy28lp_setup()
913 	err = reset_control_deassert(miphy_phy->miphy_rst);  in miphy28lp_setup()
919 	return miphy_osc_is_ready(miphy_phy);  in miphy28lp_setup()
922 static int miphy28lp_init_sata(struct miphy28lp_phy *miphy_phy)  in miphy28lp_init_sata()  argument
924 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_init_sata()
927 	if ((!miphy_phy->syscfg_reg[SYSCFG_SATA]) ||  in miphy28lp_init_sata()
928 			(!miphy_phy->syscfg_reg[SYSCFG_PCI]) ||  in miphy28lp_init_sata()
929 			(!miphy_phy->base))  in miphy28lp_init_sata()
932 	dev_info(miphy_dev->dev, "sata-up mode, addr 0x%p\n", miphy_phy->base);  in miphy28lp_init_sata()
935 	sata_conf |= ((miphy_phy->sata_gen - SATA_GEN1) << SATA_SPDMODE);  in miphy28lp_init_sata()
938 			   miphy_phy->syscfg_reg[SYSCFG_SATA],  in miphy28lp_init_sata()
941 	regmap_update_bits(miphy_dev->regmap, miphy_phy->syscfg_reg[SYSCFG_PCI],  in miphy28lp_init_sata()
945 	err = miphy28lp_setup(miphy_phy, MIPHY_CTRL_DEFAULT);  in miphy28lp_init_sata()
953 	miphy28lp_configure_sata(miphy_phy);  in miphy28lp_init_sata()
955 	return miphy_is_ready(miphy_phy);  in miphy28lp_init_sata()
958 static int miphy28lp_init_pcie(struct miphy28lp_phy *miphy_phy)  in miphy28lp_init_pcie()  argument
960 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_init_pcie()
963 	if ((!miphy_phy->syscfg_reg[SYSCFG_SATA]) ||  in miphy28lp_init_pcie()
964 			(!miphy_phy->syscfg_reg[SYSCFG_PCI])  in miphy28lp_init_pcie()
965 		|| (!miphy_phy->base) || (!miphy_phy->pipebase))  in miphy28lp_init_pcie()
968 	dev_info(miphy_dev->dev, "pcie-up mode, addr 0x%p\n", miphy_phy->base);  in miphy28lp_init_pcie()
972 			   miphy_phy->syscfg_reg[SYSCFG_SATA],  in miphy28lp_init_pcie()
975 	regmap_update_bits(miphy_dev->regmap, miphy_phy->syscfg_reg[SYSCFG_PCI],  in miphy28lp_init_pcie()
979 	err = miphy28lp_setup(miphy_phy, MIPHY_CTRL_DEFAULT);  in miphy28lp_init_pcie()
987 	err = miphy28lp_configure_pcie(miphy_phy);  in miphy28lp_init_pcie()
992 	writeb_relaxed(0x68, miphy_phy->pipebase + 0x104); /* Rise_0 */  in miphy28lp_init_pcie()
993 	writeb_relaxed(0x61, miphy_phy->pipebase + 0x105); /* Rise_1 */  in miphy28lp_init_pcie()
994 	writeb_relaxed(0x68, miphy_phy->pipebase + 0x108); /* Fall_0 */  in miphy28lp_init_pcie()
995 	writeb_relaxed(0x61, miphy_phy->pipebase + 0x109); /* Fall-1 */  in miphy28lp_init_pcie()
996 	writeb_relaxed(0x68, miphy_phy->pipebase + 0x10c); /* Threshold_0 */  in miphy28lp_init_pcie()
997 	writeb_relaxed(0x60, miphy_phy->pipebase + 0x10d); /* Threshold_1 */  in miphy28lp_init_pcie()
1000 	return miphy_is_ready(miphy_phy);  in miphy28lp_init_pcie()
1003 static int miphy28lp_init_usb3(struct miphy28lp_phy *miphy_phy)  in miphy28lp_init_usb3()  argument
1005 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_init_usb3()
1008 	if ((!miphy_phy->base) || (!miphy_phy->pipebase))  in miphy28lp_init_usb3()
1011 	dev_info(miphy_dev->dev, "usb3-up mode, addr 0x%p\n", miphy_phy->base);  in miphy28lp_init_usb3()
1014 	err = miphy28lp_setup(miphy_phy, MIPHY_CTRL_SYNC_D_EN);  in miphy28lp_init_usb3()
1021 	miphy28lp_configure_usb3(miphy_phy);  in miphy28lp_init_usb3()
1024 	writeb_relaxed(0x68, miphy_phy->pipebase + 0x23);  in miphy28lp_init_usb3()
1025 	writeb_relaxed(0x61, miphy_phy->pipebase + 0x24);  in miphy28lp_init_usb3()
1026 	writeb_relaxed(0x68, miphy_phy->pipebase + 0x26);  in miphy28lp_init_usb3()
1027 	writeb_relaxed(0x61, miphy_phy->pipebase + 0x27);  in miphy28lp_init_usb3()
1028 	writeb_relaxed(0x18, miphy_phy->pipebase + 0x29);  in miphy28lp_init_usb3()
1029 	writeb_relaxed(0x61, miphy_phy->pipebase + 0x2a);  in miphy28lp_init_usb3()
1032 	writeb_relaxed(0X67, miphy_phy->pipebase + 0x68);  in miphy28lp_init_usb3()
1033 	writeb_relaxed(0x0d, miphy_phy->pipebase + 0x69);  in miphy28lp_init_usb3()
1034 	writeb_relaxed(0X67, miphy_phy->pipebase + 0x6a);  in miphy28lp_init_usb3()
1035 	writeb_relaxed(0X0d, miphy_phy->pipebase + 0x6b);  in miphy28lp_init_usb3()
1036 	writeb_relaxed(0X67, miphy_phy->pipebase + 0x6c);  in miphy28lp_init_usb3()
1037 	writeb_relaxed(0X0d, miphy_phy->pipebase + 0x6d);  in miphy28lp_init_usb3()
1038 	writeb_relaxed(0X67, miphy_phy->pipebase + 0x6e);  in miphy28lp_init_usb3()
1039 	writeb_relaxed(0X0d, miphy_phy->pipebase + 0x6f);  in miphy28lp_init_usb3()
1041 	return miphy_is_ready(miphy_phy);  in miphy28lp_init_usb3()
1046 	struct miphy28lp_phy *miphy_phy = phy_get_drvdata(phy);  in miphy28lp_init()  local
1047 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_init()
1052 	switch (miphy_phy->type) {  in miphy28lp_init()
1055 		ret = miphy28lp_init_sata(miphy_phy);  in miphy28lp_init()
1058 		ret = miphy28lp_init_pcie(miphy_phy);  in miphy28lp_init()
1061 		ret = miphy28lp_init_usb3(miphy_phy);  in miphy28lp_init()
1073 static int miphy28lp_get_addr(struct miphy28lp_phy *miphy_phy)  in miphy28lp_get_addr()  argument
1075 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_get_addr()
1076 	struct device_node *phynode = miphy_phy->phy->dev.of_node;  in miphy28lp_get_addr()
1079 	if ((miphy_phy->type != PHY_TYPE_SATA) &&  in miphy28lp_get_addr()
1080 	    (miphy_phy->type != PHY_TYPE_PCIE) &&  in miphy28lp_get_addr()
1081 	    (miphy_phy->type != PHY_TYPE_USB3)) {  in miphy28lp_get_addr()
1086 			PHY_TYPE_name[miphy_phy->type - PHY_TYPE_SATA],  in miphy28lp_get_addr()
1087 			&miphy_phy->base);  in miphy28lp_get_addr()
1091 	if ((miphy_phy->type == PHY_TYPE_PCIE) ||  in miphy28lp_get_addr()
1092 	    (miphy_phy->type == PHY_TYPE_USB3)) {  in miphy28lp_get_addr()
1094 					     &miphy_phy->pipebase);  in miphy28lp_get_addr()
1106 	struct miphy28lp_phy *miphy_phy = NULL;  in miphy28lp_xlate()  local
1122 			miphy_phy = miphy_dev->phys[index];  in miphy28lp_xlate()
1126 	if (!miphy_phy) {  in miphy28lp_xlate()
1131 	miphy_phy->type = args->args[0];  in miphy28lp_xlate()
1133 	ret = miphy28lp_get_addr(miphy_phy);  in miphy28lp_xlate()
1137 	return miphy_phy->phy;  in miphy28lp_xlate()
1146 				  struct miphy28lp_phy *miphy_phy)  in miphy28lp_probe_resets()  argument
1148 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_probe_resets()
1151 	miphy_phy->miphy_rst = of_reset_control_get(node, "miphy-sw-rst");  in miphy28lp_probe_resets()
1153 	if (IS_ERR(miphy_phy->miphy_rst)) {  in miphy28lp_probe_resets()
1156 		return PTR_ERR(miphy_phy->miphy_rst);  in miphy28lp_probe_resets()
1159 	err = reset_control_deassert(miphy_phy->miphy_rst);  in miphy28lp_probe_resets()
1169 			      struct miphy28lp_phy *miphy_phy)  in miphy28lp_of_probe()  argument
1174 	miphy_phy->osc_force_ext =  in miphy28lp_of_probe()
1177 	miphy_phy->osc_rdy = of_property_read_bool(np, "st,osc-rdy");  in miphy28lp_of_probe()
1179 	miphy_phy->px_rx_pol_inv =  in miphy28lp_of_probe()
1182 	miphy_phy->ssc = of_property_read_bool(np, "st,ssc-on");  in miphy28lp_of_probe()
1184 	miphy_phy->tx_impedance =  in miphy28lp_of_probe()
1187 	of_property_read_u32(np, "st,sata-gen", &miphy_phy->sata_gen);  in miphy28lp_of_probe()
1188 	if (!miphy_phy->sata_gen)  in miphy28lp_of_probe()
1189 		miphy_phy->sata_gen = SATA_GEN1;  in miphy28lp_of_probe()
1193 			miphy_phy->syscfg_reg[i] = ctrlreg;  in miphy28lp_of_probe()
1230 		struct miphy28lp_phy *miphy_phy;  in miphy28lp_probe()  local
1232 		miphy_phy = devm_kzalloc(&pdev->dev, sizeof(*miphy_phy),  in miphy28lp_probe()
1234 		if (!miphy_phy)  in miphy28lp_probe()
1237 		miphy_dev->phys[port] = miphy_phy;  in miphy28lp_probe()
1248 		ret = miphy28lp_of_probe(child, miphy_phy);  in miphy28lp_probe()