93 #define U300_PIN_REG(pin, reg) \  macro
242 	return readl(U300_PIN_REG(offset, dir)) & U300_PIN_BIT(offset);  in u300_gpio_get()
253 	val = readl(U300_PIN_REG(offset, dor));  in u300_gpio_set()
255 		writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, dor));  in u300_gpio_set()
257 		writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, dor));  in u300_gpio_set()
269 	val = readl(U300_PIN_REG(offset, pcr));  in u300_gpio_direction_input()
272 	writel(val, U300_PIN_REG(offset, pcr));  in u300_gpio_direction_input()
286 	val = readl(U300_PIN_REG(offset, pcr));  in u300_gpio_direction_output()
299 		writel(val, U300_PIN_REG(offset, pcr));  in u300_gpio_direction_output()
317 	biasmode = !!(readl(U300_PIN_REG(offset, per)) & U300_PIN_BIT(offset));  in u300_gpio_config_get()
320 	drmode = readl(U300_PIN_REG(offset, pcr));  in u300_gpio_config_get()
377 		val = readl(U300_PIN_REG(offset, per));  in u300_gpio_config_set()
378 		writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, per));  in u300_gpio_config_set()
381 		val = readl(U300_PIN_REG(offset, per));  in u300_gpio_config_set()
382 		writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, per));  in u300_gpio_config_set()
385 		val = readl(U300_PIN_REG(offset, pcr));  in u300_gpio_config_set()
390 		writel(val, U300_PIN_REG(offset, pcr));  in u300_gpio_config_set()
393 		val = readl(U300_PIN_REG(offset, pcr));  in u300_gpio_config_set()
398 		writel(val, U300_PIN_REG(offset, pcr));  in u300_gpio_config_set()
401 		val = readl(U300_PIN_REG(offset, pcr));  in u300_gpio_config_set()
406 		writel(val, U300_PIN_REG(offset, pcr));  in u300_gpio_config_set()
432 	val = readl(U300_PIN_REG(offset, icr));  in u300_toggle_trigger()
436 		writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, icr));  in u300_toggle_trigger()
441 		writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, icr));  in u300_toggle_trigger()
470 		val = readl(U300_PIN_REG(offset, icr));  in u300_gpio_irq_type()
471 		writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, icr));  in u300_gpio_irq_type()
476 		val = readl(U300_PIN_REG(offset, icr));  in u300_gpio_irq_type()
477 		writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, icr));  in u300_gpio_irq_type()
496 	val = readl(U300_PIN_REG(offset, ien));  in u300_gpio_irq_enable()
497 	writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, ien));  in u300_gpio_irq_enable()
510 	val = readl(U300_PIN_REG(offset, ien));  in u300_gpio_irq_disable()
511 	writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, ien));  in u300_gpio_irq_disable()
534 	val = readl(U300_PIN_REG(pinoffset, iev));  in u300_gpio_irq_handler()
538 	writel(val, U300_PIN_REG(pinoffset, iev));  in u300_gpio_irq_handler()