Lines Matching refs:bank
163 void (*pull_calc_reg)(struct rockchip_pin_bank *bank,
381 static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin) in rockchip_get_mux() argument
383 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_mux()
393 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) { in rockchip_get_mux()
398 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) in rockchip_get_mux()
401 regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rockchip_get_mux()
405 mask = (bank->iomux[iomux_num].type & IOMUX_WIDTH_4BIT) ? 0xf : 0x3; in rockchip_get_mux()
406 reg = bank->iomux[iomux_num].offset; in rockchip_get_mux()
407 if (bank->iomux[iomux_num].type & IOMUX_WIDTH_4BIT) { in rockchip_get_mux()
435 static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux) in rockchip_set_mux() argument
437 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_mux()
448 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) { in rockchip_set_mux()
453 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) { in rockchip_set_mux()
464 bank->bank_num, pin, mux); in rockchip_set_mux()
466 regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rockchip_set_mux()
470 mask = (bank->iomux[iomux_num].type & IOMUX_WIDTH_4BIT) ? 0xf : 0x3; in rockchip_set_mux()
471 reg = bank->iomux[iomux_num].offset; in rockchip_set_mux()
472 if (bank->iomux[iomux_num].type & IOMUX_WIDTH_4BIT) { in rockchip_set_mux()
480 spin_lock_irqsave(&bank->slock, flags); in rockchip_set_mux()
487 spin_unlock_irqrestore(&bank->slock, flags); in rockchip_set_mux()
496 static void rk2928_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, in rk2928_calc_pull_reg_and_bit() argument
500 struct rockchip_pinctrl *info = bank->drvdata; in rk2928_calc_pull_reg_and_bit()
504 *reg += bank->bank_num * RK2928_PULL_BANK_STRIDE; in rk2928_calc_pull_reg_and_bit()
516 static void rk3188_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, in rk3188_calc_pull_reg_and_bit() argument
520 struct rockchip_pinctrl *info = bank->drvdata; in rk3188_calc_pull_reg_and_bit()
523 if (bank->bank_num == 0 && pin_num < 12) { in rk3188_calc_pull_reg_and_bit()
525 : bank->regmap_pull; in rk3188_calc_pull_reg_and_bit()
537 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3188_calc_pull_reg_and_bit()
551 static void rk3288_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, in rk3288_calc_pull_reg_and_bit() argument
555 struct rockchip_pinctrl *info = bank->drvdata; in rk3288_calc_pull_reg_and_bit()
558 if (bank->bank_num == 0) { in rk3288_calc_pull_reg_and_bit()
571 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3288_calc_pull_reg_and_bit()
586 static void rk3288_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, in rk3288_calc_drv_reg_and_bit() argument
590 struct rockchip_pinctrl *info = bank->drvdata; in rk3288_calc_drv_reg_and_bit()
593 if (bank->bank_num == 0) { in rk3288_calc_drv_reg_and_bit()
606 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; in rk3288_calc_drv_reg_and_bit()
614 static int rk3288_get_drive(struct rockchip_pin_bank *bank, int pin_num) in rk3288_get_drive() argument
621 rk3288_calc_drv_reg_and_bit(bank, pin_num, ®map, ®, &bit); in rk3288_get_drive()
633 static int rk3288_set_drive(struct rockchip_pin_bank *bank, int pin_num, in rk3288_set_drive() argument
636 struct rockchip_pinctrl *info = bank->drvdata; in rk3288_set_drive()
643 rk3288_calc_drv_reg_and_bit(bank, pin_num, ®map, ®, &bit); in rk3288_set_drive()
659 spin_lock_irqsave(&bank->slock, flags); in rk3288_set_drive()
667 spin_unlock_irqrestore(&bank->slock, flags); in rk3288_set_drive()
672 static int rockchip_get_pull(struct rockchip_pin_bank *bank, int pin_num) in rockchip_get_pull() argument
674 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_pull()
685 ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_get_pull()
720 static int rockchip_set_pull(struct rockchip_pin_bank *bank, in rockchip_set_pull() argument
723 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_pull()
732 bank->bank_num, pin_num, pull); in rockchip_set_pull()
738 ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_set_pull()
742 spin_lock_irqsave(&bank->slock, flags); in rockchip_set_pull()
749 spin_unlock_irqrestore(&bank->slock, flags); in rockchip_set_pull()
753 spin_lock_irqsave(&bank->slock, flags); in rockchip_set_pull()
772 spin_unlock_irqrestore(&bank->slock, flags); in rockchip_set_pull()
780 spin_unlock_irqrestore(&bank->slock, flags); in rockchip_set_pull()
827 struct rockchip_pin_bank *bank; in rockchip_pmx_set() local
838 bank = pin_to_bank(info, pins[cnt]); in rockchip_pmx_set()
839 ret = rockchip_set_mux(bank, pins[cnt] - bank->pin_base, in rockchip_pmx_set()
848 rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0); in rockchip_pmx_set()
864 struct rockchip_pin_bank *bank; in _rockchip_pmx_gpio_set_direction() local
869 bank = gc_to_pin_bank(chip); in _rockchip_pmx_gpio_set_direction()
871 ret = rockchip_set_mux(bank, pin, RK_FUNC_GPIO); in _rockchip_pmx_gpio_set_direction()
875 spin_lock_irqsave(&bank->slock, flags); in _rockchip_pmx_gpio_set_direction()
877 data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR); in _rockchip_pmx_gpio_set_direction()
883 writel_relaxed(data, bank->reg_base + GPIO_SWPORT_DDR); in _rockchip_pmx_gpio_set_direction()
885 spin_unlock_irqrestore(&bank->slock, flags); in _rockchip_pmx_gpio_set_direction()
944 struct rockchip_pin_bank *bank = pin_to_bank(info, pin); in rockchip_pinconf_set() local
956 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
971 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
977 rockchip_gpio_set(&bank->gpio_chip, in rockchip_pinconf_set()
978 pin - bank->pin_base, arg); in rockchip_pinconf_set()
979 rc = _rockchip_pmx_gpio_set_direction(&bank->gpio_chip, in rockchip_pinconf_set()
980 pin - bank->pin_base, false); in rockchip_pinconf_set()
989 rc = rk3288_set_drive(bank, pin - bank->pin_base, arg); in rockchip_pinconf_set()
1007 struct rockchip_pin_bank *bank = pin_to_bank(info, pin); in rockchip_pinconf_get() local
1014 if (rockchip_get_pull(bank, pin - bank->pin_base) != param) in rockchip_pinconf_get()
1026 if (rockchip_get_pull(bank, pin - bank->pin_base) != param) in rockchip_pinconf_get()
1032 rc = rockchip_get_mux(bank, pin - bank->pin_base); in rockchip_pinconf_get()
1036 rc = rockchip_gpio_get(&bank->gpio_chip, pin - bank->pin_base); in rockchip_pinconf_get()
1047 rc = rk3288_get_drive(bank, pin - bank->pin_base); in rockchip_pinconf_get()
1094 struct rockchip_pin_bank *bank; in rockchip_pinctrl_parse_groups() local
1133 bank = bank_num_to_bank(info, num); in rockchip_pinctrl_parse_groups()
1134 if (IS_ERR(bank)) in rockchip_pinctrl_parse_groups()
1135 return PTR_ERR(bank); in rockchip_pinctrl_parse_groups()
1137 grp->pins[j] = bank->pin_base + be32_to_cpu(*list++); in rockchip_pinctrl_parse_groups()
1243 int pin, bank, ret; in rockchip_pinctrl_register() local
1262 for (bank = 0 , k = 0; bank < info->ctrl->nr_banks; bank++) { in rockchip_pinctrl_register()
1263 pin_bank = &info->ctrl->pin_banks[bank]; in rockchip_pinctrl_register()
1282 for (bank = 0; bank < info->ctrl->nr_banks; ++bank) { in rockchip_pinctrl_register()
1283 pin_bank = &info->ctrl->pin_banks[bank]; in rockchip_pinctrl_register()
1285 pin_bank->grange.id = bank; in rockchip_pinctrl_register()
1312 struct rockchip_pin_bank *bank = gc_to_pin_bank(gc); in rockchip_gpio_set() local
1313 void __iomem *reg = bank->reg_base + GPIO_SWPORT_DR; in rockchip_gpio_set()
1317 spin_lock_irqsave(&bank->slock, flags); in rockchip_gpio_set()
1325 spin_unlock_irqrestore(&bank->slock, flags); in rockchip_gpio_set()
1334 struct rockchip_pin_bank *bank = gc_to_pin_bank(gc); in rockchip_gpio_get() local
1337 data = readl(bank->reg_base + GPIO_EXT_PORT); in rockchip_gpio_get()
1371 struct rockchip_pin_bank *bank = gc_to_pin_bank(gc); in rockchip_gpio_to_irq() local
1374 if (!bank->domain) in rockchip_gpio_to_irq()
1377 virq = irq_create_mapping(bank->domain, offset); in rockchip_gpio_to_irq()
1400 struct rockchip_pin_bank *bank = irq_get_handler_data(irq); in rockchip_irq_demux() local
1403 dev_dbg(bank->drvdata->dev, "got irq for bank %s\n", bank->name); in rockchip_irq_demux()
1407 pend = readl_relaxed(bank->reg_base + GPIO_INT_STATUS); in rockchip_irq_demux()
1414 virq = irq_linear_revmap(bank->domain, irq); in rockchip_irq_demux()
1417 dev_err(bank->drvdata->dev, "unmapped irq %d\n", irq); in rockchip_irq_demux()
1421 dev_dbg(bank->drvdata->dev, "handling irq %d\n", irq); in rockchip_irq_demux()
1427 if (bank->toggle_edge_mode & BIT(irq)) { in rockchip_irq_demux()
1431 data = readl_relaxed(bank->reg_base + GPIO_EXT_PORT); in rockchip_irq_demux()
1433 spin_lock_irqsave(&bank->slock, flags); in rockchip_irq_demux()
1435 polarity = readl_relaxed(bank->reg_base + in rockchip_irq_demux()
1442 bank->reg_base + GPIO_INT_POLARITY); in rockchip_irq_demux()
1444 spin_unlock_irqrestore(&bank->slock, flags); in rockchip_irq_demux()
1447 data = readl_relaxed(bank->reg_base + in rockchip_irq_demux()
1461 struct rockchip_pin_bank *bank = gc->private; in rockchip_irq_set_type() local
1470 ret = rockchip_set_mux(bank, d->hwirq, RK_FUNC_GPIO); in rockchip_irq_set_type()
1474 spin_lock_irqsave(&bank->slock, flags); in rockchip_irq_set_type()
1476 data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR); in rockchip_irq_set_type()
1478 writel_relaxed(data, bank->reg_base + GPIO_SWPORT_DDR); in rockchip_irq_set_type()
1480 spin_unlock_irqrestore(&bank->slock, flags); in rockchip_irq_set_type()
1487 spin_lock_irqsave(&bank->slock, flags); in rockchip_irq_set_type()
1495 bank->toggle_edge_mode |= mask; in rockchip_irq_set_type()
1502 data = readl(bank->reg_base + GPIO_EXT_PORT); in rockchip_irq_set_type()
1509 bank->toggle_edge_mode &= ~mask; in rockchip_irq_set_type()
1514 bank->toggle_edge_mode &= ~mask; in rockchip_irq_set_type()
1519 bank->toggle_edge_mode &= ~mask; in rockchip_irq_set_type()
1524 bank->toggle_edge_mode &= ~mask; in rockchip_irq_set_type()
1530 spin_unlock_irqrestore(&bank->slock, flags); in rockchip_irq_set_type()
1538 spin_unlock_irqrestore(&bank->slock, flags); in rockchip_irq_set_type()
1546 struct rockchip_pin_bank *bank = gc->private; in rockchip_irq_suspend() local
1548 bank->saved_masks = irq_reg_readl(gc, GPIO_INTMASK); in rockchip_irq_suspend()
1555 struct rockchip_pin_bank *bank = gc->private; in rockchip_irq_resume() local
1557 irq_reg_writel(gc, bank->saved_masks, GPIO_INTMASK); in rockchip_irq_resume()
1564 struct rockchip_pin_bank *bank = ctrl->pin_banks; in rockchip_interrupts_register() local
1570 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { in rockchip_interrupts_register()
1571 if (!bank->valid) { in rockchip_interrupts_register()
1573 bank->name); in rockchip_interrupts_register()
1577 bank->domain = irq_domain_add_linear(bank->of_node, 32, in rockchip_interrupts_register()
1579 if (!bank->domain) { in rockchip_interrupts_register()
1581 bank->name); in rockchip_interrupts_register()
1585 ret = irq_alloc_domain_generic_chips(bank->domain, 32, 1, in rockchip_interrupts_register()
1590 bank->name); in rockchip_interrupts_register()
1591 irq_domain_remove(bank->domain); in rockchip_interrupts_register()
1600 writel_relaxed(0xffffffff, bank->reg_base + GPIO_INTMASK); in rockchip_interrupts_register()
1601 writel_relaxed(0xffffffff, bank->reg_base + GPIO_INTEN); in rockchip_interrupts_register()
1603 gc = irq_get_domain_generic_chip(bank->domain, 0); in rockchip_interrupts_register()
1604 gc->reg_base = bank->reg_base; in rockchip_interrupts_register()
1605 gc->private = bank; in rockchip_interrupts_register()
1615 gc->wake_enabled = IRQ_MSK(bank->nr_pins); in rockchip_interrupts_register()
1617 irq_set_handler_data(bank->irq, bank); in rockchip_interrupts_register()
1618 irq_set_chained_handler(bank->irq, rockchip_irq_demux); in rockchip_interrupts_register()
1628 struct rockchip_pin_bank *bank = ctrl->pin_banks; in rockchip_gpiolib_register() local
1633 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { in rockchip_gpiolib_register()
1634 if (!bank->valid) { in rockchip_gpiolib_register()
1636 bank->name); in rockchip_gpiolib_register()
1640 bank->gpio_chip = rockchip_gpiolib_chip; in rockchip_gpiolib_register()
1642 gc = &bank->gpio_chip; in rockchip_gpiolib_register()
1643 gc->base = bank->pin_base; in rockchip_gpiolib_register()
1644 gc->ngpio = bank->nr_pins; in rockchip_gpiolib_register()
1646 gc->of_node = bank->of_node; in rockchip_gpiolib_register()
1647 gc->label = bank->name; in rockchip_gpiolib_register()
1662 for (--i, --bank; i >= 0; --i, --bank) { in rockchip_gpiolib_register()
1663 if (!bank->valid) in rockchip_gpiolib_register()
1665 gpiochip_remove(&bank->gpio_chip); in rockchip_gpiolib_register()
1674 struct rockchip_pin_bank *bank = ctrl->pin_banks; in rockchip_gpiolib_unregister() local
1677 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { in rockchip_gpiolib_unregister()
1678 if (!bank->valid) in rockchip_gpiolib_unregister()
1680 gpiochip_remove(&bank->gpio_chip); in rockchip_gpiolib_unregister()
1686 static int rockchip_get_bank_data(struct rockchip_pin_bank *bank, in rockchip_get_bank_data() argument
1692 if (of_address_to_resource(bank->of_node, 0, &res)) { in rockchip_get_bank_data()
1697 bank->reg_base = devm_ioremap_resource(info->dev, &res); in rockchip_get_bank_data()
1698 if (IS_ERR(bank->reg_base)) in rockchip_get_bank_data()
1699 return PTR_ERR(bank->reg_base); in rockchip_get_bank_data()
1705 if (of_device_is_compatible(bank->of_node, in rockchip_get_bank_data()
1709 node = of_parse_phandle(bank->of_node->parent, in rockchip_get_bank_data()
1712 if (of_address_to_resource(bank->of_node, 1, &res)) { in rockchip_get_bank_data()
1724 bank->regmap_pull = devm_regmap_init_mmio(info->dev, in rockchip_get_bank_data()
1730 bank->irq = irq_of_parse_and_map(bank->of_node, 0); in rockchip_get_bank_data()
1732 bank->clk = of_clk_get(bank->of_node, 0); in rockchip_get_bank_data()
1733 if (IS_ERR(bank->clk)) in rockchip_get_bank_data()
1734 return PTR_ERR(bank->clk); in rockchip_get_bank_data()
1736 return clk_prepare_enable(bank->clk); in rockchip_get_bank_data()
1750 struct rockchip_pin_bank *bank; in rockchip_pinctrl_get_soc_data() local
1760 bank = ctrl->pin_banks; in rockchip_pinctrl_get_soc_data()
1761 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { in rockchip_pinctrl_get_soc_data()
1762 if (!strcmp(bank->name, np->name)) { in rockchip_pinctrl_get_soc_data()
1763 bank->of_node = np; in rockchip_pinctrl_get_soc_data()
1765 if (!rockchip_get_bank_data(bank, d)) in rockchip_pinctrl_get_soc_data()
1766 bank->valid = true; in rockchip_pinctrl_get_soc_data()
1775 bank = ctrl->pin_banks; in rockchip_pinctrl_get_soc_data()
1776 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { in rockchip_pinctrl_get_soc_data()
1779 spin_lock_init(&bank->slock); in rockchip_pinctrl_get_soc_data()
1780 bank->drvdata = d; in rockchip_pinctrl_get_soc_data()
1781 bank->pin_base = ctrl->nr_pins; in rockchip_pinctrl_get_soc_data()
1782 ctrl->nr_pins += bank->nr_pins; in rockchip_pinctrl_get_soc_data()
1786 struct rockchip_iomux *iom = &bank->iomux[j]; in rockchip_pinctrl_get_soc_data()
1789 if (bank_pins >= bank->nr_pins) in rockchip_pinctrl_get_soc_data()