Lines Matching refs:virq
387 static int s3c64xx_gpio_irq_map(struct irq_domain *h, unsigned int virq, in s3c64xx_gpio_irq_map() argument
395 irq_set_chip_and_handler(virq, in s3c64xx_gpio_irq_map()
397 irq_set_chip_data(virq, bank); in s3c64xx_gpio_irq_map()
398 set_irq_flags(virq, IRQF_VALID); in s3c64xx_gpio_irq_map()
423 unsigned int virq; in s3c64xx_eint_gpio_irq() local
440 virq = irq_linear_revmap(data->domains[group], pin); in s3c64xx_eint_gpio_irq()
445 BUG_ON(!virq); in s3c64xx_eint_gpio_irq()
447 generic_handle_irq(virq); in s3c64xx_eint_gpio_irq()
620 unsigned int virq; in s3c64xx_irq_demux_eint() local
625 virq = irq_linear_revmap(data->domains[irq], data->pins[irq]); in s3c64xx_irq_demux_eint()
630 BUG_ON(!virq); in s3c64xx_irq_demux_eint()
632 generic_handle_irq(virq); in s3c64xx_irq_demux_eint()
665 static int s3c64xx_eint0_irq_map(struct irq_domain *h, unsigned int virq, in s3c64xx_eint0_irq_map() argument
674 irq_set_chip_and_handler(virq, in s3c64xx_eint0_irq_map()
676 irq_set_chip_data(virq, ddata); in s3c64xx_eint0_irq_map()
677 set_irq_flags(virq, IRQF_VALID); in s3c64xx_eint0_irq_map()