315 			val = readl(pctl->membase + sunxi_dlevel_reg(pin));  in sunxi_pconf_group_set()
319 				pctl->membase + sunxi_dlevel_reg(pin));  in sunxi_pconf_group_set()
322 			val = readl(pctl->membase + sunxi_pull_reg(pin));  in sunxi_pconf_group_set()
325 				pctl->membase + sunxi_pull_reg(pin));  in sunxi_pconf_group_set()
328 			val = readl(pctl->membase + sunxi_pull_reg(pin));  in sunxi_pconf_group_set()
331 				pctl->membase + sunxi_pull_reg(pin));  in sunxi_pconf_group_set()
389 	val = readl(pctl->membase + sunxi_mux_reg(pin));  in sunxi_pmx_set()
392 		pctl->membase + sunxi_mux_reg(pin));  in sunxi_pmx_set()
477 	val = (readl(pctl->membase + reg) >> index) & DATA_PINS_MASK;  in sunxi_pinctrl_gpio_get()
496 	regval = readl(pctl->membase + reg);  in sunxi_pinctrl_gpio_set()
503 	writel(regval, pctl->membase + reg);  in sunxi_pinctrl_gpio_set()
628 	regval = readl(pctl->membase + reg);  in sunxi_pinctrl_irq_set_type()
630 	writel(regval | (mode << index), pctl->membase + reg);  in sunxi_pinctrl_irq_set_type()
644 	writel(1 << status_idx, pctl->membase + status_reg);  in sunxi_pinctrl_irq_ack()
658 	val = readl(pctl->membase + reg);  in sunxi_pinctrl_irq_mask()
659 	writel(val & ~(1 << idx), pctl->membase + reg);  in sunxi_pinctrl_irq_mask()
675 	val = readl(pctl->membase + reg);  in sunxi_pinctrl_irq_unmask()
676 	writel(val | (1 << idx), pctl->membase + reg);  in sunxi_pinctrl_irq_unmask()
726 	val = readl(pctl->membase + reg);  in sunxi_pinctrl_irq_handler()
869 	pctl->membase = devm_ioremap_resource(&pdev->dev, res);  in sunxi_pinctrl_init()
870 	if (IS_ERR(pctl->membase))  in sunxi_pinctrl_init()
871 		return PTR_ERR(pctl->membase);  in sunxi_pinctrl_init()
1004 		writel(0, pctl->membase + sunxi_irq_ctrl_reg_from_bank(i));  in sunxi_pinctrl_init()
1006 			pctl->membase + sunxi_irq_status_reg_from_bank(i));  in sunxi_pinctrl_init()