Lines Matching refs:TSI721_DEV_CHAN_INTE

512 			ch_inte = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_irqhandler()
514 			iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_irqhandler()
528 			ch_inte = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_irqhandler()
530 			iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_irqhandler()
600 	iowrite32(intr,	priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_interrupts_init()
1195 	rval = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_interrupt_enable()
1197 		  priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_interrupt_enable()
1226 	rval = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_interrupt_disable()
1228 	iowrite32(rval, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_interrupt_disable()
1256 	rval = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_interrupt_enable()
1258 		  priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_interrupt_enable()
1287 	rval = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_interrupt_disable()
1289 	iowrite32(rval, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_interrupt_disable()
1474 		ch_inte = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_handler()
1476 		iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_handler()
1764 		ch_inte = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_handler()
1766 		iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_handler()
2167 	iowrite32(0, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_disable_ints()