87 	iowrite32(data, priv->regs + offset);  in tsi721_lcwrite()
137 	iowrite32(rd_count + 2,	regs + TSI721_DMAC_DWRCNT);  in tsi721_maint_dma()
164 		iowrite32(TSI721_DMAC_INT_ALL, regs + TSI721_DMAC_INT);  in tsi721_maint_dma()
165 		iowrite32(TSI721_DMAC_CTL_INIT, regs + TSI721_DMAC_CTL);  in tsi721_maint_dma()
167 		iowrite32(0, regs + TSI721_DMAC_DWRCNT);  in tsi721_maint_dma()
184 	iowrite32(swr_ptr, regs + TSI721_DMAC_DSRP);  in tsi721_maint_dma()
274 	iowrite32(TSI721_RIO_PW_RX_STAT_PW_DISC | TSI721_RIO_PW_RX_STAT_PW_VAL,  in tsi721_pw_handler()
331 	iowrite32(TSI721_RIO_PW_RX_STAT_PW_DISC | TSI721_RIO_PW_RX_STAT_PW_VAL,  in tsi721_pw_enable()
334 	iowrite32(rval, priv->regs + TSI721_RIO_EM_INT_ENABLE);  in tsi721_pw_enable()
381 	iowrite32(regval,  in tsi721_dbell_handler()
443 	iowrite32(rd_ptr & (IDB_QSIZE - 1),  in tsi721_db_dpc()
449 	iowrite32(regval,  in tsi721_db_dpc()
476 		iowrite32(0, priv->regs + TSI721_DEV_INTE);  in tsi721_irqhandler()
497 			iowrite32(intval,  in tsi721_irqhandler()
514 			iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_irqhandler()
530 			iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_irqhandler()
572 		iowrite32(dev_int, priv->regs + TSI721_DEV_INTE);  in tsi721_irqhandler()
583 	iowrite32(TSI721_SR_CHINT_ALL,  in tsi721_interrupts_init()
585 	iowrite32(TSI721_SR_CHINT_IDBQRCV,  in tsi721_interrupts_init()
589 	iowrite32(TSI721_RIO_EM_DEV_INT_EN_INT,  in tsi721_interrupts_init()
600 	iowrite32(intr,	priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_interrupts_init()
608 	iowrite32(intr, priv->regs + TSI721_DEV_INTE);  in tsi721_interrupts_init()
687 	iowrite32(sr_ch_int, priv->regs + TSI721_SR_CHINT(IDB_QUEUE));  in tsi721_sr2pc_ch_msix()
868 		iowrite32(0, priv->regs + TSI721_OBWINLB(i));  in tsi721_init_pc2sr_mapping()
908 	iowrite32(TSI721_IBWIN_SIZE(size) << 8,  in tsi721_rio_map_inb_mem()
911 	iowrite32(((u64)lstart >> 32), priv->regs + TSI721_IBWIN_TUA(i));  in tsi721_rio_map_inb_mem()
912 	iowrite32(((u64)lstart & TSI721_IBWIN_TLA_ADD),  in tsi721_rio_map_inb_mem()
915 	iowrite32(rstart >> 32, priv->regs + TSI721_IBWIN_UB(i));  in tsi721_rio_map_inb_mem()
916 	iowrite32((rstart & TSI721_IBWIN_LB_BA) | TSI721_IBWIN_LB_WEN,  in tsi721_rio_map_inb_mem()
948 				iowrite32(0, priv->regs + TSI721_IBWIN_LB(i));  in tsi721_rio_unmap_inb_mem()
968 		iowrite32(0, priv->regs + TSI721_IBWIN_LB(i));  in tsi721_init_sr2pc_mapping()
990 	iowrite32(TSI721_RIO_PW_CTL_PWC_REL, priv->regs + TSI721_RIO_PW_CTL);  in tsi721_port_write_init()
1015 	iowrite32(TSI721_IDQ_SIZE_VAL(IDB_QSIZE),  in tsi721_doorbell_init()
1017 	iowrite32(((u64)priv->idb_dma >> 32),  in tsi721_doorbell_init()
1019 	iowrite32(((u64)priv->idb_dma & TSI721_IDQ_BASEL_ADDR),  in tsi721_doorbell_init()
1022 	iowrite32(0, priv->regs + TSI721_IDQ_MASK(IDB_QUEUE));  in tsi721_doorbell_init()
1024 	iowrite32(TSI721_IDQ_INIT, priv->regs + TSI721_IDQ_CTL(IDB_QUEUE));  in tsi721_doorbell_init()
1026 	iowrite32(0, priv->regs + TSI721_IDQ_RP(IDB_QUEUE));  in tsi721_doorbell_init()
1115 	iowrite32(((u64)bd_phys >> 32),	regs + TSI721_DMAC_DPTRH);  in tsi721_bdma_maint_init()
1116 	iowrite32(((u64)bd_phys & TSI721_DMAC_DPTRL_MASK),  in tsi721_bdma_maint_init()
1120 	iowrite32(((u64)sts_phys >> 32), regs + TSI721_DMAC_DSBH);  in tsi721_bdma_maint_init()
1121 	iowrite32(((u64)sts_phys & TSI721_DMAC_DSBL_MASK),  in tsi721_bdma_maint_init()
1123 	iowrite32(TSI721_DMAC_DSSZ_SIZE(sts_size),  in tsi721_bdma_maint_init()
1127 	iowrite32(TSI721_DMAC_INT_ALL, regs + TSI721_DMAC_INT);  in tsi721_bdma_maint_init()
1132 	iowrite32(TSI721_DMAC_CTL_INIT,	regs + TSI721_DMAC_CTL);  in tsi721_bdma_maint_init()
1154 	iowrite32(TSI721_DMAC_CTL_INIT,	regs + TSI721_DMAC_CTL);  in tsi721_bdma_maint_free()
1181 	iowrite32(inte_mask, priv->regs + TSI721_IBDMAC_INT(ch));  in tsi721_imsg_interrupt_enable()
1185 	iowrite32(rval | inte_mask, priv->regs + TSI721_IBDMAC_INTE(ch));  in tsi721_imsg_interrupt_enable()
1196 	iowrite32(rval | TSI721_INT_IMSG_CHAN(ch),  in tsi721_imsg_interrupt_enable()
1211 	iowrite32(inte_mask, priv->regs + TSI721_IBDMAC_INT(ch));  in tsi721_imsg_interrupt_disable()
1216 	iowrite32(rval, priv->regs + TSI721_IBDMAC_INTE(ch));  in tsi721_imsg_interrupt_disable()
1228 	iowrite32(rval, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_interrupt_disable()
1242 	iowrite32(inte_mask, priv->regs + TSI721_OBDMAC_INT(ch));  in tsi721_omsg_interrupt_enable()
1246 	iowrite32(rval | inte_mask, priv->regs + TSI721_OBDMAC_INTE(ch));  in tsi721_omsg_interrupt_enable()
1257 	iowrite32(rval | TSI721_INT_OMSG_CHAN(ch),  in tsi721_omsg_interrupt_enable()
1272 	iowrite32(inte_mask, priv->regs + TSI721_OBDMAC_INT(ch));  in tsi721_omsg_interrupt_disable()
1277 	iowrite32(rval, priv->regs + TSI721_OBDMAC_INTE(ch));  in tsi721_omsg_interrupt_disable()
1289 	iowrite32(rval, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_interrupt_disable()
1347 	iowrite32(priv->omsg_ring[mbox].wr_count,  in tsi721_add_outb_message()
1403 		iowrite32(srd_ptr, priv->regs + TSI721_OBDMAC_DSRP(ch));  in tsi721_omsg_handler()
1448 		iowrite32(TSI721_OBDMAC_INT_ERROR,  in tsi721_omsg_handler()
1450 		iowrite32(TSI721_OBDMAC_CTL_INIT,  in tsi721_omsg_handler()
1460 		iowrite32(priv->omsg_ring[ch].tx_slot,  in tsi721_omsg_handler()
1468 	iowrite32(omsg_int, priv->regs + TSI721_OBDMAC_INT(ch));  in tsi721_omsg_handler()
1476 		iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_handler()
1559 	iowrite32(((u64)priv->omsg_ring[mbox].omd_phys >> 32),  in tsi721_open_outb_mbox()
1561 	iowrite32(((u64)priv->omsg_ring[mbox].omd_phys &  in tsi721_open_outb_mbox()
1566 	iowrite32(((u64)priv->omsg_ring[mbox].sts_phys >> 32),  in tsi721_open_outb_mbox()
1568 	iowrite32(((u64)priv->omsg_ring[mbox].sts_phys &  in tsi721_open_outb_mbox()
1571 	iowrite32(TSI721_DMAC_DSSZ_SIZE(priv->omsg_ring[mbox].sts_size),  in tsi721_open_outb_mbox()
1624 	iowrite32(TSI721_OBDMAC_CTL_INIT, priv->regs + TSI721_OBDMAC_CTL(mbox));  in tsi721_open_outb_mbox()
1752 	iowrite32(imsg_int, priv->regs + TSI721_IBDMAC_INT(ch));  in tsi721_imsg_handler()
1766 		iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_handler()
1862 		iowrite32((u32)priv->mport->host_deviceid,  in tsi721_open_inb_mbox()
1872 	iowrite32(((u64)priv->imsg_ring[mbox].imfq_phys >> 32),  in tsi721_open_inb_mbox()
1874 	iowrite32(((u64)priv->imsg_ring[mbox].imfq_phys &  in tsi721_open_inb_mbox()
1877 	iowrite32(TSI721_DMAC_DSSZ_SIZE(entries),  in tsi721_open_inb_mbox()
1881 	iowrite32(((u64)priv->imsg_ring[mbox].imd_phys >> 32),  in tsi721_open_inb_mbox()
1883 	iowrite32(((u32)priv->imsg_ring[mbox].imd_phys &  in tsi721_open_inb_mbox()
1886 	iowrite32(TSI721_DMAC_DSSZ_SIZE(entries),  in tsi721_open_inb_mbox()
1926 	iowrite32(TSI721_IBDMAC_CTL_INIT, priv->regs + TSI721_IBDMAC_CTL(ch));  in tsi721_open_inb_mbox()
1930 	iowrite32(entries - 1, priv->regs + TSI721_IBDMAC_FQWP(ch));  in tsi721_open_inb_mbox()
2105 	iowrite32(priv->imsg_ring[mbox].desc_rdptr,  in tsi721_get_inb_message()
2115 	iowrite32(priv->imsg_ring[mbox].fq_wrptr,  in tsi721_get_inb_message()
2131 	iowrite32(0, priv->regs + TSI721_SMSG_ECC_LOG);  in tsi721_messages_init()
2132 	iowrite32(0, priv->regs + TSI721_RETRY_GEN_CNT);  in tsi721_messages_init()
2133 	iowrite32(0, priv->regs + TSI721_RETRY_RX_CNT);  in tsi721_messages_init()
2136 	iowrite32(TSI721_RQRPTO_VAL, priv->regs + TSI721_RQRPTO);  in tsi721_messages_init()
2141 		iowrite32(TSI721_IBDMAC_INT_MASK,  in tsi721_messages_init()
2144 		iowrite32(0, priv->regs + TSI721_IBDMAC_STS(ch));  in tsi721_messages_init()
2146 		iowrite32(TSI721_SMSG_ECC_COR_LOG_MASK,  in tsi721_messages_init()
2148 		iowrite32(TSI721_SMSG_ECC_NCOR_MASK,  in tsi721_messages_init()
2164 	iowrite32(0, priv->regs + TSI721_DEV_INTE);  in tsi721_disable_ints()
2167 	iowrite32(0, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_disable_ints()
2171 		iowrite32(0, priv->regs + TSI721_IBDMAC_INTE(ch));  in tsi721_disable_ints()
2175 		iowrite32(0, priv->regs + TSI721_OBDMAC_INTE(ch));  in tsi721_disable_ints()
2178 	iowrite32(0, priv->regs + TSI721_SMSG_INTE);  in tsi721_disable_ints()
2182 		iowrite32(0,  in tsi721_disable_ints()
2186 	iowrite32(0, priv->regs + TSI721_BDMA_INTE);  in tsi721_disable_ints()
2190 		iowrite32(0, priv->regs + TSI721_SR_CHINTE(ch));  in tsi721_disable_ints()
2193 	iowrite32(0, priv->regs + TSI721_SR2PC_GEN_INTE);  in tsi721_disable_ints()
2196 	iowrite32(0, priv->regs + TSI721_PC2SR_INTE);  in tsi721_disable_ints()
2199 	iowrite32(0, priv->regs + TSI721_I2C_INT_ENABLE);  in tsi721_disable_ints()
2202 	iowrite32(0, priv->regs + TSI721_RIO_EM_INT_ENABLE);  in tsi721_disable_ints()
2203 	iowrite32(0, priv->regs + TSI721_RIO_EM_DEV_INT_EN);  in tsi721_disable_ints()
2292 	iowrite32(ioread32(priv->regs + TSI721_DEVCTL) |  in tsi721_setup_mport()
2299 		iowrite32(RIO_PORT_GEN_HOST | RIO_PORT_GEN_MASTER |  in tsi721_setup_mport()
2303 		iowrite32(0, priv->regs + (0x100 + RIO_PORT_GEN_CTL_CSR));  in tsi721_setup_mport()