751 	volatile u32 int_reg;  in ipr_mask_and_clear_interrupts()  local
772 	int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);  in ipr_mask_and_clear_interrupts()
5306 	u32 ioasc, int_reg;  in ipr_cancel_op()  local
5329 	int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);  in ipr_cancel_op()
5436 					      u32 int_reg)  in ipr_handle_other_interrupt()  argument
5442 	int_reg &= ~int_mask_reg;  in ipr_handle_other_interrupt()
5447 	if ((int_reg & IPR_PCII_OPER_INTERRUPTS) == 0) {  in ipr_handle_other_interrupt()
5450 			int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;  in ipr_handle_other_interrupt()
5451 			if (int_reg & IPR_PCII_IPL_STAGE_CHANGE) {  in ipr_handle_other_interrupt()
5455 				int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;  in ipr_handle_other_interrupt()
5466 	if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {  in ipr_handle_other_interrupt()
5469 		int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);  in ipr_handle_other_interrupt()
5474 	} else if ((int_reg & IPR_PCII_HRRQ_UPDATED) == int_reg) {  in ipr_handle_other_interrupt()
5478 					"Spurious interrupt detected. 0x%08X\n", int_reg);  in ipr_handle_other_interrupt()
5480 			int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);  in ipr_handle_other_interrupt()
5484 		if (int_reg & IPR_PCII_IOA_UNIT_CHECKED)  in ipr_handle_other_interrupt()
5486 		else if (int_reg & IPR_PCII_NO_HOST_RRQ)  in ipr_handle_other_interrupt()
5488 				"No Host RRQ. 0x%08X\n", int_reg);  in ipr_handle_other_interrupt()
5491 				"Permanent IOA failure. 0x%08X\n", int_reg);  in ipr_handle_other_interrupt()
5612 	u32 int_reg = 0;  in ipr_isr()  local
5638 				int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);  in ipr_isr()
5639 			} while (int_reg & IPR_PCII_HRRQ_UPDATED &&  in ipr_isr()
5643 			int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);  in ipr_isr()
5646 			   int_reg & IPR_PCII_HRRQ_UPDATED) {  in ipr_isr()
5656 		rc = ipr_handle_other_interrupt(ioa_cfg, int_reg);  in ipr_isr()
8027 	volatile u32 int_reg;  in ipr_reset_next_stage()  local
8047 		int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);  in ipr_reset_next_stage()
8051 		int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);  in ipr_reset_next_stage()
8052 		if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {  in ipr_reset_next_stage()
8057 			int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);  in ipr_reset_next_stage()
8086 	volatile u32 int_reg;  in ipr_reset_enable_ioa()  local
8103 		int_reg = readl(ioa_cfg->regs.endian_swap_reg);  in ipr_reset_enable_ioa()
8106 	int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);  in ipr_reset_enable_ioa()
8108 	if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {  in ipr_reset_enable_ioa()
8111 		int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);  in ipr_reset_enable_ioa()
8125 	int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);  in ipr_reset_enable_ioa()
8289 	u32 int_reg;  in ipr_reset_restore_cfg_space()  local
8305 		int_reg = readl(ioa_cfg->regs.endian_swap_reg);  in ipr_reset_restore_cfg_space()
9781 	volatile u32 int_reg;  in ipr_test_msi()  local
9791 	int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);  in ipr_test_msi()
9805 	int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);  in ipr_test_msi()