Lines Matching refs:U32
158 U32 Doorbell; /*0x00 */
159 U32 WriteSequence; /*0x04 */
160 U32 HostDiagnostic; /*0x08 */
161 U32 Reserved1; /*0x0C */
162 U32 DiagRWData; /*0x10 */
163 U32 DiagRWAddressLow; /*0x14 */
164 U32 DiagRWAddressHigh; /*0x18 */
165 U32 Reserved2[5]; /*0x1C */
166 U32 HostInterruptStatus; /*0x30 */
167 U32 HostInterruptMask; /*0x34 */
168 U32 DCRData; /*0x38 */
169 U32 DCRAddress; /*0x3C */
170 U32 Reserved3[2]; /*0x40 */
171 U32 ReplyFreeHostIndex; /*0x48 */
172 U32 Reserved4[8]; /*0x4C */
173 U32 ReplyPostHostIndex; /*0x6C */
174 U32 Reserved5; /*0x70 */
175 U32 HCBSize; /*0x74 */
176 U32 HCBAddressLow; /*0x78 */
177 U32 HCBAddressHigh; /*0x7C */
178 U32 Reserved6[16]; /*0x80 */
179 U32 RequestDescriptorPostLow; /*0xC0 */
180 U32 RequestDescriptorPostHigh; /*0xC4 */
181 U32 Reserved7[14]; /*0xC8 */
414 U32 DescriptorTypeDependent2; /*0x04 */
439 U32 ReplyFrameAddress; /*0x04 */
493 U32 Reserved; /*0x04 */
715 U32 IOCLogInfo; /*0x10 */
730 U32 Word;
752 U32 FlagsLength;
753 U32 Address;
758 U32 FlagsLength;
764 U32 FlagsLength;
766 U32 Address32;
782 U32 Address;
799 U32 Address32;
816 U32 TransactionContext[1];
817 U32 TransactionDetails[1];
828 U32 TransactionContext[2];
829 U32 TransactionDetails[1];
840 U32 TransactionContext[3];
841 U32 TransactionDetails[1];
850 U32 TransactionContext[4];
851 U32 TransactionDetails[1];
861 U32 TransactionContext32[1];
862 U32 TransactionContext64[2];
863 U32 TransactionContext96[3];
864 U32 TransactionContext128[4];
866 U32 TransactionDetails[1];
969 #define MPI2_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_SGE_FLAGS_SHIFT)
1004 U32 Address;
1005 U32 FlagsLength;
1011 U32 Length;
1047 U32 Length;
1113 #define MPI2_IEEE32_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT)