1321 	uint64_t off8, mem_crb, tmpw, word[2] = {0, 0};  in qla82xx_pci_mem_write_2M()  local
1327 		mem_crb = QLA82XX_CRB_QDR_NET;  in qla82xx_pci_mem_write_2M()
1329 		mem_crb = QLA82XX_CRB_DDR_NET;  in qla82xx_pci_mem_write_2M()
1381 		qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_LO, temp);  in qla82xx_pci_mem_write_2M()
1383 		qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_HI, temp);  in qla82xx_pci_mem_write_2M()
1385 		qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_LO, temp);  in qla82xx_pci_mem_write_2M()
1387 		qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_HI, temp);  in qla82xx_pci_mem_write_2M()
1389 		qla82xx_wr_32(ha, mem_crb +  in qla82xx_pci_mem_write_2M()
1392 		qla82xx_wr_32(ha, mem_crb +  in qla82xx_pci_mem_write_2M()
1396 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);  in qla82xx_pci_mem_write_2M()
1398 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);  in qla82xx_pci_mem_write_2M()
1401 			temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL);  in qla82xx_pci_mem_write_2M()
1457 	uint64_t      off8, val, mem_crb, word[2] = {0, 0};  in qla82xx_pci_mem_read_2M()  local
1464 		mem_crb = QLA82XX_CRB_QDR_NET;  in qla82xx_pci_mem_read_2M()
1466 		mem_crb = QLA82XX_CRB_DDR_NET;  in qla82xx_pci_mem_read_2M()
1482 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_LO, temp);  in qla82xx_pci_mem_read_2M()
1484 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_HI, temp);  in qla82xx_pci_mem_read_2M()
1486 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);  in qla82xx_pci_mem_read_2M()
1488 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);  in qla82xx_pci_mem_read_2M()
1491 			temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL);  in qla82xx_pci_mem_read_2M()
1507 					mem_crb + MIU_TEST_AGT_RDDATA(k));  in qla82xx_pci_mem_read_2M()