Lines Matching refs:cr
495 u16 cr = bfin_read(&drv_data->regs->ctl); in bfin_spi_dma_irq_handler() local
498 bfin_write(&drv_data->regs->ctl, cr & ~BIT_CTL_ENABLE); /* Disable SPI */ in bfin_spi_dma_irq_handler()
499 bfin_write(&drv_data->regs->ctl, cr & ~BIT_CTL_TIMOD); /* Restore State */ in bfin_spi_dma_irq_handler()
562 u16 cr, cr_width = 0, dma_width, dma_config; in bfin_spi_pump_transfers() local
653 cr = bfin_read(&drv_data->regs->ctl) & ~(BIT_CTL_TIMOD | BIT_CTL_WORDSIZE); in bfin_spi_pump_transfers()
654 cr |= cr_width; in bfin_spi_pump_transfers()
655 bfin_write(&drv_data->regs->ctl, cr); in bfin_spi_pump_transfers()
720 bfin_write(&drv_data->regs->ctl, cr | BIT_CTL_TIMOD_DMA_TX); in bfin_spi_pump_transfers()
745 cr |= BIT_CTL_TIMOD_DMA_RX | BIT_CTL_SENDOPT; in bfin_spi_pump_transfers()
757 cr |= BIT_CTL_TIMOD_DMA_TX; in bfin_spi_pump_transfers()
775 bfin_write(&drv_data->regs->ctl, cr); in bfin_spi_pump_transfers()
789 bfin_write(&drv_data->regs->ctl, cr | BIT_CTL_TXMOD); in bfin_spi_pump_transfers()
830 "IO duplex: cr is 0x%x\n", cr); in bfin_spi_pump_transfers()
839 "IO write: cr is 0x%x\n", cr); in bfin_spi_pump_transfers()
848 "IO read: cr is 0x%x\n", cr); in bfin_spi_pump_transfers()