Lines Matching refs:espi
123 static void ep93xx_spi_write_u8(const struct ep93xx_spi *espi, in ep93xx_spi_write_u8() argument
126 writeb(value, espi->regs_base + reg); in ep93xx_spi_write_u8()
134 static void ep93xx_spi_write_u16(const struct ep93xx_spi *espi, in ep93xx_spi_write_u16() argument
137 writew(value, espi->regs_base + reg); in ep93xx_spi_write_u16()
145 static int ep93xx_spi_enable(const struct ep93xx_spi *espi) in ep93xx_spi_enable() argument
150 err = clk_enable(espi->clk); in ep93xx_spi_enable()
154 regval = ep93xx_spi_read_u8(espi, SSPCR1); in ep93xx_spi_enable()
156 ep93xx_spi_write_u8(espi, SSPCR1, regval); in ep93xx_spi_enable()
161 static void ep93xx_spi_disable(const struct ep93xx_spi *espi) in ep93xx_spi_disable() argument
165 regval = ep93xx_spi_read_u8(espi, SSPCR1); in ep93xx_spi_disable()
167 ep93xx_spi_write_u8(espi, SSPCR1, regval); in ep93xx_spi_disable()
169 clk_disable(espi->clk); in ep93xx_spi_disable()
172 static void ep93xx_spi_enable_interrupts(const struct ep93xx_spi *espi) in ep93xx_spi_enable_interrupts() argument
176 regval = ep93xx_spi_read_u8(espi, SSPCR1); in ep93xx_spi_enable_interrupts()
178 ep93xx_spi_write_u8(espi, SSPCR1, regval); in ep93xx_spi_enable_interrupts()
181 static void ep93xx_spi_disable_interrupts(const struct ep93xx_spi *espi) in ep93xx_spi_disable_interrupts() argument
185 regval = ep93xx_spi_read_u8(espi, SSPCR1); in ep93xx_spi_disable_interrupts()
187 ep93xx_spi_write_u8(espi, SSPCR1, regval); in ep93xx_spi_disable_interrupts()
197 static int ep93xx_spi_calc_divisors(const struct ep93xx_spi *espi, in ep93xx_spi_calc_divisors() argument
200 struct spi_master *master = platform_get_drvdata(espi->pdev); in ep93xx_spi_calc_divisors()
201 unsigned long spi_clk_rate = clk_get_rate(espi->clk); in ep93xx_spi_calc_divisors()
252 struct ep93xx_spi *espi = spi_master_get_devdata(spi->master); in ep93xx_spi_setup() local
257 dev_dbg(&espi->pdev->dev, "initial setup for %s\n", in ep93xx_spi_setup()
310 static int ep93xx_spi_chip_setup(const struct ep93xx_spi *espi, in ep93xx_spi_chip_setup() argument
320 err = ep93xx_spi_calc_divisors(espi, speed_hz, &div_cpsr, &div_scr); in ep93xx_spi_chip_setup()
328 dev_dbg(&espi->pdev->dev, "setup: mode %d, cpsr %d, scr %d, dss %d\n", in ep93xx_spi_chip_setup()
330 dev_dbg(&espi->pdev->dev, "setup: cr0 %#x\n", cr0); in ep93xx_spi_chip_setup()
332 ep93xx_spi_write_u8(espi, SSPCPSR, div_cpsr); in ep93xx_spi_chip_setup()
333 ep93xx_spi_write_u16(espi, SSPCR0, cr0); in ep93xx_spi_chip_setup()
338 static void ep93xx_do_write(struct ep93xx_spi *espi, struct spi_transfer *t) in ep93xx_do_write() argument
344 tx_val = ((u16 *)t->tx_buf)[espi->tx]; in ep93xx_do_write()
345 ep93xx_spi_write_u16(espi, SSPDR, tx_val); in ep93xx_do_write()
346 espi->tx += sizeof(tx_val); in ep93xx_do_write()
351 tx_val = ((u8 *)t->tx_buf)[espi->tx]; in ep93xx_do_write()
352 ep93xx_spi_write_u8(espi, SSPDR, tx_val); in ep93xx_do_write()
353 espi->tx += sizeof(tx_val); in ep93xx_do_write()
357 static void ep93xx_do_read(struct ep93xx_spi *espi, struct spi_transfer *t) in ep93xx_do_read() argument
362 rx_val = ep93xx_spi_read_u16(espi, SSPDR); in ep93xx_do_read()
364 ((u16 *)t->rx_buf)[espi->rx] = rx_val; in ep93xx_do_read()
365 espi->rx += sizeof(rx_val); in ep93xx_do_read()
369 rx_val = ep93xx_spi_read_u8(espi, SSPDR); in ep93xx_do_read()
371 ((u8 *)t->rx_buf)[espi->rx] = rx_val; in ep93xx_do_read()
372 espi->rx += sizeof(rx_val); in ep93xx_do_read()
387 static int ep93xx_spi_read_write(struct ep93xx_spi *espi) in ep93xx_spi_read_write() argument
389 struct spi_message *msg = espi->current_msg; in ep93xx_spi_read_write()
393 while ((ep93xx_spi_read_u8(espi, SSPSR) & SSPSR_RNE)) { in ep93xx_spi_read_write()
394 ep93xx_do_read(espi, t); in ep93xx_spi_read_write()
395 espi->fifo_level--; in ep93xx_spi_read_write()
399 while (espi->fifo_level < SPI_FIFO_SIZE && espi->tx < t->len) { in ep93xx_spi_read_write()
400 ep93xx_do_write(espi, t); in ep93xx_spi_read_write()
401 espi->fifo_level++; in ep93xx_spi_read_write()
404 if (espi->rx == t->len) in ep93xx_spi_read_write()
410 static void ep93xx_spi_pio_transfer(struct ep93xx_spi *espi) in ep93xx_spi_pio_transfer() argument
416 if (ep93xx_spi_read_write(espi)) { in ep93xx_spi_pio_transfer()
417 ep93xx_spi_enable_interrupts(espi); in ep93xx_spi_pio_transfer()
418 wait_for_completion(&espi->wait); in ep93xx_spi_pio_transfer()
432 ep93xx_spi_dma_prepare(struct ep93xx_spi *espi, enum dma_transfer_direction dir) in ep93xx_spi_dma_prepare() argument
434 struct spi_transfer *t = espi->current_msg->state; in ep93xx_spi_dma_prepare()
454 chan = espi->dma_rx; in ep93xx_spi_dma_prepare()
456 sgt = &espi->rx_sgt; in ep93xx_spi_dma_prepare()
458 conf.src_addr = espi->sspdr_phys; in ep93xx_spi_dma_prepare()
461 chan = espi->dma_tx; in ep93xx_spi_dma_prepare()
463 sgt = &espi->tx_sgt; in ep93xx_spi_dma_prepare()
465 conf.dst_addr = espi->sspdr_phys; in ep93xx_spi_dma_prepare()
500 sg_set_page(sg, virt_to_page(espi->zeropage), in ep93xx_spi_dma_prepare()
509 dev_warn(&espi->pdev->dev, "len = %zu expected 0!\n", len); in ep93xx_spi_dma_prepare()
533 static void ep93xx_spi_dma_finish(struct ep93xx_spi *espi, in ep93xx_spi_dma_finish() argument
540 chan = espi->dma_rx; in ep93xx_spi_dma_finish()
541 sgt = &espi->rx_sgt; in ep93xx_spi_dma_finish()
543 chan = espi->dma_tx; in ep93xx_spi_dma_finish()
544 sgt = &espi->tx_sgt; in ep93xx_spi_dma_finish()
555 static void ep93xx_spi_dma_transfer(struct ep93xx_spi *espi) in ep93xx_spi_dma_transfer() argument
557 struct spi_message *msg = espi->current_msg; in ep93xx_spi_dma_transfer()
560 rxd = ep93xx_spi_dma_prepare(espi, DMA_DEV_TO_MEM); in ep93xx_spi_dma_transfer()
562 dev_err(&espi->pdev->dev, "DMA RX failed: %ld\n", PTR_ERR(rxd)); in ep93xx_spi_dma_transfer()
567 txd = ep93xx_spi_dma_prepare(espi, DMA_MEM_TO_DEV); in ep93xx_spi_dma_transfer()
569 ep93xx_spi_dma_finish(espi, DMA_DEV_TO_MEM); in ep93xx_spi_dma_transfer()
570 dev_err(&espi->pdev->dev, "DMA TX failed: %ld\n", PTR_ERR(rxd)); in ep93xx_spi_dma_transfer()
577 rxd->callback_param = &espi->wait; in ep93xx_spi_dma_transfer()
583 dma_async_issue_pending(espi->dma_rx); in ep93xx_spi_dma_transfer()
584 dma_async_issue_pending(espi->dma_tx); in ep93xx_spi_dma_transfer()
586 wait_for_completion(&espi->wait); in ep93xx_spi_dma_transfer()
588 ep93xx_spi_dma_finish(espi, DMA_MEM_TO_DEV); in ep93xx_spi_dma_transfer()
589 ep93xx_spi_dma_finish(espi, DMA_DEV_TO_MEM); in ep93xx_spi_dma_transfer()
602 static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi, in ep93xx_spi_process_transfer() argument
611 err = ep93xx_spi_chip_setup(espi, chip, t->speed_hz, t->bits_per_word); in ep93xx_spi_process_transfer()
613 dev_err(&espi->pdev->dev, in ep93xx_spi_process_transfer()
619 espi->rx = 0; in ep93xx_spi_process_transfer()
620 espi->tx = 0; in ep93xx_spi_process_transfer()
627 if (espi->dma_rx && t->len > SPI_FIFO_SIZE) in ep93xx_spi_process_transfer()
628 ep93xx_spi_dma_transfer(espi); in ep93xx_spi_process_transfer()
630 ep93xx_spi_pio_transfer(espi); in ep93xx_spi_process_transfer()
675 static void ep93xx_spi_process_message(struct ep93xx_spi *espi, in ep93xx_spi_process_message() argument
685 err = ep93xx_spi_enable(espi); in ep93xx_spi_process_message()
687 dev_err(&espi->pdev->dev, "failed to enable SPI controller\n"); in ep93xx_spi_process_message()
696 while (ep93xx_spi_read_u16(espi, SSPSR) & SSPSR_RNE) { in ep93xx_spi_process_message()
698 dev_warn(&espi->pdev->dev, in ep93xx_spi_process_message()
703 ep93xx_spi_read_u16(espi, SSPDR); in ep93xx_spi_process_message()
710 espi->fifo_level = 0; in ep93xx_spi_process_message()
718 ep93xx_spi_process_transfer(espi, msg, t); in ep93xx_spi_process_message()
728 ep93xx_spi_disable(espi); in ep93xx_spi_process_message()
734 struct ep93xx_spi *espi = spi_master_get_devdata(master); in ep93xx_spi_transfer_one_message() local
740 espi->current_msg = msg; in ep93xx_spi_transfer_one_message()
741 ep93xx_spi_process_message(espi, msg); in ep93xx_spi_transfer_one_message()
742 espi->current_msg = NULL; in ep93xx_spi_transfer_one_message()
751 struct ep93xx_spi *espi = dev_id; in ep93xx_spi_interrupt() local
752 u8 irq_status = ep93xx_spi_read_u8(espi, SSPIIR); in ep93xx_spi_interrupt()
760 ep93xx_spi_write_u8(espi, SSPICR, 0); in ep93xx_spi_interrupt()
761 dev_warn(&espi->pdev->dev, in ep93xx_spi_interrupt()
763 espi->current_msg->status = -EIO; in ep93xx_spi_interrupt()
769 if (ep93xx_spi_read_write(espi)) { in ep93xx_spi_interrupt()
784 ep93xx_spi_disable_interrupts(espi); in ep93xx_spi_interrupt()
785 complete(&espi->wait); in ep93xx_spi_interrupt()
798 static int ep93xx_spi_setup_dma(struct ep93xx_spi *espi) in ep93xx_spi_setup_dma() argument
803 espi->zeropage = (void *)get_zeroed_page(GFP_KERNEL); in ep93xx_spi_setup_dma()
804 if (!espi->zeropage) in ep93xx_spi_setup_dma()
810 espi->dma_rx_data.port = EP93XX_DMA_SSP; in ep93xx_spi_setup_dma()
811 espi->dma_rx_data.direction = DMA_DEV_TO_MEM; in ep93xx_spi_setup_dma()
812 espi->dma_rx_data.name = "ep93xx-spi-rx"; in ep93xx_spi_setup_dma()
814 espi->dma_rx = dma_request_channel(mask, ep93xx_spi_dma_filter, in ep93xx_spi_setup_dma()
815 &espi->dma_rx_data); in ep93xx_spi_setup_dma()
816 if (!espi->dma_rx) { in ep93xx_spi_setup_dma()
821 espi->dma_tx_data.port = EP93XX_DMA_SSP; in ep93xx_spi_setup_dma()
822 espi->dma_tx_data.direction = DMA_MEM_TO_DEV; in ep93xx_spi_setup_dma()
823 espi->dma_tx_data.name = "ep93xx-spi-tx"; in ep93xx_spi_setup_dma()
825 espi->dma_tx = dma_request_channel(mask, ep93xx_spi_dma_filter, in ep93xx_spi_setup_dma()
826 &espi->dma_tx_data); in ep93xx_spi_setup_dma()
827 if (!espi->dma_tx) { in ep93xx_spi_setup_dma()
835 dma_release_channel(espi->dma_rx); in ep93xx_spi_setup_dma()
836 espi->dma_rx = NULL; in ep93xx_spi_setup_dma()
838 free_page((unsigned long)espi->zeropage); in ep93xx_spi_setup_dma()
843 static void ep93xx_spi_release_dma(struct ep93xx_spi *espi) in ep93xx_spi_release_dma() argument
845 if (espi->dma_rx) { in ep93xx_spi_release_dma()
846 dma_release_channel(espi->dma_rx); in ep93xx_spi_release_dma()
847 sg_free_table(&espi->rx_sgt); in ep93xx_spi_release_dma()
849 if (espi->dma_tx) { in ep93xx_spi_release_dma()
850 dma_release_channel(espi->dma_tx); in ep93xx_spi_release_dma()
851 sg_free_table(&espi->tx_sgt); in ep93xx_spi_release_dma()
854 if (espi->zeropage) in ep93xx_spi_release_dma()
855 free_page((unsigned long)espi->zeropage); in ep93xx_spi_release_dma()
862 struct ep93xx_spi *espi; in ep93xx_spi_probe() local
881 master = spi_alloc_master(&pdev->dev, sizeof(*espi)); in ep93xx_spi_probe()
895 espi = spi_master_get_devdata(master); in ep93xx_spi_probe()
897 espi->clk = devm_clk_get(&pdev->dev, NULL); in ep93xx_spi_probe()
898 if (IS_ERR(espi->clk)) { in ep93xx_spi_probe()
900 error = PTR_ERR(espi->clk); in ep93xx_spi_probe()
904 init_completion(&espi->wait); in ep93xx_spi_probe()
910 master->max_speed_hz = clk_get_rate(espi->clk) / 2; in ep93xx_spi_probe()
911 master->min_speed_hz = clk_get_rate(espi->clk) / (254 * 256); in ep93xx_spi_probe()
912 espi->pdev = pdev; in ep93xx_spi_probe()
914 espi->sspdr_phys = res->start + SSPDR; in ep93xx_spi_probe()
916 espi->regs_base = devm_ioremap_resource(&pdev->dev, res); in ep93xx_spi_probe()
917 if (IS_ERR(espi->regs_base)) { in ep93xx_spi_probe()
918 error = PTR_ERR(espi->regs_base); in ep93xx_spi_probe()
923 0, "ep93xx-spi", espi); in ep93xx_spi_probe()
929 if (info->use_dma && ep93xx_spi_setup_dma(espi)) in ep93xx_spi_probe()
933 ep93xx_spi_write_u8(espi, SSPCR1, 0); in ep93xx_spi_probe()
947 ep93xx_spi_release_dma(espi); in ep93xx_spi_probe()
957 struct ep93xx_spi *espi = spi_master_get_devdata(master); in ep93xx_spi_remove() local
959 ep93xx_spi_release_dma(espi); in ep93xx_spi_remove()