103 	mpc8xxx_spi_write_reg(espi_mode, tmp & ~SPMODE_ENABLE);  in fsl_espi_change_mode()
104 	mpc8xxx_spi_write_reg(mode, cs->hw_mode);  in fsl_espi_change_mode()
105 	mpc8xxx_spi_write_reg(espi_mode, tmp);  in fsl_espi_change_mode()
208 	mpc8xxx_spi_write_reg(&reg_base->mask, SPIM_NE);  in fsl_espi_cpu_bufs()
212 	mpc8xxx_spi_write_reg(&reg_base->transmit, word);  in fsl_espi_cpu_bufs()
238 	mpc8xxx_spi_write_reg(&reg_base->command,  in fsl_espi_bufs()
248 	mpc8xxx_spi_write_reg(&reg_base->mask, 0);  in fsl_espi_bufs()
507 	mpc8xxx_spi_write_reg(&reg_base->mode, loop_mode);  in fsl_espi_setup()
572 	mpc8xxx_spi_write_reg(&reg_base->event, events);  in fsl_espi_cpu_irq()
578 		mpc8xxx_spi_write_reg(&reg_base->transmit, word);  in fsl_espi_cpu_irq()
619 	mpc8xxx_spi_write_reg(&reg_base->mode, regval);  in fsl_espi_suspend()
635 	mpc8xxx_spi_write_reg(&reg_base->mode, regval);  in fsl_espi_resume()
692 	mpc8xxx_spi_write_reg(&reg_base->mode, 0);  in fsl_espi_probe()
693 	mpc8xxx_spi_write_reg(&reg_base->mask, 0);  in fsl_espi_probe()
694 	mpc8xxx_spi_write_reg(&reg_base->command, 0);  in fsl_espi_probe()
695 	mpc8xxx_spi_write_reg(&reg_base->event, 0xffffffff);  in fsl_espi_probe()
720 		mpc8xxx_spi_write_reg(&reg_base->csmode[i], csmode);  in fsl_espi_probe()
728 	mpc8xxx_spi_write_reg(&reg_base->mode, regval);  in fsl_espi_probe()
839 	mpc8xxx_spi_write_reg(&reg_base->mode, 0);  in of_fsl_espi_resume()
840 	mpc8xxx_spi_write_reg(&reg_base->mask, 0);  in of_fsl_espi_resume()
841 	mpc8xxx_spi_write_reg(&reg_base->command, 0);  in of_fsl_espi_resume()
842 	mpc8xxx_spi_write_reg(&reg_base->event, 0xffffffff);  in of_fsl_espi_resume()
846 		mpc8xxx_spi_write_reg(&reg_base->csmode[i], CSMODE_INIT_VAL);  in of_fsl_espi_resume()
851 	mpc8xxx_spi_write_reg(&reg_base->mode, regval);  in of_fsl_espi_resume()