491 		u32 regval = readl(sspi->base + SIRFSOC_SPI_CTRL);  in spi_sirfsoc_chipselect()  local
495 				regval |= SIRFSOC_SPI_CS_IO_OUT;  in spi_sirfsoc_chipselect()
497 				regval &= ~SIRFSOC_SPI_CS_IO_OUT;  in spi_sirfsoc_chipselect()
501 				regval &= ~SIRFSOC_SPI_CS_IO_OUT;  in spi_sirfsoc_chipselect()
503 				regval |= SIRFSOC_SPI_CS_IO_OUT;  in spi_sirfsoc_chipselect()
506 		writel(regval, sspi->base + SIRFSOC_SPI_CTRL);  in spi_sirfsoc_chipselect()
527 	u32 regval;  in spi_sirfsoc_setup_transfer()  local
536 	regval = (sspi->ctrl_freq / (2 * hz)) - 1;  in spi_sirfsoc_setup_transfer()
537 	if (regval > 0xFFFF || regval < 0) {  in spi_sirfsoc_setup_transfer()
544 		regval |= SIRFSOC_SPI_TRAN_DAT_FORMAT_8;  in spi_sirfsoc_setup_transfer()
550 		regval |= (bits_per_word ==  12) ?  in spi_sirfsoc_setup_transfer()
557 		regval |= SIRFSOC_SPI_TRAN_DAT_FORMAT_32;  in spi_sirfsoc_setup_transfer()
572 		regval |= SIRFSOC_SPI_CS_IDLE_STAT;  in spi_sirfsoc_setup_transfer()
574 		regval |= SIRFSOC_SPI_TRAN_MSB;  in spi_sirfsoc_setup_transfer()
576 		regval |= SIRFSOC_SPI_CLK_IDLE_STAT;  in spi_sirfsoc_setup_transfer()
584 		regval &= ~SIRFSOC_SPI_DRV_POS_EDGE;  in spi_sirfsoc_setup_transfer()
586 		regval |= SIRFSOC_SPI_DRV_POS_EDGE;  in spi_sirfsoc_setup_transfer()
600 		regval |= (SIRFSOC_SPI_CMD_BYTE_NUM((t->len - 1)) |  in spi_sirfsoc_setup_transfer()
604 		regval &= ~SIRFSOC_SPI_CMD_MODE;  in spi_sirfsoc_setup_transfer()
611 	regval |= SIRFSOC_SPI_CS_IO_MODE;  in spi_sirfsoc_setup_transfer()
612 	writel(regval, sspi->base + SIRFSOC_SPI_CTRL);  in spi_sirfsoc_setup_transfer()