97 	unsigned int val;  in bcm_uart_tx_empty()  local
99 	val = bcm_uart_readl(port, UART_IR_REG);  in bcm_uart_tx_empty()
100 	return (val & UART_IR_STAT(UART_IR_TXEMPTY)) ? 1 : 0;  in bcm_uart_tx_empty()
108 	unsigned int val;  in bcm_uart_set_mctrl()  local
110 	val = bcm_uart_readl(port, UART_MCTL_REG);  in bcm_uart_set_mctrl()
111 	val &= ~(UART_MCTL_DTR_MASK | UART_MCTL_RTS_MASK);  in bcm_uart_set_mctrl()
114 		val |= UART_MCTL_DTR_MASK;  in bcm_uart_set_mctrl()
116 		val |= UART_MCTL_RTS_MASK;  in bcm_uart_set_mctrl()
117 	bcm_uart_writel(port, val, UART_MCTL_REG);  in bcm_uart_set_mctrl()
119 	val = bcm_uart_readl(port, UART_CTL_REG);  in bcm_uart_set_mctrl()
121 		val |= UART_CTL_LOOPBACK_MASK;  in bcm_uart_set_mctrl()
123 		val &= ~UART_CTL_LOOPBACK_MASK;  in bcm_uart_set_mctrl()
124 	bcm_uart_writel(port, val, UART_CTL_REG);  in bcm_uart_set_mctrl()
132 	unsigned int val, mctrl;  in bcm_uart_get_mctrl()  local
135 	val = bcm_uart_readl(port, UART_EXTINP_REG);  in bcm_uart_get_mctrl()
136 	if (val & UART_EXTINP_RI_MASK)  in bcm_uart_get_mctrl()
138 	if (val & UART_EXTINP_CTS_MASK)  in bcm_uart_get_mctrl()
140 	if (val & UART_EXTINP_DCD_MASK)  in bcm_uart_get_mctrl()
142 	if (val & UART_EXTINP_DSR_MASK)  in bcm_uart_get_mctrl()
152 	unsigned int val;  in bcm_uart_stop_tx()  local
154 	val = bcm_uart_readl(port, UART_CTL_REG);  in bcm_uart_stop_tx()
155 	val &= ~(UART_CTL_TXEN_MASK);  in bcm_uart_stop_tx()
156 	bcm_uart_writel(port, val, UART_CTL_REG);  in bcm_uart_stop_tx()
158 	val = bcm_uart_readl(port, UART_IR_REG);  in bcm_uart_stop_tx()
159 	val &= ~UART_TX_INT_MASK;  in bcm_uart_stop_tx()
160 	bcm_uart_writel(port, val, UART_IR_REG);  in bcm_uart_stop_tx()
168 	unsigned int val;  in bcm_uart_start_tx()  local
170 	val = bcm_uart_readl(port, UART_IR_REG);  in bcm_uart_start_tx()
171 	val |= UART_TX_INT_MASK;  in bcm_uart_start_tx()
172 	bcm_uart_writel(port, val, UART_IR_REG);  in bcm_uart_start_tx()
174 	val = bcm_uart_readl(port, UART_CTL_REG);  in bcm_uart_start_tx()
175 	val |= UART_CTL_TXEN_MASK;  in bcm_uart_start_tx()
176 	bcm_uart_writel(port, val, UART_CTL_REG);  in bcm_uart_start_tx()
184 	unsigned int val;  in bcm_uart_stop_rx()  local
186 	val = bcm_uart_readl(port, UART_IR_REG);  in bcm_uart_stop_rx()
187 	val &= ~UART_RX_INT_MASK;  in bcm_uart_stop_rx()
188 	bcm_uart_writel(port, val, UART_IR_REG);  in bcm_uart_stop_rx()
196 	unsigned int val;  in bcm_uart_enable_ms()  local
198 	val = bcm_uart_readl(port, UART_IR_REG);  in bcm_uart_enable_ms()
199 	val |= UART_IR_MASK(UART_IR_EXTIP);  in bcm_uart_enable_ms()
200 	bcm_uart_writel(port, val, UART_IR_REG);  in bcm_uart_enable_ms()
209 	unsigned int val;  in bcm_uart_break_ctl()  local
213 	val = bcm_uart_readl(port, UART_CTL_REG);  in bcm_uart_break_ctl()
215 		val |= UART_CTL_XMITBRK_MASK;  in bcm_uart_break_ctl()
217 		val &= ~UART_CTL_XMITBRK_MASK;  in bcm_uart_break_ctl()
218 	bcm_uart_writel(port, val, UART_CTL_REG);  in bcm_uart_break_ctl()
252 			unsigned int val;  in bcm_uart_do_rx()  local
256 			val = bcm_uart_readl(port, UART_CTL_REG);  in bcm_uart_do_rx()
257 			val |= UART_CTL_RSTRXFIFO_MASK;  in bcm_uart_do_rx()
258 			bcm_uart_writel(port, val, UART_CTL_REG);  in bcm_uart_do_rx()
316 	unsigned int val, max_count;  in bcm_uart_do_tx()  local
334 	val = bcm_uart_readl(port, UART_MCTL_REG);  in bcm_uart_do_tx()
335 	val = (val & UART_MCTL_TXFIFOFILL_MASK) >> UART_MCTL_TXFIFOFILL_SHIFT;  in bcm_uart_do_tx()
336 	max_count = port->fifosize - val;  in bcm_uart_do_tx()
358 	val = bcm_uart_readl(port, UART_IR_REG);  in bcm_uart_do_tx()
359 	val &= ~UART_TX_INT_MASK;  in bcm_uart_do_tx()
360 	bcm_uart_writel(port, val, UART_IR_REG);  in bcm_uart_do_tx()
403 	unsigned int val;  in bcm_uart_enable()  local
405 	val = bcm_uart_readl(port, UART_CTL_REG);  in bcm_uart_enable()
406 	val |= (UART_CTL_BRGEN_MASK | UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);  in bcm_uart_enable()
407 	bcm_uart_writel(port, val, UART_CTL_REG);  in bcm_uart_enable()
415 	unsigned int val;  in bcm_uart_disable()  local
417 	val = bcm_uart_readl(port, UART_CTL_REG);  in bcm_uart_disable()
418 	val &= ~(UART_CTL_BRGEN_MASK | UART_CTL_TXEN_MASK |  in bcm_uart_disable()
420 	bcm_uart_writel(port, val, UART_CTL_REG);  in bcm_uart_disable()
428 	unsigned int val;  in bcm_uart_flush()  local
431 	val = bcm_uart_readl(port, UART_CTL_REG);  in bcm_uart_flush()
432 	val |= UART_CTL_RSTRXFIFO_MASK | UART_CTL_RSTTXFIFO_MASK;  in bcm_uart_flush()
433 	bcm_uart_writel(port, val, UART_CTL_REG);  in bcm_uart_flush()
445 	unsigned int val;  in bcm_uart_startup()  local
457 	val = bcm_uart_readl(port, UART_MCTL_REG);  in bcm_uart_startup()
458 	val &= ~(UART_MCTL_RXFIFOTHRESH_MASK | UART_MCTL_TXFIFOTHRESH_MASK);  in bcm_uart_startup()
459 	val |= (port->fifosize / 2) << UART_MCTL_RXFIFOTHRESH_SHIFT;  in bcm_uart_startup()
460 	val |= (port->fifosize / 2) << UART_MCTL_TXFIFOTHRESH_SHIFT;  in bcm_uart_startup()
461 	bcm_uart_writel(port, val, UART_MCTL_REG);  in bcm_uart_startup()
464 	val = bcm_uart_readl(port, UART_CTL_REG);  in bcm_uart_startup()
465 	val &= ~UART_CTL_RXTMOUTCNT_MASK;  in bcm_uart_startup()
466 	val |= 1 << UART_CTL_RXTMOUTCNT_SHIFT;  in bcm_uart_startup()
467 	bcm_uart_writel(port, val, UART_CTL_REG);  in bcm_uart_startup()
470 	val = UART_EXTINP_INT_MASK;  in bcm_uart_startup()
471 	val |= UART_EXTINP_DCD_NOSENSE_MASK;  in bcm_uart_startup()
472 	val |= UART_EXTINP_CTS_NOSENSE_MASK;  in bcm_uart_startup()
473 	bcm_uart_writel(port, val, UART_EXTINP_REG);  in bcm_uart_startup()
663 		unsigned int val;  in wait_for_xmitr()  local
665 		val = bcm_uart_readl(port, UART_IR_REG);  in wait_for_xmitr()
666 		if (val & UART_IR_STAT(UART_IR_TXEMPTY))  in wait_for_xmitr()
675 			unsigned int val;  in wait_for_xmitr()  local
677 			val = bcm_uart_readl(port, UART_EXTINP_REG);  in wait_for_xmitr()
678 			if (val & UART_EXTINP_CTS_MASK)  in wait_for_xmitr()