Lines Matching refs:sport
319 static void lpuart_copy_rx_to_tty(struct lpuart_port *sport, in lpuart_copy_rx_to_tty() argument
324 sport->port.icount.rx += count; in lpuart_copy_rx_to_tty()
327 dev_err(sport->port.dev, "No tty port\n"); in lpuart_copy_rx_to_tty()
331 dma_sync_single_for_cpu(sport->port.dev, sport->dma_rx_buf_bus, in lpuart_copy_rx_to_tty()
334 ((unsigned char *)(sport->dma_rx_buf_virt)), count); in lpuart_copy_rx_to_tty()
338 dev_err(sport->port.dev, "RxData copy to tty layer failed\n"); in lpuart_copy_rx_to_tty()
341 dma_sync_single_for_device(sport->port.dev, sport->dma_rx_buf_bus, in lpuart_copy_rx_to_tty()
345 static void lpuart_pio_tx(struct lpuart_port *sport) in lpuart_pio_tx() argument
347 struct circ_buf *xmit = &sport->port.state->xmit; in lpuart_pio_tx()
350 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_pio_tx()
353 readb(sport->port.membase + UARTTCFIFO) < sport->txfifo_size) { in lpuart_pio_tx()
354 writeb(xmit->buf[xmit->tail], sport->port.membase + UARTDR); in lpuart_pio_tx()
356 sport->port.icount.tx++; in lpuart_pio_tx()
360 uart_write_wakeup(&sport->port); in lpuart_pio_tx()
363 writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_TDMAS, in lpuart_pio_tx()
364 sport->port.membase + UARTCR5); in lpuart_pio_tx()
366 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_pio_tx()
369 static int lpuart_dma_tx(struct lpuart_port *sport, unsigned long count) in lpuart_dma_tx() argument
371 struct circ_buf *xmit = &sport->port.state->xmit; in lpuart_dma_tx()
374 dma_sync_single_for_device(sport->port.dev, sport->dma_tx_buf_bus, in lpuart_dma_tx()
376 sport->dma_tx_bytes = count & ~(sport->txfifo_size - 1); in lpuart_dma_tx()
377 tx_bus_addr = sport->dma_tx_buf_bus + xmit->tail; in lpuart_dma_tx()
378 sport->dma_tx_desc = dmaengine_prep_slave_single(sport->dma_tx_chan, in lpuart_dma_tx()
379 tx_bus_addr, sport->dma_tx_bytes, in lpuart_dma_tx()
382 if (!sport->dma_tx_desc) { in lpuart_dma_tx()
383 dev_err(sport->port.dev, "Not able to get desc for tx\n"); in lpuart_dma_tx()
387 sport->dma_tx_desc->callback = lpuart_dma_tx_complete; in lpuart_dma_tx()
388 sport->dma_tx_desc->callback_param = sport; in lpuart_dma_tx()
389 sport->dma_tx_in_progress = 1; in lpuart_dma_tx()
390 sport->dma_tx_cookie = dmaengine_submit(sport->dma_tx_desc); in lpuart_dma_tx()
391 dma_async_issue_pending(sport->dma_tx_chan); in lpuart_dma_tx()
396 static void lpuart_prepare_tx(struct lpuart_port *sport) in lpuart_prepare_tx() argument
398 struct circ_buf *xmit = &sport->port.state->xmit; in lpuart_prepare_tx()
405 if (count < sport->txfifo_size) in lpuart_prepare_tx()
406 writeb(readb(sport->port.membase + UARTCR5) & ~UARTCR5_TDMAS, in lpuart_prepare_tx()
407 sport->port.membase + UARTCR5); in lpuart_prepare_tx()
409 writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_TDMAS, in lpuart_prepare_tx()
410 sport->port.membase + UARTCR5); in lpuart_prepare_tx()
411 lpuart_dma_tx(sport, count); in lpuart_prepare_tx()
417 struct lpuart_port *sport = arg; in lpuart_dma_tx_complete() local
418 struct circ_buf *xmit = &sport->port.state->xmit; in lpuart_dma_tx_complete()
421 async_tx_ack(sport->dma_tx_desc); in lpuart_dma_tx_complete()
423 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_dma_tx_complete()
425 xmit->tail = (xmit->tail + sport->dma_tx_bytes) & (UART_XMIT_SIZE - 1); in lpuart_dma_tx_complete()
426 sport->dma_tx_in_progress = 0; in lpuart_dma_tx_complete()
429 uart_write_wakeup(&sport->port); in lpuart_dma_tx_complete()
431 lpuart_prepare_tx(sport); in lpuart_dma_tx_complete()
433 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_dma_tx_complete()
436 static int lpuart_dma_rx(struct lpuart_port *sport) in lpuart_dma_rx() argument
438 dma_sync_single_for_device(sport->port.dev, sport->dma_rx_buf_bus, in lpuart_dma_rx()
440 sport->dma_rx_desc = dmaengine_prep_slave_single(sport->dma_rx_chan, in lpuart_dma_rx()
441 sport->dma_rx_buf_bus, FSL_UART_RX_DMA_BUFFER_SIZE, in lpuart_dma_rx()
444 if (!sport->dma_rx_desc) { in lpuart_dma_rx()
445 dev_err(sport->port.dev, "Not able to get desc for rx\n"); in lpuart_dma_rx()
449 sport->dma_rx_desc->callback = lpuart_dma_rx_complete; in lpuart_dma_rx()
450 sport->dma_rx_desc->callback_param = sport; in lpuart_dma_rx()
451 sport->dma_rx_in_progress = 1; in lpuart_dma_rx()
452 sport->dma_rx_cookie = dmaengine_submit(sport->dma_rx_desc); in lpuart_dma_rx()
453 dma_async_issue_pending(sport->dma_rx_chan); in lpuart_dma_rx()
460 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart_flush_buffer() local
461 if (sport->lpuart_dma_tx_use) { in lpuart_flush_buffer()
462 dmaengine_terminate_all(sport->dma_tx_chan); in lpuart_flush_buffer()
463 sport->dma_tx_in_progress = 0; in lpuart_flush_buffer()
469 struct lpuart_port *sport = arg; in lpuart_dma_rx_complete() local
470 struct tty_port *port = &sport->port.state->port; in lpuart_dma_rx_complete()
473 async_tx_ack(sport->dma_rx_desc); in lpuart_dma_rx_complete()
474 mod_timer(&sport->lpuart_timer, jiffies + sport->dma_rx_timeout); in lpuart_dma_rx_complete()
476 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_dma_rx_complete()
478 sport->dma_rx_in_progress = 0; in lpuart_dma_rx_complete()
479 lpuart_copy_rx_to_tty(sport, port, FSL_UART_RX_DMA_BUFFER_SIZE); in lpuart_dma_rx_complete()
481 lpuart_dma_rx(sport); in lpuart_dma_rx_complete()
483 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_dma_rx_complete()
488 struct lpuart_port *sport = (struct lpuart_port *)data; in lpuart_timer_func() local
489 struct tty_port *port = &sport->port.state->port; in lpuart_timer_func()
495 del_timer(&sport->lpuart_timer); in lpuart_timer_func()
496 dmaengine_pause(sport->dma_rx_chan); in lpuart_timer_func()
497 dmaengine_tx_status(sport->dma_rx_chan, sport->dma_rx_cookie, &state); in lpuart_timer_func()
498 dmaengine_terminate_all(sport->dma_rx_chan); in lpuart_timer_func()
500 async_tx_ack(sport->dma_rx_desc); in lpuart_timer_func()
502 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_timer_func()
504 sport->dma_rx_in_progress = 0; in lpuart_timer_func()
505 lpuart_copy_rx_to_tty(sport, port, count); in lpuart_timer_func()
507 temp = readb(sport->port.membase + UARTCR5); in lpuart_timer_func()
508 writeb(temp & ~UARTCR5_RDMAS, sport->port.membase + UARTCR5); in lpuart_timer_func()
510 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_timer_func()
513 static inline void lpuart_prepare_rx(struct lpuart_port *sport) in lpuart_prepare_rx() argument
518 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_prepare_rx()
520 sport->lpuart_timer.expires = jiffies + sport->dma_rx_timeout; in lpuart_prepare_rx()
521 add_timer(&sport->lpuart_timer); in lpuart_prepare_rx()
523 lpuart_dma_rx(sport); in lpuart_prepare_rx()
524 temp = readb(sport->port.membase + UARTCR5); in lpuart_prepare_rx()
525 writeb(temp | UARTCR5_RDMAS, sport->port.membase + UARTCR5); in lpuart_prepare_rx()
527 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_prepare_rx()
530 static inline void lpuart_transmit_buffer(struct lpuart_port *sport) in lpuart_transmit_buffer() argument
532 struct circ_buf *xmit = &sport->port.state->xmit; in lpuart_transmit_buffer()
535 (readb(sport->port.membase + UARTTCFIFO) < sport->txfifo_size)) { in lpuart_transmit_buffer()
536 writeb(xmit->buf[xmit->tail], sport->port.membase + UARTDR); in lpuart_transmit_buffer()
538 sport->port.icount.tx++; in lpuart_transmit_buffer()
542 uart_write_wakeup(&sport->port); in lpuart_transmit_buffer()
545 lpuart_stop_tx(&sport->port); in lpuart_transmit_buffer()
548 static inline void lpuart32_transmit_buffer(struct lpuart_port *sport) in lpuart32_transmit_buffer() argument
550 struct circ_buf *xmit = &sport->port.state->xmit; in lpuart32_transmit_buffer()
553 txcnt = lpuart32_read(sport->port.membase + UARTWATER); in lpuart32_transmit_buffer()
556 while (!uart_circ_empty(xmit) && (txcnt < sport->txfifo_size)) { in lpuart32_transmit_buffer()
557 lpuart32_write(xmit->buf[xmit->tail], sport->port.membase + UARTDATA); in lpuart32_transmit_buffer()
559 sport->port.icount.tx++; in lpuart32_transmit_buffer()
560 txcnt = lpuart32_read(sport->port.membase + UARTWATER); in lpuart32_transmit_buffer()
566 uart_write_wakeup(&sport->port); in lpuart32_transmit_buffer()
569 lpuart32_stop_tx(&sport->port); in lpuart32_transmit_buffer()
574 struct lpuart_port *sport = container_of(port, in lpuart_start_tx() local
576 struct circ_buf *xmit = &sport->port.state->xmit; in lpuart_start_tx()
582 if (sport->lpuart_dma_tx_use) { in lpuart_start_tx()
583 if (!uart_circ_empty(xmit) && !sport->dma_tx_in_progress) in lpuart_start_tx()
584 lpuart_prepare_tx(sport); in lpuart_start_tx()
587 lpuart_transmit_buffer(sport); in lpuart_start_tx()
593 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart32_start_tx() local
600 lpuart32_transmit_buffer(sport); in lpuart32_start_tx()
605 struct lpuart_port *sport = dev_id; in lpuart_txint() local
606 struct circ_buf *xmit = &sport->port.state->xmit; in lpuart_txint()
609 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_txint()
610 if (sport->port.x_char) { in lpuart_txint()
611 if (sport->lpuart32) in lpuart_txint()
612 lpuart32_write(sport->port.x_char, sport->port.membase + UARTDATA); in lpuart_txint()
614 writeb(sport->port.x_char, sport->port.membase + UARTDR); in lpuart_txint()
618 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) { in lpuart_txint()
619 if (sport->lpuart32) in lpuart_txint()
620 lpuart32_stop_tx(&sport->port); in lpuart_txint()
622 lpuart_stop_tx(&sport->port); in lpuart_txint()
626 if (sport->lpuart32) in lpuart_txint()
627 lpuart32_transmit_buffer(sport); in lpuart_txint()
629 lpuart_transmit_buffer(sport); in lpuart_txint()
632 uart_write_wakeup(&sport->port); in lpuart_txint()
635 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_txint()
641 struct lpuart_port *sport = dev_id; in lpuart_rxint() local
643 struct tty_port *port = &sport->port.state->port; in lpuart_rxint()
647 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_rxint()
649 while (!(readb(sport->port.membase + UARTSFIFO) & UARTSFIFO_RXEMPT)) { in lpuart_rxint()
651 sport->port.icount.rx++; in lpuart_rxint()
656 sr = readb(sport->port.membase + UARTSR1); in lpuart_rxint()
657 rx = readb(sport->port.membase + UARTDR); in lpuart_rxint()
659 if (uart_handle_sysrq_char(&sport->port, (unsigned char)rx)) in lpuart_rxint()
664 sport->port.icount.parity++; in lpuart_rxint()
666 sport->port.icount.frame++; in lpuart_rxint()
669 sport->port.icount.overrun++; in lpuart_rxint()
671 if (sr & sport->port.ignore_status_mask) { in lpuart_rxint()
677 sr &= sport->port.read_status_mask; in lpuart_rxint()
688 sport->port.sysrq = 0; in lpuart_rxint()
696 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_rxint()
704 struct lpuart_port *sport = dev_id; in lpuart32_rxint() local
706 struct tty_port *port = &sport->port.state->port; in lpuart32_rxint()
710 spin_lock_irqsave(&sport->port.lock, flags); in lpuart32_rxint()
712 while (!(lpuart32_read(sport->port.membase + UARTFIFO) & UARTFIFO_RXEMPT)) { in lpuart32_rxint()
714 sport->port.icount.rx++; in lpuart32_rxint()
719 sr = lpuart32_read(sport->port.membase + UARTSTAT); in lpuart32_rxint()
720 rx = lpuart32_read(sport->port.membase + UARTDATA); in lpuart32_rxint()
723 if (uart_handle_sysrq_char(&sport->port, (unsigned char)rx)) in lpuart32_rxint()
728 sport->port.icount.parity++; in lpuart32_rxint()
730 sport->port.icount.frame++; in lpuart32_rxint()
733 sport->port.icount.overrun++; in lpuart32_rxint()
735 if (sr & sport->port.ignore_status_mask) { in lpuart32_rxint()
741 sr &= sport->port.read_status_mask; in lpuart32_rxint()
752 sport->port.sysrq = 0; in lpuart32_rxint()
760 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart32_rxint()
768 struct lpuart_port *sport = dev_id; in lpuart_int() local
771 sts = readb(sport->port.membase + UARTSR1); in lpuart_int()
772 crdma = readb(sport->port.membase + UARTCR5); in lpuart_int()
775 if (sport->lpuart_dma_rx_use) in lpuart_int()
776 lpuart_prepare_rx(sport); in lpuart_int()
781 if (sport->lpuart_dma_tx_use) in lpuart_int()
782 lpuart_pio_tx(sport); in lpuart_int()
792 struct lpuart_port *sport = dev_id; in lpuart32_int() local
795 sts = lpuart32_read(sport->port.membase + UARTSTAT); in lpuart32_int()
796 rxcount = lpuart32_read(sport->port.membase + UARTWATER); in lpuart32_int()
803 !(lpuart32_read(sport->port.membase + UARTBAUD) & UARTBAUD_TDMAE)) in lpuart32_int()
806 lpuart32_write(sts, sport->port.membase + UARTSTAT); in lpuart32_int()
909 static void lpuart_setup_watermark(struct lpuart_port *sport) in lpuart_setup_watermark() argument
914 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark()
918 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
920 val = readb(sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
922 sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
925 readb(sport->port.membase + UARTSR1); in lpuart_setup_watermark()
929 sport->port.membase + UARTCFIFO); in lpuart_setup_watermark()
931 writeb(0, sport->port.membase + UARTTWFIFO); in lpuart_setup_watermark()
932 writeb(1, sport->port.membase + UARTRWFIFO); in lpuart_setup_watermark()
935 writeb(cr2_saved, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
938 static void lpuart32_setup_watermark(struct lpuart_port *sport) in lpuart32_setup_watermark() argument
943 ctrl = lpuart32_read(sport->port.membase + UARTCTRL); in lpuart32_setup_watermark()
947 lpuart32_write(ctrl, sport->port.membase + UARTCTRL); in lpuart32_setup_watermark()
950 val = lpuart32_read(sport->port.membase + UARTFIFO); in lpuart32_setup_watermark()
953 lpuart32_write(val, sport->port.membase + UARTFIFO); in lpuart32_setup_watermark()
957 lpuart32_write(val, sport->port.membase + UARTWATER); in lpuart32_setup_watermark()
960 lpuart32_write(ctrl_saved, sport->port.membase + UARTCTRL); in lpuart32_setup_watermark()
965 struct lpuart_port *sport = container_of(port, in lpuart_dma_tx_request() local
972 dma_bus = dma_map_single(sport->dma_tx_chan->device->dev, in lpuart_dma_tx_request()
973 sport->port.state->xmit.buf, in lpuart_dma_tx_request()
976 if (dma_mapping_error(sport->dma_tx_chan->device->dev, dma_bus)) { in lpuart_dma_tx_request()
977 dev_err(sport->port.dev, "dma_map_single tx failed\n"); in lpuart_dma_tx_request()
981 dma_buf = sport->port.state->xmit.buf; in lpuart_dma_tx_request()
982 dma_tx_sconfig.dst_addr = sport->port.mapbase + UARTDR; in lpuart_dma_tx_request()
984 dma_tx_sconfig.dst_maxburst = sport->txfifo_size; in lpuart_dma_tx_request()
986 ret = dmaengine_slave_config(sport->dma_tx_chan, &dma_tx_sconfig); in lpuart_dma_tx_request()
989 dev_err(sport->port.dev, in lpuart_dma_tx_request()
994 sport->dma_tx_buf_virt = dma_buf; in lpuart_dma_tx_request()
995 sport->dma_tx_buf_bus = dma_bus; in lpuart_dma_tx_request()
996 sport->dma_tx_in_progress = 0; in lpuart_dma_tx_request()
1003 struct lpuart_port *sport = container_of(port, in lpuart_dma_rx_request() local
1010 dma_buf = devm_kzalloc(sport->port.dev, in lpuart_dma_rx_request()
1014 dev_err(sport->port.dev, "Dma rx alloc failed\n"); in lpuart_dma_rx_request()
1018 dma_bus = dma_map_single(sport->dma_rx_chan->device->dev, dma_buf, in lpuart_dma_rx_request()
1021 if (dma_mapping_error(sport->dma_rx_chan->device->dev, dma_bus)) { in lpuart_dma_rx_request()
1022 dev_err(sport->port.dev, "dma_map_single rx failed\n"); in lpuart_dma_rx_request()
1026 dma_rx_sconfig.src_addr = sport->port.mapbase + UARTDR; in lpuart_dma_rx_request()
1030 ret = dmaengine_slave_config(sport->dma_rx_chan, &dma_rx_sconfig); in lpuart_dma_rx_request()
1033 dev_err(sport->port.dev, in lpuart_dma_rx_request()
1038 sport->dma_rx_buf_virt = dma_buf; in lpuart_dma_rx_request()
1039 sport->dma_rx_buf_bus = dma_bus; in lpuart_dma_rx_request()
1040 sport->dma_rx_in_progress = 0; in lpuart_dma_rx_request()
1047 struct lpuart_port *sport = container_of(port, in lpuart_dma_tx_free() local
1050 dma_unmap_single(sport->port.dev, sport->dma_tx_buf_bus, in lpuart_dma_tx_free()
1053 sport->dma_tx_buf_bus = 0; in lpuart_dma_tx_free()
1054 sport->dma_tx_buf_virt = NULL; in lpuart_dma_tx_free()
1059 struct lpuart_port *sport = container_of(port, in lpuart_dma_rx_free() local
1062 dma_unmap_single(sport->port.dev, sport->dma_rx_buf_bus, in lpuart_dma_rx_free()
1065 sport->dma_rx_buf_bus = 0; in lpuart_dma_rx_free()
1066 sport->dma_rx_buf_virt = NULL; in lpuart_dma_rx_free()
1071 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart_startup() local
1077 temp = readb(sport->port.membase + UARTPFIFO); in lpuart_startup()
1079 sport->txfifo_size = 0x1 << (((temp >> UARTPFIFO_TXSIZE_OFF) & in lpuart_startup()
1082 sport->port.fifosize = sport->txfifo_size; in lpuart_startup()
1084 sport->rxfifo_size = 0x1 << (((temp >> UARTPFIFO_RXSIZE_OFF) & in lpuart_startup()
1087 if (sport->dma_rx_chan && !lpuart_dma_rx_request(port)) { in lpuart_startup()
1088 sport->lpuart_dma_rx_use = true; in lpuart_startup()
1089 setup_timer(&sport->lpuart_timer, lpuart_timer_func, in lpuart_startup()
1090 (unsigned long)sport); in lpuart_startup()
1092 sport->lpuart_dma_rx_use = false; in lpuart_startup()
1095 if (sport->dma_tx_chan && !lpuart_dma_tx_request(port)) { in lpuart_startup()
1096 sport->lpuart_dma_tx_use = true; in lpuart_startup()
1101 sport->lpuart_dma_tx_use = false; in lpuart_startup()
1104 DRIVER_NAME, sport); in lpuart_startup()
1108 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_startup()
1110 lpuart_setup_watermark(sport); in lpuart_startup()
1112 temp = readb(sport->port.membase + UARTCR2); in lpuart_startup()
1114 writeb(temp, sport->port.membase + UARTCR2); in lpuart_startup()
1116 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_startup()
1122 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart32_startup() local
1128 temp = lpuart32_read(sport->port.membase + UARTFIFO); in lpuart32_startup()
1130 sport->txfifo_size = 0x1 << (((temp >> UARTFIFO_TXSIZE_OFF) & in lpuart32_startup()
1133 sport->rxfifo_size = 0x1 << (((temp >> UARTFIFO_RXSIZE_OFF) & in lpuart32_startup()
1137 DRIVER_NAME, sport); in lpuart32_startup()
1141 spin_lock_irqsave(&sport->port.lock, flags); in lpuart32_startup()
1143 lpuart32_setup_watermark(sport); in lpuart32_startup()
1145 temp = lpuart32_read(sport->port.membase + UARTCTRL); in lpuart32_startup()
1148 lpuart32_write(temp, sport->port.membase + UARTCTRL); in lpuart32_startup()
1150 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart32_startup()
1156 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart_shutdown() local
1170 devm_free_irq(port->dev, port->irq, sport); in lpuart_shutdown()
1172 if (sport->lpuart_dma_rx_use) { in lpuart_shutdown()
1173 lpuart_dma_rx_free(&sport->port); in lpuart_shutdown()
1174 del_timer_sync(&sport->lpuart_timer); in lpuart_shutdown()
1177 if (sport->lpuart_dma_tx_use) in lpuart_shutdown()
1178 lpuart_dma_tx_free(&sport->port); in lpuart_shutdown()
1183 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart32_shutdown() local
1197 devm_free_irq(port->dev, port->irq, sport); in lpuart32_shutdown()
1204 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart_set_termios() local
1211 cr1 = old_cr1 = readb(sport->port.membase + UARTCR1); in lpuart_set_termios()
1212 old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_set_termios()
1213 cr4 = readb(sport->port.membase + UARTCR4); in lpuart_set_termios()
1214 bdh = readb(sport->port.membase + UARTBDH); in lpuart_set_termios()
1215 modem = readb(sport->port.membase + UARTMODEM); in lpuart_set_termios()
1275 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_set_termios()
1277 sport->port.read_status_mask = 0; in lpuart_set_termios()
1279 sport->port.read_status_mask |= (UARTSR1_FE | UARTSR1_PE); in lpuart_set_termios()
1281 sport->port.read_status_mask |= UARTSR1_FE; in lpuart_set_termios()
1284 sport->port.ignore_status_mask = 0; in lpuart_set_termios()
1286 sport->port.ignore_status_mask |= UARTSR1_PE; in lpuart_set_termios()
1288 sport->port.ignore_status_mask |= UARTSR1_FE; in lpuart_set_termios()
1294 sport->port.ignore_status_mask |= UARTSR1_OR; in lpuart_set_termios()
1300 if (sport->lpuart_dma_rx_use) { in lpuart_set_termios()
1302 sport->dma_rx_timeout = (sport->port.timeout - HZ / 50) * in lpuart_set_termios()
1304 sport->rxfifo_size / 2; in lpuart_set_termios()
1306 sport->dma_rx_timeout * 1000 / HZ, sport->port.timeout); in lpuart_set_termios()
1307 if (sport->dma_rx_timeout < msecs_to_jiffies(20)) in lpuart_set_termios()
1308 sport->dma_rx_timeout = msecs_to_jiffies(20); in lpuart_set_termios()
1312 while (!(readb(sport->port.membase + UARTSR1) & UARTSR1_TC)) in lpuart_set_termios()
1317 sport->port.membase + UARTCR2); in lpuart_set_termios()
1319 sbr = sport->port.uartclk / (16 * baud); in lpuart_set_termios()
1320 brfa = ((sport->port.uartclk - (16 * sbr * baud)) * 2) / baud; in lpuart_set_termios()
1325 writeb(cr4 | brfa, sport->port.membase + UARTCR4); in lpuart_set_termios()
1326 writeb(bdh, sport->port.membase + UARTBDH); in lpuart_set_termios()
1327 writeb(sbr & 0xFF, sport->port.membase + UARTBDL); in lpuart_set_termios()
1328 writeb(cr1, sport->port.membase + UARTCR1); in lpuart_set_termios()
1329 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_set_termios()
1332 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_set_termios()
1334 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_set_termios()
1341 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart32_set_termios() local
1348 ctrl = old_ctrl = lpuart32_read(sport->port.membase + UARTCTRL); in lpuart32_set_termios()
1349 bd = lpuart32_read(sport->port.membase + UARTBAUD); in lpuart32_set_termios()
1350 modem = lpuart32_read(sport->port.membase + UARTMODIR); in lpuart32_set_termios()
1410 spin_lock_irqsave(&sport->port.lock, flags); in lpuart32_set_termios()
1412 sport->port.read_status_mask = 0; in lpuart32_set_termios()
1414 sport->port.read_status_mask |= (UARTSTAT_FE | UARTSTAT_PE); in lpuart32_set_termios()
1416 sport->port.read_status_mask |= UARTSTAT_FE; in lpuart32_set_termios()
1419 sport->port.ignore_status_mask = 0; in lpuart32_set_termios()
1421 sport->port.ignore_status_mask |= UARTSTAT_PE; in lpuart32_set_termios()
1423 sport->port.ignore_status_mask |= UARTSTAT_FE; in lpuart32_set_termios()
1429 sport->port.ignore_status_mask |= UARTSTAT_OR; in lpuart32_set_termios()
1436 while (!(lpuart32_read(sport->port.membase + UARTSTAT) & UARTSTAT_TC)) in lpuart32_set_termios()
1441 sport->port.membase + UARTCTRL); in lpuart32_set_termios()
1443 sbr = sport->port.uartclk / (16 * baud); in lpuart32_set_termios()
1448 lpuart32_write(bd, sport->port.membase + UARTBAUD); in lpuart32_set_termios()
1449 lpuart32_write(modem, sport->port.membase + UARTMODIR); in lpuart32_set_termios()
1450 lpuart32_write(ctrl, sport->port.membase + UARTCTRL); in lpuart32_set_termios()
1453 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart32_set_termios()
1557 struct lpuart_port *sport = lpuart_ports[co->index]; in lpuart_console_write() local
1561 cr2 = old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_console_write()
1564 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
1566 uart_console_write(&sport->port, s, count, lpuart_console_putchar); in lpuart_console_write()
1569 while (!(readb(sport->port.membase + UARTSR1) & UARTSR1_TC)) in lpuart_console_write()
1572 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
1578 struct lpuart_port *sport = lpuart_ports[co->index]; in lpuart32_console_write() local
1582 cr = old_cr = lpuart32_read(sport->port.membase + UARTCTRL); in lpuart32_console_write()
1585 lpuart32_write(cr, sport->port.membase + UARTCTRL); in lpuart32_console_write()
1587 uart_console_write(&sport->port, s, count, lpuart32_console_putchar); in lpuart32_console_write()
1590 while (!(lpuart32_read(sport->port.membase + UARTSTAT) & UARTSTAT_TC)) in lpuart32_console_write()
1593 lpuart32_write(old_cr, sport->port.membase + UARTCTRL); in lpuart32_console_write()
1601 lpuart_console_get_options(struct lpuart_port *sport, int *baud, in lpuart_console_get_options() argument
1607 cr = readb(sport->port.membase + UARTCR2); in lpuart_console_get_options()
1614 cr = readb(sport->port.membase + UARTCR1); in lpuart_console_get_options()
1629 bdh = readb(sport->port.membase + UARTBDH); in lpuart_console_get_options()
1631 bdl = readb(sport->port.membase + UARTBDL); in lpuart_console_get_options()
1635 brfa = readb(sport->port.membase + UARTCR4); in lpuart_console_get_options()
1638 uartclk = clk_get_rate(sport->clk); in lpuart_console_get_options()
1650 lpuart32_console_get_options(struct lpuart_port *sport, int *baud, in lpuart32_console_get_options() argument
1656 cr = lpuart32_read(sport->port.membase + UARTCTRL); in lpuart32_console_get_options()
1663 cr = lpuart32_read(sport->port.membase + UARTCTRL); in lpuart32_console_get_options()
1678 bd = lpuart32_read(sport->port.membase + UARTBAUD); in lpuart32_console_get_options()
1681 uartclk = clk_get_rate(sport->clk); in lpuart32_console_get_options()
1694 struct lpuart_port *sport; in lpuart_console_setup() local
1708 sport = lpuart_ports[co->index]; in lpuart_console_setup()
1709 if (sport == NULL) in lpuart_console_setup()
1715 if (sport->lpuart32) in lpuart_console_setup()
1716 lpuart32_console_get_options(sport, &baud, &parity, &bits); in lpuart_console_setup()
1718 lpuart_console_get_options(sport, &baud, &parity, &bits); in lpuart_console_setup()
1720 if (sport->lpuart32) in lpuart_console_setup()
1721 lpuart32_setup_watermark(sport); in lpuart_console_setup()
1723 lpuart_setup_watermark(sport); in lpuart_console_setup()
1725 return uart_set_options(&sport->port, co, baud, parity, bits, flow); in lpuart_console_setup()
1767 struct lpuart_port *sport; in lpuart_probe() local
1771 sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL); in lpuart_probe()
1772 if (!sport) in lpuart_probe()
1782 sport->port.line = ret; in lpuart_probe()
1783 sport->lpuart32 = of_device_is_compatible(np, "fsl,ls1021a-lpuart"); in lpuart_probe()
1786 sport->port.membase = devm_ioremap_resource(&pdev->dev, res); in lpuart_probe()
1787 if (IS_ERR(sport->port.membase)) in lpuart_probe()
1788 return PTR_ERR(sport->port.membase); in lpuart_probe()
1790 sport->port.mapbase = res->start; in lpuart_probe()
1791 sport->port.dev = &pdev->dev; in lpuart_probe()
1792 sport->port.type = PORT_LPUART; in lpuart_probe()
1793 sport->port.iotype = UPIO_MEM; in lpuart_probe()
1794 sport->port.irq = platform_get_irq(pdev, 0); in lpuart_probe()
1795 if (sport->lpuart32) in lpuart_probe()
1796 sport->port.ops = &lpuart32_pops; in lpuart_probe()
1798 sport->port.ops = &lpuart_pops; in lpuart_probe()
1799 sport->port.flags = UPF_BOOT_AUTOCONF; in lpuart_probe()
1801 sport->clk = devm_clk_get(&pdev->dev, "ipg"); in lpuart_probe()
1802 if (IS_ERR(sport->clk)) { in lpuart_probe()
1803 ret = PTR_ERR(sport->clk); in lpuart_probe()
1808 ret = clk_prepare_enable(sport->clk); in lpuart_probe()
1814 sport->port.uartclk = clk_get_rate(sport->clk); in lpuart_probe()
1816 lpuart_ports[sport->port.line] = sport; in lpuart_probe()
1818 platform_set_drvdata(pdev, &sport->port); in lpuart_probe()
1820 if (sport->lpuart32) in lpuart_probe()
1825 ret = uart_add_one_port(&lpuart_reg, &sport->port); in lpuart_probe()
1827 clk_disable_unprepare(sport->clk); in lpuart_probe()
1831 sport->dma_tx_chan = dma_request_slave_channel(sport->port.dev, "tx"); in lpuart_probe()
1832 if (!sport->dma_tx_chan) in lpuart_probe()
1833 dev_info(sport->port.dev, "DMA tx channel request failed, " in lpuart_probe()
1836 sport->dma_rx_chan = dma_request_slave_channel(sport->port.dev, "rx"); in lpuart_probe()
1837 if (!sport->dma_rx_chan) in lpuart_probe()
1838 dev_info(sport->port.dev, "DMA rx channel request failed, " in lpuart_probe()
1846 struct lpuart_port *sport = platform_get_drvdata(pdev); in lpuart_remove() local
1848 uart_remove_one_port(&lpuart_reg, &sport->port); in lpuart_remove()
1850 clk_disable_unprepare(sport->clk); in lpuart_remove()
1852 if (sport->dma_tx_chan) in lpuart_remove()
1853 dma_release_channel(sport->dma_tx_chan); in lpuart_remove()
1855 if (sport->dma_rx_chan) in lpuart_remove()
1856 dma_release_channel(sport->dma_rx_chan); in lpuart_remove()
1864 struct lpuart_port *sport = dev_get_drvdata(dev); in lpuart_suspend() local
1867 if (sport->lpuart32) { in lpuart_suspend()
1869 temp = lpuart32_read(sport->port.membase + UARTCTRL); in lpuart_suspend()
1871 lpuart32_write(temp, sport->port.membase + UARTCTRL); in lpuart_suspend()
1874 temp = readb(sport->port.membase + UARTCR2); in lpuart_suspend()
1876 writeb(temp, sport->port.membase + UARTCR2); in lpuart_suspend()
1879 uart_suspend_port(&lpuart_reg, &sport->port); in lpuart_suspend()
1886 struct lpuart_port *sport = dev_get_drvdata(dev); in lpuart_resume() local
1889 if (sport->lpuart32) { in lpuart_resume()
1890 lpuart32_setup_watermark(sport); in lpuart_resume()
1891 temp = lpuart32_read(sport->port.membase + UARTCTRL); in lpuart_resume()
1894 lpuart32_write(temp, sport->port.membase + UARTCTRL); in lpuart_resume()
1896 lpuart_setup_watermark(sport); in lpuart_resume()
1897 temp = readb(sport->port.membase + UARTCR2); in lpuart_resume()
1899 writeb(temp, sport->port.membase + UARTCR2); in lpuart_resume()
1902 uart_resume_port(&lpuart_reg, &sport->port); in lpuart_resume()