Lines Matching refs:USR2
56 #define USR2 0x98 /* Status Register 2 */ macro
373 readl(port->membase + USR2) & USR2_TXDC) { in imx_stop_tx()
652 while (readl(sport->port.membase + USR2) & USR2_RDR) { in imx_rxint()
658 temp = readl(sport->port.membase + USR2); in imx_rxint()
660 writel(USR2_BRCD, sport->port.membase + USR2); in imx_rxint()
724 temp = readl(sport->port.membase + USR2); in imx_dma_rxint()
747 sts2 = readl(sport->port.membase + USR2); in imx_int()
771 writel(USR2_ORE, sport->port.membase + USR2); in imx_int()
785 ret = (readl(sport->port.membase + USR2) & USR2_TXDC) ? TIOCSER_TEMT : 0; in imx_tx_empty()
915 if (readl(sport->port.membase + USR2) & USR2_IDLE) { in dma_rx_callback()
919 writel(USR2_IDLE, sport->port.membase + USR2); in dma_rx_callback()
930 } else if (readl(sport->port.membase + USR2) & USR2_RDR) { in dma_rx_callback()
1141 writel(USR2_ORE, sport->port.membase + USR2); in imx_startup()
1381 while (!(readl(sport->port.membase + USR2) & USR2_TXDC)) in imx_set_termios()
1523 if (!(readl_relaxed(port->membase + USR2) & USR2_RDR)) in imx_poll_get_char()
1543 status = readl_relaxed(port->membase + USR2); in imx_poll_put_char()
1666 while (!(readl(sport->port.membase + USR2) & USR2_TXDC)); in imx_console_write()