302 	writel(ucr->ucr1, port->membase + UCR1);  in imx_port_ucrs_restore()
303 	writel(ucr->ucr2, port->membase + UCR2);  in imx_port_ucrs_restore()
304 	writel(ucr->ucr3, port->membase + UCR3);  in imx_port_ucrs_restore()
369 	writel(temp & ~UCR1_TXMPTYEN, port->membase + UCR1);  in imx_stop_tx()
379 		writel(temp, port->membase + UCR2);  in imx_stop_tx()
383 		writel(temp, port->membase + UCR4);  in imx_stop_tx()
405 	writel(temp & ~UCR2_RXEN, sport->port.membase + UCR2);  in imx_stop_rx()
409 	writel(temp & ~UCR1_RRDYEN, sport->port.membase + UCR1);  in imx_stop_rx()
430 		writel(sport->port.x_char, sport->port.membase + URTX0);  in imx_transmit_buffer()
450 			writel(temp, sport->port.membase + UCR1);  in imx_transmit_buffer()
452 			writel(temp, sport->port.membase + UCR1);  in imx_transmit_buffer()
461 		writel(xmit->buf[xmit->tail], sport->port.membase + URTX0);  in imx_transmit_buffer()
487 	writel(temp, sport->port.membase + UCR1);  in dma_tx_callback()
561 	writel(temp, sport->port.membase + UCR1);  in imx_dma_tx()
585 		writel(temp, port->membase + UCR2);  in imx_start_tx()
589 		writel(temp, port->membase + UCR4);  in imx_start_tx()
594 		writel(temp | UCR1_TXMPTYEN, sport->port.membase + UCR1);  in imx_start_tx()
604 			writel(temp, sport->port.membase + UCR1);  in imx_start_tx()
623 	writel(USR1_RTSD, sport->port.membase + USR1);  in imx_rtsint()
660 			writel(USR2_BRCD, sport->port.membase + USR2);  in imx_rxint()
731 		writel(temp, sport->port.membase + UCR1);  in imx_dma_rxint()
766 		writel(USR1_AWAKE, sport->port.membase + USR1);  in imx_int()
771 		writel(USR2_ORE, sport->port.membase + USR2);  in imx_int()
824 		writel(temp, sport->port.membase + UCR2);  in imx_set_mctrl()
830 	writel(temp, sport->port.membase + uts_reg(sport));  in imx_set_mctrl()
848 	writel(temp, sport->port.membase + UCR1);  in imx_break_ctl()
863 	writel(val, sport->port.membase + UFCR);  in imx_setup_ufcr()
878 	writel(temp, sport->port.membase + UCR1);  in imx_rx_dma_done()
919 		writel(USR2_IDLE, sport->port.membase + USR2);  in dma_rx_callback()
1062 	writel(temp, sport->port.membase + UCR1);  in imx_enable_dma()
1067 	writel(temp, sport->port.membase + UCR4);  in imx_enable_dma()
1079 	writel(temp, sport->port.membase + UCR1);  in imx_disable_dma()
1084 	writel(temp, sport->port.membase + UCR2);  in imx_disable_dma()
1089 	writel(temp, sport->port.membase + UCR4);  in imx_disable_dma()
1123 	writel(temp & ~UCR4_DREN, sport->port.membase + UCR4);  in imx_startup()
1130 	writel(temp, sport->port.membase + UCR2);  in imx_startup()
1140 	writel(USR1_RTSD, sport->port.membase + USR1);  in imx_startup()
1141 	writel(USR2_ORE, sport->port.membase + USR2);  in imx_startup()
1146 	writel(temp, sport->port.membase + UCR1);  in imx_startup()
1150 	writel(temp, sport->port.membase + UCR4);  in imx_startup()
1156 	writel(temp, sport->port.membase + UCR2);  in imx_startup()
1161 		writel(temp, sport->port.membase + UCR3);  in imx_startup()
1202 	writel(temp, sport->port.membase + UCR2);  in imx_shutdown()
1218 	writel(temp, sport->port.membase + UCR1);  in imx_shutdown()
1242 		writel(temp, sport->port.membase + UCR1);  in imx_flush_buffer()
1259 	writel(temp, sport->port.membase + UCR2);  in imx_flush_buffer()
1265 	writel(ubir, sport->port.membase + UBIR);  in imx_flush_buffer()
1266 	writel(ubmr, sport->port.membase + UBMR);  in imx_flush_buffer()
1267 	writel(uts, sport->port.membase + IMX21_UTS);  in imx_flush_buffer()
1378 	writel(old_ucr1 & ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN),  in imx_set_termios()
1386 	writel(old_txrxen & ~(UCR2_TXEN | UCR2_RXEN),  in imx_set_termios()
1417 	writel(ufcr, sport->port.membase + UFCR);  in imx_set_termios()
1419 	writel(num, sport->port.membase + UBIR);  in imx_set_termios()
1420 	writel(denom, sport->port.membase + UBMR);  in imx_set_termios()
1423 		writel(sport->port.uartclk / div / 1000,  in imx_set_termios()
1426 	writel(old_ucr1, sport->port.membase + UCR1);  in imx_set_termios()
1429 	writel(ucr2 | old_txrxen, sport->port.membase + UCR2);  in imx_set_termios()
1510 	writel(temp, sport->port.membase + UCR1);  in imx_poll_init()
1514 	writel(temp, sport->port.membase + UCR2);  in imx_poll_init()
1572 		writel(temp, sport->port.membase + UCR2);  in imx_rs485_config()
1613 	writel(ch, sport->port.membase + URTX0);  in imx_console_putchar()
1656 	writel(ucr1, sport->port.membase + UCR1);  in imx_console_write()
1658 	writel(old_ucr.ucr2 | UCR2_TXEN, sport->port.membase + UCR2);  in imx_console_write()
1823 	writel(val, sport->port.membase + UCR3);  in serial_imx_suspend()
1838 	writel(val, sport->port.membase + UCR3);  in serial_imx_resume()