Lines Matching refs:MPSC_TXRE_SIZE
92 #define MPSC_TXRE_SIZE dma_get_cache_alignment() macro
93 #define MPSC_TXR_SIZE (MPSC_TXR_ENTRIES * MPSC_TXRE_SIZE)
531 + (pi->txr_tail * MPSC_TXRE_SIZE)); in mpsc_sdma_start_tx()
532 dma_cache_sync(pi->port.dev, (void *)txre, MPSC_TXRE_SIZE, in mpsc_sdma_start_tx()
537 (ulong)txre + MPSC_TXRE_SIZE); in mpsc_sdma_start_tx()
542 (pi->txr_p + (pi->txr_tail * MPSC_TXRE_SIZE)); in mpsc_sdma_start_tx()
866 txre->link = cpu_to_be32(dp_p + MPSC_TXRE_SIZE); in mpsc_init_rings()
869 dp += MPSC_TXRE_SIZE; in mpsc_init_rings()
870 dp_p += MPSC_TXRE_SIZE; in mpsc_init_rings()
1097 + (pi->txr_head * MPSC_TXRE_SIZE)); in mpsc_setup_tx_desc()
1106 dma_cache_sync(pi->port.dev, (void *)txre, MPSC_TXRE_SIZE, in mpsc_setup_tx_desc()
1111 (ulong)txre + MPSC_TXRE_SIZE); in mpsc_setup_tx_desc()
1177 + (pi->txr_tail * MPSC_TXRE_SIZE)); in mpsc_tx_intr()
1179 dma_cache_sync(pi->port.dev, (void *)txre, MPSC_TXRE_SIZE, in mpsc_tx_intr()
1184 (ulong)txre + MPSC_TXRE_SIZE); in mpsc_tx_intr()
1197 + (pi->txr_tail * MPSC_TXRE_SIZE)); in mpsc_tx_intr()
1199 MPSC_TXRE_SIZE, DMA_FROM_DEVICE); in mpsc_tx_intr()
1203 (ulong)txre + MPSC_TXRE_SIZE); in mpsc_tx_intr()